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31. 发明申请

US20050136649A1 Method and fabricating semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US20050136649A1
公开(公告)日：2005-06-23
申请号：US10924720
申请日：2004-08-23
申请人： Min-Suk Lee , Sung-Kwon Lee
发明人： Min-Suk Lee , Sung-Kwon Lee
IPC分类号： H01L21/28 , H01L21/3065 , H01L21/311 , H01L21/316 , H01L21/318 , H01L21/3205 , H01L21/4763 , H01L21/60 , H01L21/768 , H01L21/8238 , H01L21/8242
CPC分类号： H01L21/76897
摘要： A method for fabricating a semiconductor device is capable of preventing a hard mask layer of a conductive structure from being damaged during a self-aligned contact etching process. The method includes the steps of: forming a plurality of conductive structures including a conductive layer and a hard mask layer on a substrate; sequentially forming a first nitride layer, an oxide layer, a second nitride layer, and an etch stop layer on the plurality of conductive structures; forming an inter-layer insulation layer on the etch stop layer; and performing a self-aligned contact (SAC) etching process selectively etching the inter-layer insulation layer, the etch stop layer, the second nitride layer and the oxide layer until the SAC etching process is stopped at the first nitride layer to thereby form a contact hole exposing the first nitride layer.
摘要翻译：一种制造半导体器件的方法能够防止导电结构的硬掩模层在自对准接触蚀刻工艺期间被损坏。该方法包括以下步骤：在衬底上形成包括导电层和硬掩模层的多个导电结构; 在所述多个导电结构上依次形成第一氮化物层，氧化物层，第二氮化物层和蚀刻停止层; 在所述蚀刻停止层上形成层间绝缘层; 以及执行自对准接触（SAC）蚀刻工艺，选择性地蚀刻层间绝缘层，蚀刻停止层，第二氮化物层和氧化物层，直到在第一氮化物层处停止SAC蚀刻工艺，从而形成露出第一氮化物层的接触孔。

32. 发明授权

US06878637B2 Method for fabricating semiconductor device capable of improving process margin of self align contact 失效
标题翻译：制造能够改善自对准接触的工艺余量的半导体器件的方法
公开(公告)号：US06878637B2
公开(公告)日：2005-04-12
申请号：US10309009
申请日：2002-12-04
申请人： Sung-Kwon Lee
发明人： Sung-Kwon Lee
IPC分类号： H01L21/28 , H01L21/306 , H01L21/3065 , H01L21/60 , H01L21/768 , H01L21/8242 , H01L23/522 , H01L27/108 , H01L21/302
CPC分类号： H01L21/76897
摘要： The present invention provides a method for fabricating a semiconductor device capable of minimizing losses of a gate electrode and a hard mask during a self align contact (SAC) formation process. For this effect, the present invention includes the steps of: forming a plurality of conductive patterns on a substrate; forming hard masks on the conductive patterns; forming an organic based dielectric layer on the substrate including the conductive patterns and the hard mask; forming an oxide based insulation layer on the organic based dielectric layer; selectively etching the insulation layer so as to expose the organic based dielectric layer allocated between the conductive patterns; and selectively etching the exposed organic based dielectric layer to form a contact hole that exposes the surfaces of the substrate between the conductive patterns with an O2 gas as a main etching gas.
摘要翻译：本发明提供了一种用于制造能够在自对准接触（SAC）形成过程期间使栅电极和硬掩模的损耗最小化的半导体器件的方法。为此，本发明包括以下步骤：在衬底上形成多个导电图案; 在导电图案上形成硬掩模; 在包括导电图案和硬掩模的基板上形成有机基介质层; 在有机介电层上形成氧化物基绝缘层; 选择性地蚀刻绝缘层以暴露分布在导电图案之间的有机基介质层; 并且选择性地蚀刻暴露的有机基介质层，以形成接触孔，该接触孔以O 2气体作为主蚀刻气体在导电图案之间暴露出基板的表面。

33. 发明授权

US06867145B2 Method for fabricating semiconductor device using photoresist pattern formed with argon fluoride laser 失效
标题翻译：使用由氟化氢激光形成的光致抗蚀剂图案制造半导体器件的方法
公开(公告)号：US06867145B2
公开(公告)日：2005-03-15
申请号：US10320718
申请日：2002-12-17
申请人： Sung-Kwon Lee , Sang-Ik Kim , Chang-Youn Hwang
发明人： Sung-Kwon Lee , Sang-Ik Kim , Chang-Youn Hwang
IPC分类号： H01L21/311 , H01L21/60 , H01L21/302
CPC分类号： H01L21/76897 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/76831
摘要： The present invention provides a method for fabricating a semiconductor device with use of an ArF light source capable of minimizing deformations of a photoresist pattern for ArF during an etching process. Also, when forming the pattern, C5F8 gas is used at a main etching step to compensate etch tolerance of the photoresist for ArF. By controlling process recipe properly, it is possible to minimize pattern deformations as simultaneously as to form a micronized pattern. To compensate the etch tolerance of the photoresist for ArF weaker than that of a photoresist for KrF, the main etching step is divided into three sub-steps, thereby providing a method for minimizing the pattern deformations when duplicating the pattern.
摘要翻译：本发明提供一种使用能在蚀刻过程中使ArF的光刻胶图案的变形最小化的ArF光源来制造半导体器件的方法。此外，当形成图案时，在主蚀刻步骤中使用C5F8气体来补偿用于ArF的光致抗蚀剂的蚀刻耐受性。通过适当地控制工艺配方，可以同时形成微粉化图案来最小化图案变形。为了补偿光致抗蚀剂对于用于KrF的光致抗蚀剂的蚀刻耐受性弱，主蚀刻步骤被分为三个子步骤，从而提供了当复制图案时最小化图案变形的方法。

34. 发明授权

US06784051B2 Method for fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06784051B2
公开(公告)日：2004-08-31
申请号：US10330295
申请日：2002-12-30
申请人： Sung-Kwon Lee
发明人： Sung-Kwon Lee
IPC分类号： H01L2972
CPC分类号： H01L21/76819 , H01L21/76838 , H01L27/1052 , H01L27/10882 , H01L27/10894
摘要： The present invention provides a method for fabricating a semiconductor device capable of preventing a pattern at an edge area of a wafer from being lifted and acting as a particle source. The present invention includes the steps of: preparing a wafer having a first area and a second area, wherein the first area has lower topology than the second area; forming a target layer on the wafer; and patterning the target layer through a photolithography process so to form a number of first patterns in a line shape at the second area and to form a number of second patterns in a closed loop shape at the first area.
摘要翻译：本发明提供一种制造半导体器件的方法，该半导体器件能够防止晶片的边缘区域上的图案被提起并用作粒子源。本发明包括以下步骤：制备具有第一区域和第二区域的晶片，其中第一区域具有比第二区域更低的拓扑结构; 在晶片上形成目标层; 以及通过光刻工艺图案化目标层，以便在第二区域形成线形的多个第一图案，并在第一区域形成多个闭环形状的第二图案。

35. 发明授权

US06723640B2 Method for forming contact plug of semiconductor device 失效
公开(公告)号：US06723640B2
公开(公告)日：2004-04-20
申请号：US10331984
申请日：2002-12-31
申请人： Sung-Kwon Lee , Dong-Sauk Kim , Hyung-Soon Park , Ho-Seok Lee , Sang-Ik Kim
发明人： Sung-Kwon Lee , Dong-Sauk Kim , Hyung-Soon Park , Ho-Seok Lee , Sang-Ik Kim
IPC分类号： H01L2144
CPC分类号： H01L21/7684 , H01L21/76819
摘要： The present invention provides a method for forming a contact plug of a semiconductor device capable of preventing an attack to conductive patterns. The method includes the steps of: forming a plurality of conductive patterns on a substrate; forming an insulating layer on top of an entire structure including the plurality of the conductive pattern; forming a contact hole by selectively etching the insulating layer; forming a conductive layer for a contact plug on the entire structure including the contact hole; forming a metal sacrificial layer on the entire structure including the conductive layer; exposing the conductive layer by performing an etchback process to the metal sacrificial layer, wherein the metal sacrificial layer is left on a lower topology area induced by the conductive patterns; and forming plugs, each being isolated by polishing the remained metal sacrificial layer, the conductive layer and the insulating layer through the use of slurry.

36. 发明授权

US06569778B2 Method for forming fine pattern in semiconductor device 有权
公开(公告)号：US06569778B2
公开(公告)日：2003-05-27
申请号：US10166133
申请日：2002-06-10
申请人： Sung-Kwon Lee , Chang-Youn Hwang
发明人： Sung-Kwon Lee , Chang-Youn Hwang
IPC分类号： H01L21461
CPC分类号： H01L21/76897 , H01L21/0276 , H01L21/31116 , H01L21/76804
摘要： A fine pattern forming method of a semiconductor device sequentially deposits an etch-target layer to be formed as the fine pattern, an anti-reflective layer and a photoresist film on a prepared semiconductor substrate and forms a photoresist pattern by performing photolithography for the photoresist film with an ArF exposure source. Then, two etching processes are performed to form the fine pattern. In one etching process, there are etched the anti-reflective layer and a portion of a non-pattern area of the etch-target layer at a first substrate temperature with fluorine-based gas and argon gas by using the photoresist pattern as an etching mask. In the other etching process, there is etched a remaining portion of the non-pattern area of the etch-target layer at a second substrate temperature higher than the first substrate temperature with fluorine-based gas and argon gas.

37. 发明授权

US07557039B2 Method for fabricating contact hole of semiconductor device 失效
标题翻译：制造半导体器件接触孔的方法
公开(公告)号：US07557039B2
公开(公告)日：2009-07-07
申请号：US11479242
申请日：2006-06-29
申请人： Sang-Oh Lee , Sung-Kwon Lee
发明人： Sang-Oh Lee , Sung-Kwon Lee
IPC分类号： H01L21/44
CPC分类号： H01L21/76804 , H01L27/10888
摘要： A method for forming a contact hole of a semiconductor device includes: forming a lower pattern over a substrate; forming a spin-on-glass (SOG) layer over the lower pattern; performing a first curing process on the SOG layer; forming an opening exposing a portion of the SOG layer; performing a second curing process on the SOG layer corresponding to a lower portion of the opening; and forming a contact hole exposing the lower pattern.
摘要翻译：用于形成半导体器件的接触孔的方法包括：在衬底上形成下部图案; 在下图案上形成旋涂玻璃（SOG）层; 在SOG层上进行第一固化过程; 形成露出SOG层的一部分的开口; 在对应于开口的下部的SOG层上进行第二固化过程; 以及形成暴露下部图案的接触孔。

38. 发明授权

US07491606B2 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07491606B2
公开(公告)日：2009-02-17
申请号：US11360142
申请日：2006-02-22
申请人： Sung-Kwon Lee , Myung-Ok Kim
发明人： Sung-Kwon Lee , Myung-Ok Kim
IPC分类号： H01L21/8242
CPC分类号： H01L29/94 , H01L28/91
摘要： A method for fabricating a three dimensional type capacitor is provided. The method includes forming a first insulation layer including first contact layers over a substrate, forming a second insulation layer over the first insulation layer, forming second contact layers by using a material having an etch selectivity different from the first contact layers such that the second contact layers are connected with the first contact layers within the second insulation layer, forming an etch stop layer over the second insulation layer and the second contact layers, forming a third insulation layer over the etch stop layer, etching the third insulation layer and the etch stop layer to form first contact holes exposing the second contact layers, etching the exposed second contact layers to form second contact holes exposing the first contact holes, and forming bottom electrodes over the inner surface of the second contact holes.
摘要翻译：提供一种制造三维型电容器的方法。该方法包括在衬底上形成包括第一接触层的第一绝缘层，在第一绝缘层上形成第二绝缘层，通过使用具有不同于第一接触层的蚀刻选择性的材料形成第二接触层，使得第二接触层与第二绝缘层内的第一接触层连接，在第二绝缘层和第二接触层上方形成蚀刻停止层，在蚀刻停止层上方形成第三绝缘层，蚀刻第三绝缘层和蚀刻停止层以形成暴露第二接触层的第一接触孔，蚀刻暴露的第二接触层以形成暴露第一接触孔的第二接触孔，以及在第二接触孔的内表面上形成底电极。

39. 发明申请

US20080233490A1 Mask rework method 审中-公开
标题翻译：面膜返修方法
公开(公告)号：US20080233490A1
公开(公告)日：2008-09-25
申请号：US11983290
申请日：2007-11-07
申请人： Sung-Kwon Lee
发明人： Sung-Kwon Lee
IPC分类号： G03F1/00
CPC分类号： H01L21/02079 , H01L21/0332 , H01L21/31116 , H01L21/31122 , H01L21/31138
摘要： A mask rework method includes forming a first carbon-containing hard mask layer and a first silicon-containing hard mask layer over an etch target layer, forming a first photoresist pattern over the first-silicon-containing hard mask layer, removing the first photoresist pattern, the first silicon-containing hard mask layer, and the first carbon-containing hard mask layer to generate a resulting structure, stacking a second carbon-containing hard mask layer and a second silicon-containing hard mask layer on the resulting structure, and forming a second photoresist pattern over the second silicon-containing hard mask layer.
摘要翻译：掩模返工方法包括在蚀刻目标层上形成第一含碳硬掩模层和第一含硅硬掩模层，在第一含硅硬掩模层上形成第一光致抗蚀剂图案，去除第一光致抗蚀剂图案，第一含硅硬掩模层和第一含碳硬掩模层，以产生所得结构，在所得结构上堆叠第二含碳硬掩模层和第二含硅硬掩模层，以及形成在第二含硅硬掩模层上的第二光致抗蚀剂图案。

40. 发明授权

US07125496B2 Etching method using photoresist etch barrier 失效
标题翻译：蚀刻方法使用光刻胶蚀刻屏障
公开(公告)号：US07125496B2
公开(公告)日：2006-10-24
申请号：US10166421
申请日：2002-06-10
申请人： Sung-Kwon Lee
发明人： Sung-Kwon Lee
IPC分类号： H01L21/00 , B44C1/22
CPC分类号： H01L21/31144 , H01L21/02271 , H01L21/31116 , H01L21/312 , H01L21/76802 , H01L21/76816 , H01L21/76897
摘要： A method of etching is disclosed using a photoresist etch barrier formed by an exposure with a light source of which wavelength is in the range of 157 nm to 193 nm, such as an argon fluoride(ArF) laser or fluorine laser(F2 laser), the method includes the steps of coating a photoresist layer on a etch target layer; forming photoresist pattern by developing the photoresist layer after exposing the photoresist layer with a light source of which wavelength is in the range of 157 nm to 193 nm; forming a polymer layer and etching a portion of the etch target layer simultaneously with a mixture of fluorine-based gas, an Ar gas and an O2 gas, wherein the fluorine-based gas is CxFy or CaHbFc, and wherein x, y, a, b and c range from 1 to 10, respectively; and etching the etch target layer using the polymer layer and the photoresist pattern as the etch mask.
摘要翻译：公开了一种蚀刻方法，其中使用光致抗蚀剂蚀刻屏障，其通过用波长在157nm至193nm范围内的光源进行曝光而形成，例如氩氟化物（ArF）激光或氟激光（F < 2激光），该方法包括以下步骤：在蚀刻目标层上涂覆光致抗蚀剂层; 通过在波长在157nm至193nm范围内的光源曝光光致抗蚀剂层之后，通过显影光致抗蚀剂层来形成光致抗蚀剂图案; 形成聚合物层并与氟基气体，Ar气体和O 2气体的混合物同时蚀刻蚀刻目标层的一部分，其中氟基气体为C < 或者其中x，y，a，b，c，c，，b和c分别为1〜10; 并使用聚合物层和光致抗蚀剂图案作为蚀刻掩模蚀刻蚀刻目标层。

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