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31. 发明申请

US20100025804A1 SOI SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE 有权
标题翻译： SOI衬底和制造SOI衬底的方法
公开(公告)号：US20100025804A1
公开(公告)日：2010-02-04
申请号：US12158047
申请日：2006-11-01
申请人： Makoto Kawai , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Yuuji Tobisaka , Shoji Akiyama
发明人： Makoto Kawai , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Yuuji Tobisaka , Shoji Akiyama
IPC分类号： H01L21/762 , H01L27/12
CPC分类号： H01L21/76254
摘要： On the side of a surface (the bonding surface side) of a single crystal Si substrate, a uniform ion implantation layer is formed at a prescribed depth (L) in the vicinity of the surface. The surface of the single crystal Si substrate and a surface of a transparent insulating substrate as bonding surfaces are brought into close contact with each other, and bonding is performed by heating the substrates in this state at a temperature of 350° C. or below. After this bonding process, an Si—Si bond in the ion implantation layer is broken by applying impact from the outside, and a single crystal silicon thin film is mechanically peeled along a crystal surface at a position equivalent to the prescribed depth (L) in the vicinity of the surface of the single crystal Si substrate.
摘要翻译：在单晶Si衬底的表面（接合面侧）侧，在表面附近以规定的深度（L）形成均匀的离子注入层。单晶Si衬底的表面和作为结合面的透明绝缘衬底的表面彼此紧密接触，并且通过在350℃或更低的温度下在该状态下加热衬底来进行接合。在该接合工艺之后，通过从外部施加冲击来破坏离子注入层中的Si-Si键，并且在等于规定深度（L）的位置上的晶体表面机械剥离单晶硅薄膜单晶Si衬底表面附近。

32. 发明授权

US07615456B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US07615456B2
公开(公告)日：2009-11-10
申请号：US12076923
申请日：2008-03-25
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/76256 , H01L27/12
摘要： A method for manufacturing an SOI substrate superior in film thickness uniformity and resistivity uniformity in a substrate surface of a silicon layer having a film thickness reduced by an etch-back method is provided. After B ions is implanted into a front surface of a single-crystal Si substrate 10 to form a high-concentration boron added p layer 11 having a depth L in the outermost front surface, the single-crystal Si substrate 10 is appressed against a quartz substrate 20 to be bonded at a room temperature. Chemical etching is performed with respect to the single-crystal Si substrate 10 from a back surface thereof to set its thickness to L or below. A heat treatment is carried out with respect to an SOI substrate in a hydrogen containing atmosphere to outwardly diffuse B from the high-concentration boron added p layer 11, thereby acquiring a boron added p layer 12 having a desired resistance value. During this heat treatment, B in an Si crystal is diffused to the outside of the crystal in a state where it is coupled with hydrogen in the atmosphere, and a B concentration in the high-concentration boron added p layer 11 is reduced. In regard to a heat treatment temperature at this time, in view of a softening point of the insulative substrate, an upper limit of the heat treatment temperature is set to 1250° C., and 700° C. is selected as a lower limit of the temperature at which B can be diffused.
摘要翻译：提供一种制造SOI衬底的方法，该SOI衬底具有通过蚀刻方法减小的膜厚度的硅层的衬底表面中的膜厚均匀性和电阻率均匀性优异的SOI衬底。在将B离子注入到单晶Si衬底10的前表面中以形成在最外表面具有深度L的高浓度硼添加p层11之后，将单晶Si衬底10贴在石英基板20在室温下结合。从其背面对单晶硅基板10进行化学蚀刻，将其厚度设定为L以下。对含氢气氛中的SOI衬底进行热处理，从高浓度硼添加p层11向外扩散B，从而获得具有所需电阻值的添加硼的p层12。在该热处理中，Si结晶中的B在与大气中的氢相结合的状态下扩散到晶体外部，并且在高浓度硼添加p层11中的B浓度降低。就此时的热处理温度而言，考虑到绝缘基板的软化点，将热处理温度的上限设定为1250℃，选择700℃为下限值 B可以扩散的温度。

33. 发明申请

US20090111242A1 Method for producing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US20090111242A1
公开(公告)日：2009-04-30
申请号：US12230984
申请日：2008-09-09
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： An object of the present invention is to provide a method by which bonding at a low temperature is possible and an amount of metal contaminants in an SOI film is decreased. An embodiment of the present invention is realized in the following manner. A single crystal silicon substrate 10 surface-activated by a plasma-treatment and a quartz substrate 20 are bonded together at a low temperature, to which an external impact is given to mechanically delaminate silicon film from a single crystal silicon bulk thereby obtaining a semiconductor substrate (SOI substrate) having a silicon film (SOI film) 12. Next, the SOI substrate is subjected to a heat-treatment at a temperature of 600° C. to 1250° C. so that metal impurities accidentally mixed into an interface of the SOI film and the quartz substrate and into the SOI film in such a step as a plasma-treatment are gettered to a surface region of the silicon film 12. Then, in the end, a surface layer (gettering layer) of the silicon film 12 of the SOI substrate after the heat-treatment is removed to finally prepare an SOI film 13 and a semiconductor substrate (SOI substrate) is obtained.
摘要翻译：本发明的目的是提供一种可以在低温下进行接合并降低SOI膜中的金属污染物的量的方法。以下述方式实现本发明的实施例。通过等离子体处理表面激活的单晶硅衬底10和石英衬底20在低温下被接合在一起，对其进行外部冲击以将硅膜从单晶硅体层剥离，从而获得半导体衬底（SOI衬底）12。接下来，将SOI衬底在600℃至1250℃的温度下进行热处理，使得金属杂质意外地混入到 SOI膜和石英衬底以及诸如等离子体处理的步骤中的SOI膜被吸收到硅膜12的表面区域。然后，最后，将硅膜12的表面层（吸气层）的SOI基板，最终制作SOI膜13，得到半导体基板（SOI基板）。

34. 发明申请

US20090061591A1 METHOD FOR MANUFACTURING SOI SUBSTRATE 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US20090061591A1
公开(公告)日：2009-03-05
申请号：US12162134
申请日：2007-02-08
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： A hydrogen ion-implanted layer is formed on the surface side of a first substrate which is a single-crystal silicon substrate. At least one of the surface of a second substrate, which is a transparent insulating substrate, and the surface of the first substrate is subjected to surface activation treatment, and the two substrates are bonded together. The bonded substrate composed of the single-crystal Si substrate and the transparent insulating substrate thus obtained is mounted on a susceptor and is placed under an infrared lamp. Light having a wave number range including an Si—H bond absorption band is irradiated at the bonded substrate for a predetermined length of time to break the Si—H bonds localized within a “microbubble layer” in the hydrogen ion-implanted layer, thereby separating a silicon thin film layer.
摘要翻译：在作为单晶硅衬底的第一衬底的表面侧上形成氢离子注入层。作为透明绝缘基板的第二基板的表面和第一基板的表面中的至少一个进行表面活化处理，并且将两个基板接合在一起。将由单晶Si衬底和由此获得的透明绝缘衬底构成的键合衬底安装在基座上并放置在红外灯下。在键合衬底上照射具有Si-H键吸收带的波数范围的光，以预定的时间长度，以破坏位于氢离子注入层中的“微泡层”内的Si-H键，从而分离硅薄膜层。

35. 发明申请

US20080251192A1 Method for manufacturing pyrolytic boron nitride composite substrate 有权
标题翻译：制造热解氮化硼复合基板的方法
公开(公告)号：US20080251192A1
公开(公告)日：2008-10-16
申请号：US12078276
申请日：2008-03-28
申请人： Makoto Kawai , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Yuuji Tobisaka , Shoji Akiyama
发明人： Makoto Kawai , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Yuuji Tobisaka , Shoji Akiyama
IPC分类号： B32B38/10
CPC分类号： H01L21/76254 , C23C14/48
摘要： Wettability of a PBN material surface with respect to a metal is improved to expand use applications. Hydrogen ions are implanted into a surface of a silicon substrate 10 to form an ion implanted region 11 at a predetermined depth near a surface of the silicon substrate 10, and a plasma treatment or an ozone treatment is performed with respect to a main surface of the silicon substrate 10 for the purpose of surface cleaning or surface activation. The main surfaces of the silicon substrate 10 and a PBN substrate 20 subjected to the surface treatment are appressed against each other to be bonded at a room temperature, and an external impact shock is given to the bonded substrate to mechanically delaminate a silicon film 12 from a bulk 13 of the silicon substrate to be transferred. An obtained PBN composite substrate 30 is diced to form a chip having a desired size, and a refractory metal is metallized on the silicon film 12 side to be connected with a wiring material.
摘要翻译： PBN材料表面相对于金属的润湿性得到改善以扩大使用应用。将氢离子注入到硅衬底10的表面中以在硅衬底10的表面附近的预定深度处形成离子注入区11，并且相对于硅衬底10的主表面进行等离子体处理或臭氧处理硅基板10，用于表面清洁或表面活化。经过表面处理的硅衬底10和PBN衬底20的主表面在室温下相互粘合，并且对键合衬底施加外部冲击冲击，从而将硅膜12从待转移的硅衬底的体积13。将获得的PBN复合基板30切割成具有所需尺寸的芯片，并且将难熔金属在硅膜12侧金属化以与布线材料连接。

36. 发明申请

US20110244654A1 METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE 审中-公开
标题翻译：制造半导体基板的方法
公开(公告)号：US20110244654A1
公开(公告)日：2011-10-06
申请号：US13115441
申请日：2011-05-25
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
IPC分类号： H01L21/301
CPC分类号： H01L21/76254 , C30B33/04 , H01L21/265
摘要： A nitride-based semiconductor crystal and a second substrate are bonded together. In this state, impact is applied externally to separate the low-dislocation density region of the nitride-based semiconductor crystal along the hydrogen ion-implanted layer, thereby transferring (peeling off) the surface layer part of the low-dislocation density region onto the second substrate. At this time, the lower layer part of the low-dislocation density region stays on the first substrate without being transferred onto the second substrate. The second substrate onto which the surface layer part of the low-dislocation density region has been transferred is defined as a semiconductor substrate available by the manufacturing method of the present invention, and the first substrate on which the lower layer part of the low-dislocation density region stays is reused as a substrate for epitaxial growth.
摘要翻译：氮化物类半导体晶体和第二基板结合在一起。在这种状态下，外部施加冲击以沿着氢离子注入层分离氮化物基半导体晶体的低位错密度区域，从而将低位错密度区域的表面层部分转移（剥离）到第二基板。此时，低位错密度区域的下层部分停留在第一基板上，而不会转移到第二基板上。将低位错密度区域的表面层部分转印到其上的第二基板被定义为可通过本发明的制造方法获得的半导体基板，并且第一基板在其上具有低位错层的下层部分密度区域残留被重新用作外延生长的衬底。

37. 发明授权

US07972937B2 Method for producing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US07972937B2
公开(公告)日：2011-07-05
申请号：US12230984
申请日：2008-09-09
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
IPC分类号： H01L21/322
CPC分类号： H01L21/76254
摘要： An object of the present invention is to provide a method by which bonding at a low temperature is possible and an amount of metal contaminants in an SOI film is decreased. An embodiment of the present invention is realized in the following manner. A single crystal silicon substrate 10 surface-activated by a plasma-treatment and a quartz substrate 20 are bonded together at a low temperature, to which an external impact is given to mechanically delaminate silicon film from a single crystal silicon bulk thereby obtaining a semiconductor substrate (SOI substrate) having a silicon film (SOI film) 12. Next, the SOI substrate is subjected to a heat-treatment at a temperature of 600° C. to 1250° C. so that metal impurities accidentally mixed into an interface of the SOI film and the quartz substrate and into the SOI film in such a step as a plasma-treatment are gettered to a surface region of the silicon film 12. Then, in the end, a surface layer (gettering layer) of the silicon film 12 of the SOI substrate after the heat-treatment is removed to finally prepare an SOI film 13 and a semiconductor substrate (SOI substrate) is obtained.
摘要翻译：本发明的目的是提供一种可以在低温下进行接合并降低SOI膜中的金属污染物的量的方法。以下述方式实现本发明的实施例。通过等离子体处理表面激活的单晶硅衬底10和石英衬底20在低温下被接合在一起，对其进行外部冲击以将硅膜从单晶硅体层剥离，从而获得半导体衬底（SOI衬底）12。接下来，将SOI衬底在600℃至1250℃的温度下进行热处理，使得金属杂质意外地混入到 SOI膜和石英衬底以及诸如等离子体处理的步骤中的SOI膜被吸收到硅膜12的表面区域。然后，最后，将硅膜12的表面层（吸气层）的SOI基板，最终制作SOI膜13，得到半导体基板（SOI基板）。

38. 发明授权

US07892934B2 SOI substrate and method for manufacturing SOI substrate 有权
标题翻译： SOI衬底和制造SOI衬底的方法
公开(公告)号：US07892934B2
公开(公告)日：2011-02-22
申请号：US12158047
申请日：2006-11-01
申请人： Makoto Kawai , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Yuuji Tobisaka , Shoji Akiyama
发明人： Makoto Kawai , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Yuuji Tobisaka , Shoji Akiyama
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/76254
摘要： On the side of a surface (the bonding surface side) of a single crystal Si substrate, a uniform ion implantation layer is formed at a prescribed depth (L) in the vicinity of the surface. The surface of the single crystal Si substrate and a surface of a transparent insulating substrate as bonding surfaces are brought into close contact with each other, and bonding is performed by heating the substrates in this state at a temperature of 350° C. or below. After this bonding process, an Si—Si bond in the ion implantation layer is broken by applying impact from the outside, and a single crystal silicon thin film is mechanically peeled along a crystal surface at a position equivalent to the prescribed depth (L) in the vicinity of the surface of the single crystal Si substrate.
摘要翻译：在单晶Si衬底的表面（接合面侧）侧，在表面附近以规定的深度（L）形成均匀的离子注入层。单晶Si衬底的表面和作为结合面的透明绝缘衬底的表面彼此紧密接触，并且通过在350℃或更低的温度下在该状态下加热衬底来进行接合。在该接合工艺之后，通过从外部施加冲击来破坏离子注入层中的Si-Si键，并且在等于规定深度（L）的位置上的晶体表面机械剥离单晶硅薄膜单晶Si衬底表面附近。

39. 发明授权

US07855127B2 Method for manufacturing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US07855127B2
公开(公告)日：2010-12-21
申请号：US12010711
申请日：2008-01-29
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262
摘要： A method for manufacturing a semiconductor substrate including: epitaxially growing a silicon germanium (SiGe) film on a silicon (Si) substrate by a chemical vapor deposition method; subjecting a heat treatment to the SiGe film at a temperature of not less than 700° C. and not more than 1200° C.; implanting hydrogen ions into a surface of the SiGe film; subjecting a surface activation treatment to a main surface of at least one of the SiGe film and a support substrate; bonding main surfaces of the SiGe film and the support substrate at a temperature of not less than 100° C. and not more than 400° C.; and applying an external impact to a bonding interface between the SiGe film and the support substrate to delaminate the SiGe crystal along a hydrogen ion implanted interface of the SiGe film, thereby forming a SiGe thin film on the main surface of the support substrate.
摘要翻译：一种制造半导体衬底的方法，包括：通过化学气相沉积法在硅（Si）衬底上外延生长硅锗（SiGe）膜; 在不低于700℃且不超过1200℃的温度下对SiGe膜进行热处理; 将氢离子注入SiGe膜的表面; 对SiGe膜和支撑基板中的至少一个的主表面进行表面活化处理; 在不低于100℃且不超过400℃的温度下接合SiGe膜和支撑衬底的主表面; 并对SiGe膜和支撑基板之间的接合界面施加外部冲击，以沿着SiGe膜的氢离子注入界面分解SiGe晶体，从而在支撑基板的主表面上形成SiGe薄膜。

40. 发明申请

US20090111237A1 Method for manufacturing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US20090111237A1
公开(公告)日：2009-04-30
申请号：US12285409
申请日：2008-10-03
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Yuuji Tobisaka , Koichi Tanaka
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L21/2007 , H01L21/26506 , H01L21/28167 , H01L21/3144 , H01L21/32105 , H01L29/4908 , H01L29/78603
摘要： A consistent reduction in temperature in an SOI substrate manufacturing process is achieved.A gate oxide film provided on an SOI substrate is obtained by laminating a low-temperature thermal oxide film 13 grown at a temperature of 450° C. or below and an oxide film 14 obtained based on a CVD method. Since the thermal oxide film 13 is a thin film of 100 Å or below, a low temperature of 450° C. or below can suffice. The underlying thermal oxide film 13 can suppress a structural defect, e.g., an interface state, and the CVD oxide film 14 formed on the thermal oxide film can be used to adjust a thickness of the gate oxide film. According to such a technique, a conventional general silicon oxide film forming apparatus can be used to form the gate oxide film at a low temperature, thereby achieving a consistent reduction in temperature in the SOI substrate manufacturing process.
摘要翻译：实现SOI衬底制造工艺中温度的一致降低。通过层叠在450℃以下的温度下生长的低温热氧化膜13和基于CVD法得到的氧化膜14，可以得到设置在SOI衬底上的栅极氧化膜。由于热氧化膜13是100以下的薄膜，所以450℃以下的低温就可以了。下面的热氧化膜13可以抑制结构缺陷，例如界面状态，并且可以使用形成在热氧化膜上的CVD氧化膜14来调节栅极氧化膜的厚度。根据这种技术，可以使用常规的一般的氧化硅膜形成装置在低温下形成栅极氧化膜，从而在SOI衬底制造工艺中实现一致的温度降低。

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