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    • 31. 发明申请
    • Liquid crystal display and method for driving thereof
    • 液晶显示器及其驱动方法
    • US20060071897A1
    • 2006-04-06
    • US10509201
    • 2003-04-28
    • Seung-Hwan Moon
    • Seung-Hwan Moon
    • G09G3/36
    • G09G3/3611G09G3/3688G09G2310/04G09G2330/021G09G2330/06
    • The present invention relates to a liquid crystal display and a driving method thereof. A liquid crystal display according to the present invention comprises: a liquid crystal panel assembly including a plurality of gate lines, a plurality of data lines which are insulated from and intersects the gate lines, and a plurality of pixels each of which is formed in an area defined by the data line and the gate line and has a switching element connected to the gate line and the data line; a gate driver for supplying gate voltages to the gate lines; at least one data driver for supplying data voltages corresponding to image data to the data lines; and a timing controller for comparing nth image data applied from outside and (n−1)th image data stored therein and selectively providing the nth image data to the data driver depending on the comparison result. According to the present invention, since image data transmission between the timing controller and the data driver can be minimized, power consumption and EMI due to image data switching can be reduced.
    • 本发明涉及一种液晶显示器及其驱动方法。 根据本发明的液晶显示器包括:液晶面板组件,其包括多条栅极线,与栅极线绝缘并与之相交的多条数据线,以及多个像素,其形成在 由数据线和栅极线限定的区域,并具有连接到栅极线和数据线的开关元件; 栅极驱动器,用于向栅极线提供栅极电压; 至少一个用于将对应于图像数据的数据电压提供给数据线的数据驱动器; 以及定时控制器,用于比较从外部施加的第n个图像数据和存储在其中的第(n-1)个图像数据,并且根据比较结果选择性地将第n个图像数据提供给数据驱动器。 根据本发明,由于可以使定时控制器和数据驱动器之间的图像数据传输最小化,所以能够降低图像数据切换引起的功耗和EMI。
    • 35. 发明申请
    • Display device and driving method thereof
    • 显示装置及其驱动方法
    • US20050231455A1
    • 2005-10-20
    • US11109569
    • 2005-04-18
    • Seung-Hwan Moon
    • Seung-Hwan Moon
    • G02F1/133G02F1/1362G09G3/20G09G3/36
    • G09G3/3648G02F1/136213G09G3/3607G09G3/3614G09G2300/0426G09G2310/0205G09G2310/0251
    • A display device includes: pixel rows including pairs of first and second pixels arranged in turn in each row; first and second gate lines connected to the first and second pixels, respectively; and data lines intersecting the gate lines. Each data line is disposed in between a pair of first and second pixels and connected to the pixels. The pixels are charged by voltages from the data lines in response to signals from the gate lines. The first pixels finish the voltage charging before the voltage charging of the second pixels in the pixel row is finished. The second pixels have a precharging time before the first pixels finish the voltage charging and a main charging time after the first pixels finish the voltage charging. The polarities of voltages charged into the second pixels during the precharging time and the main charging time are the same.
    • 显示装置包括:像素行,包括依次排列在每一行中的第一和第二像素对; 分别连接到第一和第二像素的第一和第二栅极线; 和与栅极线相交的数据线。 每个数据线被布置在一对第一和第二像素之间并连接到像素。 响应于来自栅极线的信号,来自数据线的电压对像素进行充电。 第一像素在像素行中的第二像素的电压充电完成之前完成电压充电。 第二像素在第一像素完成电压充电之前具有预充电时间,并且在第一像素完成充电之后的主充电时间。 在预充电时间和主充电时间期间,充入第二像素的电压的极性相同。
    • 37. 发明申请
    • Shift register, scan driving circuit and display apparatus having the same
    • 移位寄存器,扫描驱动电路和具有该移位寄存器的显示装置
    • US20050008114A1
    • 2005-01-13
    • US10865216
    • 2004-06-10
    • Seung-Hwan Moon
    • Seung-Hwan Moon
    • G02F1/133G09G3/20G09G3/36G11C19/00G11C19/18G11C19/28
    • G09G3/3677G09G2310/0286G11C19/00G11C19/184G11C19/28
    • A shift register includes a plurality of stages to generate a plurality of output signals, in sequence. Each of the stages includes a driving circuit, a charging circuit, a discharging circuit and a holding circuit. The driving circuit is configured to generate a first output signal in response to a first clock signal or a second clock signal having a phase different from the first clock signal. The charging circuit is configured to charge an electric charge in response to a scan start signal or a second output signal of an adjacent previous stage. The discharging circuit is configured to discharge the electric charge in response to a third output signal of an adjacent next stage. The holding circuit is configured to maintain the first output signal within a first voltage when the first output signal is in an inactive state. Therefore, a parasite capacitance is decreased to prevent a floating of a pull-up transistor.
    • 移位寄存器包括多个级,以依次产生多个输出信号。 每个级包括驱动电路,充电电路,放电电路和保持电路。 驱动电路被配置为响应于第一时钟信号或具有与第一时钟信号不同的相位的第二时钟信号产生第一输出信号。 充电电路被配置为响应于相邻的前一级的扫描开始信号或第二输出信号对电荷充电。 放电电路被配置为响应于相邻的下一级的第三输出信号而放电电荷。 保持电路被配置为当第一输出信号处于非活动状态时将第一输出信号保持在第一电压内。 因此,降低寄生电容以防止上拉晶体管的浮置。