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31. 发明授权

US07679295B1 Converter with feedback voltage referenced to output voltage with separate ground planes for converter and load 有权
标题翻译：转换器具有参考输出电压的反馈电压，具有转换器和负载的单独接地层
公开(公告)号：US07679295B1
公开(公告)日：2010-03-16
申请号：US11940186
申请日：2007-11-14
申请人： Michael J. Collins
发明人： Michael J. Collins
IPC分类号： H05B37/02
CPC分类号： H02M3/156 , G09G2330/028
摘要： A driver for a white LED string or a display is provided. The driver includes a boost converter that is arranged to provide an output voltage from a source voltage. Also, the driver includes a sense resistor that is coupled between the output voltage and a feedback voltage. The sense resistor is coupled in series with the white LED string or the display. Further, the boost converter uses the sense voltage across the sense resistor to regulate the output voltage. In one embodiment, the boost converter includes a level shifter that converts the sense voltage into a comparison signal that is referenced to ground. In another embodiment, the converter employs a reference voltage that is referenced to the output voltage.
摘要翻译：提供白色LED串或显示器的驱动程序。驱动器包括升压转换器，其被布置成从源极电压提供输出电压。此外，驱动器包括耦合在输出电压和反馈电压之间的检测电阻器。感测电阻器与白色LED串或显示器串联耦合。此外，升压转换器使用检测电阻两端的感测电压来调节输出电压。在一个实施例中，升压转换器包括电平移位器，其将感测电压转换为参考地的比较信号。在另一实施例中，转换器采用参考输出电压的参考电压。

32. 发明申请

US20100021030A1 AUTOMATED LESION CHARACTERIZATION 有权
标题翻译：自动化LESION特征
公开(公告)号：US20100021030A1
公开(公告)日：2010-01-28
申请号：US12573324
申请日：2009-10-05
申请人： Michael J. Collins , Daniel Corwin-Renner
发明人： Michael J. Collins , Daniel Corwin-Renner
IPC分类号： G06T1/00
CPC分类号： G06T7/0012 , A61B6/502 , G06T2207/30068
摘要： A method and system that provides users with additional information regarding imagery analyzed by computer-aided detection (CAD) systems is described. A user selects a region of the analyzed imagery. Information is then derived from computational measurements of the region obtained during CAD processing. The region selected by the user does not necessarily have to include a displayed CAD system detection. The information includes a description of the computational measurement and the value of the measurement, both of which are provided in clinically relevant terms.
摘要翻译：描述了一种为用户提供关于通过计算机辅助检测（CAD）系统分析的图像的附加信息的方法和系统。用户选择分析图像的区域。然后从CAD处理中获得的区域的计算测量得出信息。由用户选择的区域不一定必须包括显示的CAD系统检测。该信息包括计算测量和测量值的描述，两者都以临床相关术语提供。

33. 发明授权

US07125721B2 Method and apparatus for rapid fat content determination 有权
公开(公告)号：US07125721B2
公开(公告)日：2006-10-24
申请号：US10065173
申请日：2002-09-24
申请人： Michael J. Collins , Edward E. King
发明人： Michael J. Collins , Edward E. King
IPC分类号： G01N33/02
CPC分类号： G01N24/08 , G01N1/44 , G01N5/04 , G01N24/081 , G01N24/085 , G01N33/06 , G01R33/44
摘要： A sample for NMR measurement of moisture and fat and oil contents is disclosed. The sample includes an organic portion containing at least some fats and oils, a pad that is substantially transparent to microwave radiation and is free of atoms that would interfere with or mask the NMR response of the protons in the fats and oils in the sample, and a sheet material that is free of atoms that would interfere with or mask the NMR response of the protons in the fats and oils in the sample, with the sheet material being wrapped around the organic portion and the pad.

34. 发明授权

US06801645B1 Computer aided detection of masses and clustered microcalcifications with single and multiple input image context classification strategies 有权
标题翻译：计算机辅助检测群体和群集微钙化与单输入和多输入图像上下文分类策略
公开(公告)号：US06801645B1
公开(公告)日：2004-10-05
申请号：US09602762
申请日：2000-06-23
申请人： Michael J. Collins , Steven K. Rogers , Richard A. Mitchell
发明人： Michael J. Collins , Steven K. Rogers , Richard A. Mitchell
IPC分类号： G06K900
CPC分类号： G06K9/6293 , G06K9/4609 , G06K9/56 , G06K2209/05 , G06T7/0012 , G06T2207/30068
摘要： A computer aided detection method and system to assist radiologists in the reading of medical images. The method and system has particular application to the area of mammography including detection of clustered microcalcifications and densities. A microcalcification detector is provided wherein individual detections are rank ordered and classified, and one of the features for classification is derived using a multilayer perceptron. A density detector is provided including an iterative, dynamic region growing module with embedded subsystem for rank ordering and classification of a best subset of candidate masks. A post processing stage is provided where detections are analyzed in the context of a set of images for a patient. Three analysis methods are used to distribute a limited number of detections across the image set and further within each image, and additionally to perform a normalcy classification. The normalcy classification is used to remove all detections from an image set when predetermined normalcy conditions are met. The final output of the system is a set of indications overlaid on the input medical images.
摘要翻译：一种计算机辅助检测方法和系统，用于帮助放射科医师阅读医学图像。该方法和系统在乳腺摄影领域具有特殊应用，包括检测聚类微钙化和密度。提供了一种微钙化检测器，其中单独的检测是排序和分类的，并且使用多层感知器导出用于分类的特征之一。提供了一种密度检测器，其包括具有嵌入式子系统的迭代动态区域增长模块，用于对候选掩模的最佳子集进行排序和分类。提供后处理阶段，其中在用于患者的一组图像的上下文中分析检测。三种分析方法用于跨越图像集并且进一步在每个图像内分布有限数量的检测，并且另外执行正常分类。当满足预定的正常条件时，正常分类用于从图像集中去除所有检测。系统的最终输出是覆盖在输入医学图像上的一组指示。

35. 发明授权

US06249847B1 Computer system with synchronous memory arbiter that permits asynchronous memory requests 有权
标题翻译：具有允许异步存储器请求的同步存储器仲裁器的计算机系统
公开(公告)号：US06249847B1
公开(公告)日：2001-06-19
申请号：US09134057
申请日：1998-08-14
申请人： Kenneth T. Chin , Phillip M. Jones , Robert A. Lester , Gary J. Piccirillo , Michael J. Collins
发明人： Kenneth T. Chin , Phillip M. Jones , Robert A. Lester , Gary J. Piccirillo , Michael J. Collins
IPC分类号： G06F1378
CPC分类号： G06F13/18
摘要： A computer system that includes a CPU, a memory and a memory controller for controlling access to the memory. The memory controller generally includes arbitration logic for deciding which memory request among one or more pending requests should win arbitration. When a request wins arbitration, the arbitration logic asserts a “won” signal corresponding to that memory request. The memory controller also includes synchronizing logic to synchronize memory requests, corresponding to a first group of requests, that win arbitration to a clock signal and an arbitration enable signal. The synchronizing logic includes an AND gate and a latch for synchronizing the won signals. The memory controller also asynchronously arbitrates a second group of memory requests by asserting a won signal associated with the second group requests that is not synchronized to the clock signal. In this manner, the won signals for the second group of requests can be asserted earlier than the synchronized won signals, thereby permitting the asynchronously arbitrated second group memory requests to be performed earlier than otherwise possible.
摘要翻译：一种包括CPU，存储器和用于控制对存储器的访问的存储器控制器的计算机系统。存储器控制器通常包括仲裁逻辑，用于决定一个或多个待处理请求中哪个存储器请求应该赢得仲裁。当请求赢得仲裁时，仲裁逻辑确定与该存储器请求对应的“赢”信号。存储器控制器还包括同步逻辑，以将与第一组请求相对应的存储器请求同步到仲裁到时钟信号和仲裁使能信号。同步逻辑包括与门和用于使获胜信号同步的锁存器。存储器控制器还通过断言与不与时钟信号同步的第二组请求相关联的获胜信号来异步地仲裁第二组存储器请求。以这种方式，第二组请求的获胜信号可以早于同步的获胜信号被断言，从而允许异步仲裁的第二组存储器请求比其他可能的更早执行。

36. 发明授权

US06175104B1 Microwave probe applicator for physical and chemical processes 有权
标题翻译：用于物理和化学过程的微波探测器
公开(公告)号：US06175104B1
公开(公告)日：2001-01-16
申请号：US09148080
申请日：1998-09-04
申请人： Gary Roger Greene , Lois B. Jassie , Edward Earl King , Michael J. Collins
发明人： Gary Roger Greene , Lois B. Jassie , Edward Earl King , Michael J. Collins
IPC分类号： H05B664
CPC分类号： H05B6/806 , H05B6/70 , H05B6/72
摘要： A microwave heating system is disclosed for enhancing physical and chemical processes. The system includes a microwave source, an antenna having a cable, a receiver for receiving microwaves generated by the source, with the receiver being connected to a first end of the cable, and a transmitter for transmitting microwaves generated by the source, and with the transmitter being connected to an opposite end of the cable. The system also includes a reaction vessel with the transmitter inside the reaction vessel; and a microwave shield surrounding the transmitter for preventing microwaves emitted from the transmitter from extending substantially beyond the reaction vessel.
摘要翻译：公开了用于增强物理和化学过程的微波加热系统。该系统包括微波源，具有电缆的天线，用于接收由源产生的微波的接收器，接收器连接到电缆的第一端;以及发射器，用于传输源产生的微波，并且与发射器连接到电缆的相对端。该系统还包括在反应容器内具有变送器的反应容器; 以及围绕发射器的微波屏蔽，用于防止从发射器发射的微波基本上延伸超过反应容器。

37. 发明授权

US5848428A Sense amplifier decoding in a memory device to reduce power consumption 失效
标题翻译：感应放大器在存储器件中解码以降低功耗
公开(公告)号：US5848428A
公开(公告)日：1998-12-08
申请号：US770763
申请日：1996-12-19
申请人： Michael J. Collins
发明人： Michael J. Collins
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0864 , G06F2212/1028 , Y02B60/1225
摘要： A multiple-way cache memory system incorporating circuitry for selectively enabling the sense amplifiers in a given memory bank only when the memory bank contains data that is being accessed. In the disclosed embodiment of the invention, each bank of memory incorporates a bank of at least one sense amplifier that is enabled by a separate sense amplifier control signal. The sense amplifiers in each memory bank are controlled independent of the address decoding logic. Instead, the sense amplifier control signal for each memory bank is generated from tag RAM read hit information and read address data. Preferably, no more than one bank of sense amplifiers is enabled at a time, Power consumption in the cache memory system is thereby greatly reduced.
摘要翻译：一种多路高速缓冲存储器系统，其结合电路，用于仅当存储体包含正被访问的数据时，才能选择性地使能给定存储体中的读出放大器。在所公开的本发明的实施例中，每一组存储器都包含一个由一个单独的读出放大器控制信号使能的至少一个读出放大器组。每个存储体中的读出放大器独立于地址解码逻辑进行控制。而是从标签RAM读取命中信息和读取地址数据生成每个存储体的读出放大器控制信号。优选地，一次启用不超过一组读出放大器，从而大大减少了高速缓冲存储器系统中的功耗。

38. 发明授权

US5809549A Burst SRAMs for use with a high speed clock 失效
标题翻译：突发SRAM用于高速时钟
公开(公告)号：US5809549A
公开(公告)日：1998-09-15
申请号：US801738
申请日：1997-02-14
申请人： Gary W. Thome , Michael J. Collins
发明人： Gary W. Thome , Michael J. Collins
IPC分类号： G06F13/42 , G11C7/10 , G11C7/22 , G11C8/18 , G06F13/28
CPC分类号： G11C8/18 , G06F13/4243 , G11C7/1018 , G11C7/22
摘要： Burst SRAMs designed for operation at a given data rate corresponding to the frequency of a first clock signal but capable of operation using a higher frequency clock signal. The burst SRAMs are preferably incorporated into the cache memory of a second level cache coupled to the processor bus in a computer system, where the computer system is preferably based on a 66-MHz P5 microprocessor. A cache controller, preferably incorporated within a memory controller, controls operation of the second level cache memory by providing the address load and address advance signals. The burst SRAMs are capable of recognizing the faster clock pulses, as well as the shorter pulses asserted on the address load and address advance signals. The address control signals are asserted and then negated during consecutive clock cycles of the faster clock signal, so that the burst SRAMs effectively operate at the same data rate corresponding to the lower frequency clock signal.
摘要翻译：突发SRAM被设计为以对应于第一时钟信号的频率但能够使用较高频率时钟信号操作的给定数据速率进行操作。突发SRAM优选地并入计算机系统中耦合到处理器总线的第二级高速缓冲存储器中，其中计算机系统优选地基于66MHz P5微处理器。优选地并入存储器控制器内的高速缓存控制器通过提供地址负载和地址提前信号来控制第二级高速缓冲存储器的操作。突发SRAM能够识别更快的时钟脉冲，以及在地址负载和地址提前信号上断言的较短脉冲。在更快的时钟信号的连续时钟周期期间，地址控制信号被断言然后被否定，使得脉冲串SRAM以与较低频率时钟信号对应的相同数据速率有效地工作。

39. 发明授权

US5581727A Hierarchical cache system flushing scheme based on monitoring and decoding processor bus cycles for flush/clear sequence control 失效
公开(公告)号：US5581727A
公开(公告)日：1996-12-03
申请号：US44379
申请日：1993-03-22
申请人： Michael J. Collins , Gary W. Thome
发明人： Michael J. Collins , Gary W. Thome
IPC分类号： G06F12/08
CPC分类号： G06F12/0804 , G06F12/0897
摘要： An apparatus for monitoring and decoding processor bus cycles and flushing a second level cache upon decoding a special flush acknowledge cycle. The CPU preferably includes an internal cache and a flush input for receiving a signal commanding the CPU to flush its internal cache. After flushing its cache by performing any necessary cycles to write back dirty data to main memory, the CPU performs a special flush acknowledge cycle to inform external devices that the flush procedure has been completed. A cache controller detects the flush acknowledge cycle and provides a flush signal to the second level cache. The cache controller then provides an end of cycle signal to the CPU to indicate that the flush cycle has been acknowledged.

40. 发明授权

US5403571A Purification of elemental sulphur 失效
标题翻译：元素硫的纯化
公开(公告)号：US5403571A
公开(公告)日：1995-04-04
申请号：US700149
申请日：1991-04-04
申请人： Michael E Chalkley , Michael J. Collins , Manher M. Makwana , Ian M. Masters
发明人： Michael E Chalkley , Michael J. Collins , Manher M. Makwana , Ian M. Masters
IPC分类号： C01B17/02 , C01G13/00
CPC分类号： C01B17/0232 , C01G13/00
摘要： A process for removing mercury or other metal impurities from elemental sulphur contaminated therewith includes mixing such elemental sulphur in a molten state with an aqueous sulphide solution or an aqueous solution of sufficiently high pH which reacts with elemental sulphur and forms a sulphide solution to cause extraction of mercury or other metal contaminants from the elemental sulphur into the aqueous sulphide solutions, and separating the aqueous sulphide solution containing mercury or other metal contaminants from the molten elemental sulphur to provide an elemental sulphur product substantially free from mercury and other metal contaminants.
摘要翻译： PCT No.PCT / CA90 / 00187 Sec。 371日期：1991年4月9日 102（e）日期1991年4月9日PCT Filed 1990年6月5日PCT公布。 WO90 / 15021 PCT出版物日期1990年12月13日。一种从被污染的元素硫中除去汞或其他金属杂质的方法包括将熔融状态的这种元素硫与硫化氢水溶液或足够高pH的水溶液混合，其与元素硫反应并形成一种硫化物溶液，用于将汞或其他金属污染物从元素硫提取到硫化氢水溶液中，以及将含有汞或其它金属污染物的硫化氢水溶液与熔融元素硫分离，以提供基本上不含汞的元素硫产物，其他金属污染物。

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