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    • 39. 发明授权
    • Power semiconductor device with a low on resistence
    • 具有低导通电阻的功率半导体器件
    • US08680608B2
    • 2014-03-25
    • US12862490
    • 2010-08-24
    • Wataru SaitoSyotaro OnoMunehisa YabuzakiNana HatanoMiho Watanabe
    • Wataru SaitoSyotaro OnoMunehisa YabuzakiNana HatanoMiho Watanabe
    • H01L29/78
    • H01L29/7802H01L29/0634H01L29/0649H01L29/0653H01L29/0873H01L29/0878H01L29/1095H01L29/7843
    • According to one embodiment, a power semiconductor device includes a second semiconductor layer of a first conductivity type and a third semiconductor layer of a second conductivity type periodically disposed repeatedly along a surface of the first semiconductor layer on a first semiconductor layer of the first conductivity type. A first main electrode is provided to electrically connect to the first semiconductor layer. A fourth semiconductor layer of the second conductivity type is provided to connect to the third semiconductor layer. Fifth semiconductor layers of the first conductivity type are selectively provided in the fourth semiconductor layer surface. A second main electrode is provided on a surface of the fourth and fifth semiconductor layers. A control electrode is provided on a surface of the fourth, fifth, and second semiconductor layers via a gate insulating film. First insulating films are provided by filling a trench made in the second semiconductor layer.
    • 根据一个实施例,功率半导体器件包括第一导电类型的第二半导体层和在第一导电类型的第一半导体层上沿着第一半导体层的表面周期性地重复设置的第二导电类型的第三半导体层 。 提供第一主电极以电连接到第一半导体层。 提供第二导电类型的第四半导体层以连接到第三半导体层。 在第四半导体层表面中选择性地设置第一导电类型的第五半导体层。 第二主电极设置在第四和第五半导体层的表面上。 控制电极经由栅极绝缘膜设置在第四,第五和第二半导体层的表面上。 通过填充在第二半导体层中制成的沟槽来提供第一绝缘膜。