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31. 发明申请

US20110049680A1 DUAL EXPOSURE TRACK ONLY PITCH SPLIT PROCESS 有权
标题翻译：双重接触跟踪只能分离分离过程
公开(公告)号：US20110049680A1
公开(公告)日：2011-03-03
申请号：US12551801
申请日：2009-09-01
申请人： Sean D. Burns , Matthew E. Colburn , Steven J. Holmes
发明人： Sean D. Burns , Matthew E. Colburn , Steven J. Holmes
IPC分类号： H01L29/06 , G03F7/20 , H01L21/461
CPC分类号： H01L21/31144 , G03F7/0035 , H01L21/0271 , H01L21/0338
摘要： An integrated circuit is formed with structures spaced more closely together than a transverse dimension of such structures, such as for making contacts to electronic elements formed at minimum lithographically resolvable dimensions by dark field split pitch techniques. Acceptable overlay accuracy and process efficiency and throughput for the split pitch process that requires etching of a hard mark for each of a plurality of sequentially applied and patterned resist layers is supported by performing the etching of the hard mask entirely within a lithography track through using an acid sensitive hard mark material and an acidic overcoat which contacts areas of the hard mask through patterned apertures in the resist. The contacted areas of the hard mask are activated for development by baking of the acidic overcoat.
摘要翻译：集成电路形成为具有比这种结构的横向尺寸更紧密地在一起的结构，例如用于通过暗场分割俯仰技术以最小可光滑分辨尺寸形成的电子元件的接触。对于需要蚀刻多个顺序施加的和图案化的抗蚀剂层中的每一个的硬标记的分割间距处理的可接受的覆盖精度和处理效率和处理量通过使用酸敏感的硬标记材料和通过抗蚀剂中的图案化孔接触硬掩模的区域的酸性外涂层。通过烘烤酸性外涂层来激活硬掩模的接触区域以进行显影。

32. 发明授权

US07883829B2 Lithography for pitch reduction 有权
标题翻译：减光平版印刷
公开(公告)号：US07883829B2
公开(公告)日：2011-02-08
申请号：US12184438
申请日：2008-08-01
申请人： Steven J. Holmes , Xuefeng Hua , Willard E. Conley
发明人： Steven J. Holmes , Xuefeng Hua , Willard E. Conley
IPC分类号： G03F7/00 , G03F7/20 , G03F7/40
CPC分类号： H01L21/0337 , H01L21/0338
摘要： In one embodiment, a photoresist is lithographically patterned to form an array of patterned photoresist portions having a pitch near twice a minimum feature size. Fluorine-containing polymer spacers are formed on sidewalls of the patterned photoresist portions. The pattern of the fluorine-containing polymer spacers is transferred into an underlying layer to form a pattern having a sublithographic pitch. In another embodiment, a first pattern in a first photoresist is transferred into a first ARC layer underneath to form first ARC portions. A planarizing second optically dense layer, a second ARC layer, and a second photoresist are applied over the first ARC portions. A second pattern in the second photoresist is transferred into the second ARC layer to form second ARC portions. The combination of the first ARC portions and second ARC portions function as an etch mask to pattern an underlying layer with a composite pattern having a sublithographic pitch.
摘要翻译：在一个实施例中，光刻胶被图案化以形成具有接近两倍最小特征尺寸的间距的图案化光致抗蚀剂部分的阵列。含氟聚合物间隔物形成在图案化的光致抗蚀剂部分的侧壁上。将含氟聚合物间隔物的图案转移到下层中以形成具有亚光刻间距的图案。在另一个实施例中，将第一光致抗蚀剂中的第一图案转移到下面的第一ARC层中以形成第一ARC部分。在第一ARC部分上施加平坦化的第二光致密层，第二ARC层和第二光致抗蚀剂。将第二光致抗蚀剂中的第二图案转移到第二ARC层中以形成第二ARC部分。第一ARC部分和第二ARC部分的组合用作蚀刻掩模，以用具有亚光刻间距的复合图案来图案化下面的层。

33. 发明授权

US07838943B2 Shared gate for conventional planar device and horizontal CNT 有权
标题翻译：常规平面器件和水平CNT的共用门
公开(公告)号：US07838943B2
公开(公告)日：2010-11-23
申请号：US11161146
申请日：2005-07-25
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Mark E. Masters
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Mark E. Masters
IPC分类号： H01L21/70
CPC分类号： H01L21/823412 , B01J23/74 , B01J37/0238 , B82Y10/00 , H01L21/7624 , H01L21/823437 , H01L27/286 , H01L51/0048 , H01L51/0545 , H01L51/055 , Y10S977/742 , Y10S977/762 , Y10S977/763
摘要： A semiconductor structure in which a planar semiconductor device and a horizontal carbon nanotube transistor have a shared gate and a method of fabricating the same are provided in the present application. The hybrid semiconductor structure includes at least one horizontal carbon nanotube transistor and at least one planar semiconductor device, in which the at least one horizontal carbon nanotube transistor and the at least one planar semiconductor device have a shared gate and the at least one horizontal carbon nanotube transistor is located above a gate of the at least one planar semiconductor device.
摘要翻译：在本申请中提供了其中平面半导体器件和水平碳纳米管晶体管具有共享栅极的半导体结构及其制造方法。所述混合半导体结构包括至少一个水平碳纳米管晶体管和至少一个平面半导体器件，其中所述至少一个水平碳纳米管晶体管和所述至少一个平面半导体器件具有共享栅极，并且所述至少一个水平碳纳米管晶体管位于至少一个平面半导体器件的栅极之上。

34. 发明授权

US07601205B2 Carbon nanotubes as low voltage field emission sources for particle precipitators 失效
标题翻译：碳纳米管作为颗粒除尘器的低电压场发射源
公开(公告)号：US07601205B2
公开(公告)日：2009-10-13
申请号：US12125442
申请日：2008-05-22
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
IPC分类号： B03C3/60
CPC分类号： B03C3/41 , B03C3/60 , B03C2201/10 , Y10S977/742
摘要： An air particle precipitator and a method of air filtration include a housing unit; a first conductor in the housing unit; a second conductor in the housing unit; and a carbon nanotube grown on the second conductor. Preferably, the first conductor is positioned opposite to the second conductor. The air particle precipitator further includes an electric field source adapted to apply an electric field to the housing unit. Moreover, the carbon nanotube is adapted to ionize gas in the housing unit, wherein the ionized gas charges gas particulates located in the housing unit, and wherein the first conductor is adapted to trap the charged gas particulates. The air particle precipitator may further include a metal layer over the carbon nanotube.
摘要翻译：空气颗粒除尘器和空气过滤方法包括壳体单元; 住房单元中的第一个导体; 壳体单元中的第二导体; 和在第二导体上生长的碳纳米管。优选地，第一导体与第二导体相对定位。空气粒子除尘器还包括适于向壳体单元施加电场的电场源。此外，碳纳米管适于使壳体单元中的气体电离，其中电离气体对位于壳体单元中的气体微粒进行充电，并且其中第一导体适于捕集带电气体微粒。空气粒子沉淀器还可以包括在碳纳米管上的金属层。

35. 发明申请

US20090184400A1 VIA GOUGING METHODS AND RELATED SEMICONDUCTOR STRUCTURE 有权
标题翻译：通过采用方法和相关半导体结构
公开(公告)号：US20090184400A1
公开(公告)日：2009-07-23
申请号：US12017141
申请日：2008-01-21
申请人： Shyng-Tsong Chen , Steven J. Holmes , David V. Horak , Takeshi Nogami , Shom Ponoth , Chih-Chao Yang
发明人： Shyng-Tsong Chen , Steven J. Holmes , David V. Horak , Takeshi Nogami , Shom Ponoth , Chih-Chao Yang
IPC分类号： H01L21/311 , H01L23/538
CPC分类号： H01L21/32139 , H01L21/31144 , H01L21/76805 , H01L21/76814 , H01L21/76831 , H01L23/5226 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Methods for via gouging and a related semiconductor structure are disclosed. In one embodiment, the method includes forming a via opening in a dielectric material, the via opening aligned with a conductor; forming a protective coating over the dielectric material and in the via opening; performing via gouging; and removing the protective coating over horizontal surfaces of the dielectric material. A semiconductor structure may include a via having an interface with a conductor, the interface including a three-dimensionally shaped region extending into and past a surface of the conductor, wherein an outer edge of the three-dimensionally shaped region is distanced from an outermost surface of the via.
摘要翻译：公开了通孔沟槽的方法和相关的半导体结构。在一个实施例中，该方法包括在电介质材料中形成通孔，通孔与导体对准; 在介电材料和通孔开口上形成保护涂层; 通过刨花进行; 并且在电介质材料的水平表面上去除保护涂层。半导体结构可以包括与导体具有界面的通孔，所述界面包括延伸到导体表面中并经过导体表面的三维成形区域，其中三维成形区域的外边缘与最外表面的通道。

36. 发明授权

US07528494B2 Accessible chip stack and process of manufacturing thereof 有权
标题翻译：无障碍芯片堆栈及其制造工艺
公开(公告)号：US07528494B2
公开(公告)日：2009-05-05
申请号：US11266456
申请日：2005-11-03
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L21/00 , H01L21/4763
CPC分类号： H01L29/40 , H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2224/32145 , H01L2224/9202 , H01L2225/06513 , H01L2225/06541 , H01L2225/06596 , H01L2924/0002
摘要： A process of manufacturing a three-dimensional integrated circuit chip or wafer assembly and, more particularly, a processing of chips while arranged on a wafer prior to orienting the chips into stacks. Also disclosed is the manufacture of the three-dimensional integrated circuit wherein the chip density can be very high and processed while the wafers are still intact and generally of planar constructions.
摘要翻译：制造三维集成电路芯片或晶片组件的过程，更具体地说，在将芯片定向成堆叠之前，将其布置在晶片上的处理。还公开了三维集成电路的制造，其中芯片密度可以非常高并且在晶片仍然完整且通常为平面结构的情况下被处理。

37. 发明授权

US07504314B2 Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom 失效
标题翻译：在绝缘型半导体上形成氧注入硅的方法和由其形成的半导体
公开(公告)号：US07504314B2
公开(公告)日：2009-03-17
申请号：US10907565
申请日：2005-04-06
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Larry A. Nesbit
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Larry A. Nesbit
IPC分类号： H01L29/93 , H01L21/76
CPC分类号： H01L21/76267 , H01L21/76243 , H01L21/76281 , H01L21/76283
摘要： The invention relates generally to a method for fabricating oxygen-implanted semiconductors, and more particularly to a method for fabricating oxygen-implanted silicon-on-insulation (“SOI”) type semiconductors by cutting-up regions into device-sized pieces prior to the SOI-oxidation process. The process sequence to make SOI is modified so that the implant dose may be reduced and relatively long and high temperature annealing process steps may be shortened or eliminated. This simplification may be achieved if, after oxygen implant, the wafer structure is sent to pad formation, and masking and etching. After the etching, annealing or oxidation process steps may be performed to create the SOI wafer.
摘要翻译：本发明一般涉及一种用于制造氧注入半导体的方法，更具体地说，涉及一种用于将氧注入的硅绝缘（“SOI”）型半导体通过切割区域制造成器件尺寸的片之前的方法 SOI氧化工艺。制造SOI的工艺顺序被修改，使得可以减少注入剂量并且相对较长并且可以缩短或消除高温退火工艺步骤。如果在氧注入之后将晶片结构发送到焊盘形成以及掩模和蚀刻，则可以实现这种简化。在蚀刻之后，可以执行退火或氧化工艺步骤以产生SOI晶片。

38. 发明授权

US07491631B2 Method of doping a gate electrode of a field effect transistor 失效
标题翻译：掺杂场效应晶体管的栅电极的方法
公开(公告)号：US07491631B2
公开(公告)日：2009-02-17
申请号：US11757660
申请日：2007-06-04
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
IPC分类号： H01L21/425
CPC分类号： H01L29/4983 , H01L29/4908 , H01L29/6656 , H01L29/6659 , H01L29/66772 , H01L29/7833 , H01L29/78621 , Y10S977/742 , Y10S977/847
摘要： A method of fabricating a structure and fabricating related semiconductor transistors and novel semiconductor transistor structures. The method of fabricating the structure includes: providing a substrate having a top surface; forming an island on the top surface of the substrate, a top surface of the island parallel to the top surface of the substrate, a sidewall of the island extending between the top surface of the island and the top surface of the substrate; forming a plurality of carbon nanotubes on the sidewall of the island; and performing an ion implantation, the ion implantation penetrating into the island and blocked from penetrating into the substrate in regions of the substrate masked by the island and the carbon nanotubes.
摘要翻译：一种制造结构并制造相关半导体晶体管和新型半导体晶体管结构的方法。制造该结构的方法包括：提供具有顶表面的基底; 在所述基板的顶表面上形成岛，所述岛的顶表面平行于所述基底的顶表面，所述岛的侧壁在所述岛的顶表面和所述基底的顶表面之间延伸; 在岛的侧壁上形成多个碳纳米管; 并且进行离子注入，所述离子注入在所述岛状体和所述碳纳米管所掩盖的基板的区域中贯穿所述岛并阻止其侵入所述基板。

39. 发明申请

US20080286466A1 CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES 失效
标题翻译：包含化学改性碳纳米管结构的化学和颗粒过滤器
公开(公告)号：US20080286466A1
公开(公告)日：2008-11-20
申请号：US12166865
申请日：2008-07-02
申请人： Steven J. Holmes , Mark C. Hakey , David V. Horak , James G. Ryan
发明人： Steven J. Holmes , Mark C. Hakey , David V. Horak , James G. Ryan
IPC分类号： B05D5/02
CPC分类号： B01D53/02 , B01D2253/102 , B01D2253/304 , B01J20/20 , B01J20/205 , B01J20/3242 , B82Y30/00 , Y10S55/05 , Y10S977/742 , Y10S977/745 , Y10S977/748 , Y10S977/75 , Y10S977/752
摘要： A carbon nanotube filter, a use for a carbon nanotube filter and a method of forming a carbon nanotube filter. The method including (a) providing a carbon source and a carbon nanotube catalyst; (b) growing carbon nanotubes by reacting the carbon source with the nanotube catalyst; (c) forming chemically active carbon nanotubes by forming a chemically active layer on the carbon nanotubes or forming chemically reactive groups on sidewalls of the carbon nanotubes; and (d) placing the chemically active nanotubes in a filter housing.
摘要翻译：碳纳米管过滤器，碳纳米管过滤器的用途和形成碳纳米管过滤器的方法。该方法包括（a）提供碳源和碳纳米管催化剂; （b）使碳源与纳米管催化剂反应生长碳纳米管; （c）通过在碳纳米管上形成化学活性层或在碳纳米管的侧壁上形成化学反应性基团形成化学活性碳纳米管; 和（d）将化学活性纳米管放置在过滤器壳体中。

40. 发明申请

US20080284992A1 EXPOSURES SYSTEM INCLUDING CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES 失效
标题翻译：含有化学改性碳纳米管结构的化学和颗粒过滤器的显示系统
公开(公告)号：US20080284992A1
公开(公告)日：2008-11-20
申请号：US12168183
申请日：2008-07-07
申请人： Steven J. Holmes , Mark C. Hakey , David V. Horak , James G. Ryan
发明人： Steven J. Holmes , Mark C. Hakey , David V. Horak , James G. Ryan
IPC分类号： G03B27/52
CPC分类号： B01D53/02 , B01D2253/102 , B01D2253/304 , B01J20/20 , B01J20/205 , B01J20/3242 , B82Y30/00 , Y10S55/05 , Y10S977/742 , Y10S977/745 , Y10S977/748 , Y10S977/75 , Y10S977/752
摘要： An exposure system for exposing a photoresist layer on a top surface of a wafer to light. The exposure system including: an environment chamber containing a light source, one or more focusing lenses, a mask holder, a slit and a wafer stage, the light source, all aligned to an optical axis, the wafer stage moveable in two different orthogonal directions orthogonal to the optical axis, the mask holder and the slit moveable in one of the two orthogonal directions; a filter in a sidewall of the environment chamber, the filter including: a filter housing containing chemically active carbon nanotubes, the chemically active carbon nanotubes comprising a chemically active layer formed on carbon nanotubes or comprising chemically reactive groups on sidewalls of the carbon nanotubes; and means for forcing air or inert gas first through the filter then into the environment chamber and then out of the environment chamber.
摘要翻译：一种用于将晶片顶表面上的光致抗蚀剂层曝光的曝光系统。所述曝光系统包括：包含光源，一个或多个聚焦透镜，掩模支架，狭缝和晶片台的环境室，所述光源均与光轴对齐，所述晶片台可沿两个不同的正交方向移动与所述光轴正交，所述掩模支架和所述狭缝能够在两个正交方向中的一个方向上移动; 所述过滤器包括：包含化学活性碳纳米管的过滤器壳体，所述化学活性碳纳米管包含在碳纳米管上形成的化学活性层或在碳纳米管的侧壁上包含化学反应性基团; 以及首先通过过滤器将空气或惰性气体强制进入环境室然后离开环境室的装置。

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