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    • 36. 发明申请
    • CONTROL VALVE FOR VARIABLE DISPLACEMENT COMPRESSOR
    • 可变位移压缩机的控制阀
    • US20100068074A1
    • 2010-03-18
    • US12516621
    • 2007-11-29
    • Koichi ShimadaTakashi Kobayashi
    • Koichi ShimadaTakashi Kobayashi
    • F04B49/22
    • F04B27/1804F04B2027/1827F04B2027/1831F04B2027/1854
    • A control valve is configured such that as a position of a high pressure-side valve body positioned by a solenoid is closer to one side, a degree of opening for communication of a high pressure valve portion is more widened and a pressure on the side of a discharge flow path acting on the high pressure-side valve body is weakened. Further, the control valve is configured such that as a position of a low pressure-side valve body positioned by the solenoid is closer to the other side, a degree of opening for communication of a low pressure valve portion is more widened. When the high pressure-side valve body and the low pressure-side valve body are integrally positioned on the one side by the solenoid and the low pressure-side valve body is positioned on the other side by the solenoid, the high pressure-side valve body and the low pressure-side valve body are separated from each other.
    • 控制阀被构造成使得当由螺线管定位的高压侧阀体的位置更靠近一侧时,高压阀部分的连通的开度更加扩大,并且在侧面的压力 作用在高压侧阀体上的排出流路变弱。 此外,控制阀被构造成使得当由螺线管定位的低压侧阀体的位置更靠近另一侧时,低压阀部分的连通的开度更大。 当高压侧阀体和低压侧阀体通过螺线管一体地定位在一侧时,低压侧阀体由螺线管位于另一侧时,高压侧阀 主体和低压侧阀体彼此分离。
    • 39. 发明授权
    • Nonvolatile semiconductor memory devices and the fabrication process of them
    • 非易失性半导体存储器件及其制造工艺
    • US07585726B2
    • 2009-09-08
    • US11350118
    • 2006-02-09
    • Yoshitaka SasagoTakashi Kobayashi
    • Yoshitaka SasagoTakashi Kobayashi
    • H01L21/336
    • H01L27/11521G11C16/0425H01L27/115
    • The present invention enables to avoid a reduction in coupling ratio in a nonvolatile semiconductor memory device. The reduction is coupling ratio is caused due to difficulties in batch forming of a control gate material, an interpoly dielectric film material, and a floating gate material, the difficulties accompanying a reduction in word line width. Further, the invention enables to avoid damage caused in the batch forming on a gate oxide film. Before forming floating gates of memory cells of a nonvolatile memory, a space enclosed by insulating layers is formed for each of the floating gates of the memory cells, so that the floating gate is buried in the space. This structure is realized by processing the floating gates in a self alignment manner after depositing the floating gate material. Therefore, it is unnecessary to perform the batch forming of the control gate material, the interpoly dielectric film material, and the floating gate material in the case of processing the control gates, thereby ensuring adequate interpoly dielectric film capacitance.
    • 本发明能够避免非易失性半导体存储器件中的耦合比的降低。 由于控制栅极材料,间隔电介质膜材料和浮栅材料的分批形成的困难而引起的还原是耦合比,伴随着字线宽度的减小。 此外,本发明能够避免在栅极氧化膜上的批次形成中引起的损坏。 在形成非易失性存储器的存储单元的浮动栅极之前,为存储单元的每个浮置栅极形成由绝缘层包围的空间,使得浮动栅极被埋在空间中。 通过在浮置栅极材料沉积之后以自对准方式处理浮置栅极来实现该结构。 因此,在处理控制栅极的情况下,不需要执行控制栅极材料,多晶硅介电膜材料和浮置栅极材料的批量形成,从而确保足够的多层介电膜电容。
    • 40. 发明申请
    • METHOD OF FABRICATING PIEZOELECTRIC VIBRATING PIECE, PIEZOELECTRIC VIBRATING PIECE, WAFER, PIEZOELECTRIC VIBRATOR, OSCILLATOR, ELECTRONIC APPARATUS AND RADIOWAVE TIMEPIECE
    • 制造压电振动片,压电振动片,波形,压电振动器,振荡器,电子装置和放射线计时器的方法
    • US20090205178A1
    • 2009-08-20
    • US12360424
    • 2009-01-27
    • Takashi Kobayashi
    • Takashi Kobayashi
    • H01L41/22G01R29/22
    • H03H9/21H03H3/02H03H3/04H03H9/1021H03H2003/026H03H2003/0442Y10T29/42Y10T29/49147Y10T29/49155Y10T29/49798
    • To carry out frequency adjustment easily, accurately and efficiently and achieve low cost formation and promotion of maintenance performance without being influenced by a size of a piezoelectric vibrating piece, there is provided a method of fabricating a piezoelectric vibrating piece which is a method of fabricating a piezoelectric vibrating pieces having a piezoelectric plate 11, a pair of exciting electrodes 12, 13, and a pair of mount electrodes electrodes 15, 16 by utilizing a wafer S, the method including an outer shape forming step of forming a frame portion S1 at the wafer and forming a plurality of piezoelectric plates to be connected to the frame portion by way of a connecting portion 11a, an electrode forming step of respectively forming pairs of exciting electrodes and pairs of mount electrodes to the plurality of piezoelectric plates and forming a plurality of pairs of extended electrodes S2, S3 to be respectively electrically connected to the pairs of mount electrodes by way of the connecting portion, a frequency adjusting step of adjusting a frequency of the piezoelectric plate while applying a drive voltage between the pair of the extended electrodes, and a cutting step of fragmenting the plurality of piezoelectric plates.
    • 为了容易地,准确和有效地进行频率调整,并且不受压电振动片的尺寸的影响而实现低成本形成和维护性能的提高,提供了一种制造压电振动片的方法,该方法是制造 通过利用晶片S,具有压电板11,一对激励电极12,13和一对安装电极电极15,16的压电振动片,该方法包括:外形形成步骤,用于在 并且通过连接部分11a形成多个压电板以连接到框架部分;电极形成步骤,分别将多个激励电极和一对安装电极形成在多个压电板上,并形成多个压电板 一对延伸电极S2,S3分别电连接到这对安装电极 连接部分的方式,频率调节步骤,在施加一对延伸电极之间的驱动电压的同时调节压电板的频率,以及分割多个压电板的切割步骤。