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31. 发明申请

US20100123180A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100123180A1
公开(公告)日：2010-05-20
申请号：US12564605
申请日：2009-09-22
申请人： Kensuke TAKANO , Yoshio Ozawa , Katsuyuki Sekine , Masaru Kito
发明人： Kensuke TAKANO , Yoshio Ozawa , Katsuyuki Sekine , Masaru Kito
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11521 , H01L27/11551 , H01L27/11556 , H01L29/1037 , H01L29/42332 , H01L29/7881
摘要： A nonvolatile semiconductor memory device includes a semiconductor layer as a channel, a conductive layer which is formed on a surface of the semiconductor layer with a first insulating layer and a second insulating layer interposed therebetween and functions as a control gate electrode; and a plurality of first charge storage layers formed between the first insulating layer and the second insulating layer. The plurality of first charge storage layers are formed in isolation from one another along a surface of the first insulating layer. The first insulating layer is formed so as to protrude towards the semiconductor layer at a position where each of the first charge storage layers is formed.
摘要翻译：非易失性半导体存储器件包括作为沟道的半导体层，在半导体层的表面上形成有第一绝缘层和介于其间的第二绝缘层的导电层，用作控制栅电极; 以及形成在所述第一绝缘层和所述第二绝缘层之间的多个第一电荷存储层。多个第一电荷存储层沿着第一绝缘层的表面彼此隔离地形成。第一绝缘层形成为在形成有第一电荷存储层的位置处向半导体层突出。

32. 发明授权

US07714373B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07714373B2
公开(公告)日：2010-05-11
申请号：US11822437
申请日：2007-07-05
申请人： Katsuaki Natori , Masayuki Tanaka , Katsuyuki Sekine , Hirokazu Ishida , Masumi Matsuzaki , Yoshio Ozawa
发明人： Katsuaki Natori , Masayuki Tanaka , Katsuyuki Sekine , Hirokazu Ishida , Masumi Matsuzaki , Yoshio Ozawa
IPC分类号： H01L29/788
CPC分类号： H01L27/115 , H01L27/11521
摘要： There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfxAl1-xOy film (0.8≦x≦0.95) formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the memory cell transistors are arrayed to form a memory cell array.
摘要翻译：公开了一种包括多个存储单元晶体管的半导体器件，每个存储单元晶体管包括通过每个存储单元晶体管的隔离绝缘膜彼此隔离的浮栅，包括Hf x Al 1-x O y膜的电极间绝缘膜（形成在浮置栅电极上的栅极电极，以及形成在电极间绝缘膜上的控制栅电极，其中存储单元晶体管被排列以形成存储单元阵列。

33. 发明授权

US07682899B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07682899B2
公开(公告)日：2010-03-23
申请号：US11727536
申请日：2007-03-27
申请人： Katsuaki Natori , Masayuki Tanaka , Akihito Yamamoto , Katsuyuki Sekine , Ryota Fujitsuka , Daisuke Nishida , Yoshio Ozawa
发明人： Katsuaki Natori , Masayuki Tanaka , Akihito Yamamoto , Katsuyuki Sekine , Ryota Fujitsuka , Daisuke Nishida , Yoshio Ozawa
IPC分类号： H01L21/336
CPC分类号： H01L27/11568 , H01L27/115 , H01L27/11521
摘要： A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, wherein forming the second insulating film comprises forming an insulating film containing silicon using source gas not containing chlorine, and forming an insulating film containing oxygen and a metal element on the insulating film containing silicon.
摘要翻译：一种制造半导体器件的方法，包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极其中，形成所述第二绝缘膜包括使用不含氯的源气体形成含硅的绝缘膜，以及在含有硅的绝缘膜上形成含有氧和金属元素的绝缘膜。

34. 发明申请

US20100041206A1 METHOD OF MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：US20100041206A1
公开(公告)日：2010-02-18
申请号：US12540663
申请日：2009-08-13
申请人： Ryota Fujitsuka , Katsuyuki Sekine , Yoshio Ozawa
发明人： Ryota Fujitsuka , Katsuyuki Sekine , Yoshio Ozawa
IPC分类号： H01L21/8246 , H01L21/336 , H01L21/762
CPC分类号： H01L27/11568 , H01L29/66833 , H01L29/792
摘要： According to a method of manufacturing a MONOS nonvolatile semiconductor memory device, a tunnel insulating film, a charge storage layer, a block insulating film containing a metal oxide and a control gate electrode are stacked on a semiconductor substrate. Heat treatment is carried out in an atmosphere containing an oxidizing gas after the tunnel insulating film, the charge storage layer and the block insulating film are stacked on the semiconductor substrate. Thereafter, the control gate electrode is formed on the block insulating film.
摘要翻译：根据制造MONOS非易失性半导体存储器件的方法，在半导体衬底上层叠隧道绝缘膜，电荷存储层，含有金属氧化物的块绝缘膜和控制栅电极。在隧道绝缘膜，电荷存储层和块绝缘膜堆叠在半导体衬底上之后，在含有氧化性气体的气氛中进行热处理。此后，控制栅电极形成在块绝缘膜上。

35. 发明授权

US07651930B2 Method of manufacturing semiconductor storage device 有权
标题翻译：制造半导体存储装置的方法
公开(公告)号：US07651930B2
公开(公告)日：2010-01-26
申请号：US12146802
申请日：2008-06-26
申请人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
发明人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
IPC分类号： H01L21/20
CPC分类号： H01L27/115 , H01L21/76264 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203 , H01L29/66825
摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
摘要翻译：一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在开口部。然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。然后，在硅单晶层上形成存储单元阵列。

36. 发明授权

US07635891B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07635891B2
公开(公告)日：2009-12-22
申请号：US11946606
申请日：2007-11-28
申请人： Katsuaki Natori , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka , Masayuki Tanaka , Kazuaki Nakajima , Yoshio Ozawa , Akihito Yamamoto
发明人： Katsuaki Natori , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka , Masayuki Tanaka , Kazuaki Nakajima , Yoshio Ozawa , Akihito Yamamoto
IPC分类号： H01L27/115
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/513 , H01L29/7881
摘要： A semiconductor device includes a semiconductor substrate, and a memory cell array provided on the semiconductor substrate and including a plurality of memory cells arranged on the semiconductor substrate, each of the plurality of the memory cells including a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer, and a control electrode containing metal or metal silicide provided on the charge storage layer via the second insulating film, wherein a corner of a lower part of the control electrode includes semiconductor and fails to contain the metal or the metal silicide in a channel width direction view of the memory cell.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底上并且包括布置在半导体衬底上的多个存储单元的存储单元阵列，多个存储单元中的每一个包括设置在半导体衬底上的第一绝缘膜，设置在所述第一绝缘膜上的电荷存储层，设置在所述电荷存储层上的第二绝缘膜，以及经由所述第二绝缘膜设置在所述电荷存储层上的含有金属或金属硅化物的控制电极，的控制电极包括半导体，并且在存储单元的沟道宽度方向视图中不能容纳金属或金属硅化物。

37. 发明申请

US20090001448A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20090001448A1
公开(公告)日：2009-01-01
申请号：US12118328
申请日：2008-05-09
申请人： Katsuyuki Sekine , Masayuki Tanaka , Katsuaki Natori , Daisuke Nishida , Ryota Fujitsuka , Yoshio Ozawa , Akihito Yamamoto
发明人： Katsuyuki Sekine , Masayuki Tanaka , Katsuaki Natori , Daisuke Nishida , Ryota Fujitsuka , Yoshio Ozawa , Akihito Yamamoto
IPC分类号： H01L29/00 , H01L21/3205
CPC分类号： H01L21/3105 , H01L21/02126 , H01L21/0228 , H01L21/02337 , H01L21/3141 , H01L21/31612 , H01L27/115 , H01L27/11521 , H01L29/40114 , H01L29/42324
摘要： A semiconductor memory device having a cell size of 60 nm or less includes a tunnel insulation film formed in a channel region of a silicon substrate containing a burying insulation film, a first conductive layer formed on the tunnel insulation film, an inter-electrode insulation film formed on the burying insulation film and the first conductive layer, a second conductive layer formed on the inter-electrode insulation film, a side wall insulation film formed on the side walls of the first conductive layer, the second conductive layer, and the inter-electrode insulation film, and an inter-layer insulation film formed on the side wall insulation film. The tunnel insulation film or the inter-electrode insulation film contains a high-dielectric insulation film. The side wall insulation film contains a predetermined concentration of carbon and nitrogen as well as chlorine having a concentration of 1×1019 atoms/cm3 or less.
摘要翻译：具有60nm以下的单元尺寸的半导体存储器件包括形成在包含掩埋绝缘膜的硅衬底的沟道区域中的隧道绝缘膜，形成在隧道绝缘膜上的第一导电层，电极间绝缘膜形成在掩埋绝缘膜和第一导电层上的第二导电层，形成在电极间绝缘膜上的第二导电层，形成在第一导电层，第二导电层和第二导电层的侧壁上的侧壁绝缘膜，电极绝缘膜和形成在侧壁绝缘膜上的层间绝缘膜。隧道绝缘膜或电极间绝缘膜包含高介电绝缘膜。侧壁绝缘膜含有预定浓度的碳氮，以及浓度为1×1019原子/ cm3以下的氯。

38. 发明申请

US20070284652A1 Semiconductor memory device 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20070284652A1
公开(公告)日：2007-12-13
申请号：US11783141
申请日：2007-04-06
申请人： Takuya Kobayashi , Katsuyuki Sekine , Yoshio Ozawa , Masayuki Tanaka
发明人： Takuya Kobayashi , Katsuyuki Sekine , Yoshio Ozawa , Masayuki Tanaka
IPC分类号： H01L29/792
CPC分类号： H01L29/513 , H01L29/40117 , H01L29/517
摘要： A semiconductor memory device capable of suppressing detrapping of stored charges from a charge storage dielectric is disclosed. According to one aspect of the present invention, there is provided a semiconductor memory device comprising a semiconductor substrate, a blocking dielectric disposed on the semiconductor substrate a charge storage dielectric disposed on the blocking dielectric to store holes, a hole conductive dielectric disposed on the charge storage dielectric, and a gate electrode disposed on the hole conductive dielectric.
摘要翻译：公开了能够抑制存储电荷从电荷存储电介质中去除的半导体存储器件。根据本发明的一个方面，提供了一种半导体存储器件，其包括半导体衬底，设置在半导体衬底上的阻挡电介质，设置在阻挡电介质上以存储孔的电荷存储电介质，设置在电荷上的导电电介质存储电介质和设置在导电电介质上的栅电极。

39. 发明授权

US08450715B2 Nonvolatile metal oxide memory element and nonvolatile memory device 有权
标题翻译：非挥发性金属氧化物存储元件和非易失性存储器件
公开(公告)号：US08450715B2
公开(公告)日：2013-05-28
申请号：US12884000
申请日：2010-09-16
申请人： Kensuke Takano , Katsuyuki Sekine , Yoshio Ozawa , Ryota Fujitsuka , Mitsuru Sato
发明人： Kensuke Takano , Katsuyuki Sekine , Yoshio Ozawa , Ryota Fujitsuka , Mitsuru Sato
IPC分类号： H01L45/00
CPC分类号： H01L45/08 , G11C13/0007 , G11C2213/32 , G11C2213/71 , G11C2213/72 , H01L27/2409 , H01L27/2481 , H01L45/1233 , H01L45/146 , H01L45/1616 , H01L45/1625 , H01L45/165 , H01L45/1675
摘要： According to one embodiment, a nonvolatile memory device includes a plurality of nonvolatile memory elements each of that includes a resistance change film. The resistance change film is capable of recording information by transitioning between a plurality of states having different resistances in response to at least one of a voltage applied to the resistance change film or a current passed through the resistance change film, and the resistance change film includes an oxide containing at least one element selected from the group consisting of Hf, Zr, Ni, Ta, W, Co, Al, Fe, Mn, Cr, and Nb. An impurity element contained in the resistance change film is at least one element selected from the group consisting of Mg, Ca, Sr, Ba, Sc, Y, La, V, Ta, B, Ga, In, Tl, C, Si, Ge, Sn, Pb, N, P, As, Sb, Bi, S, Se, and Te, and the impurity element has an absolute value of standard Gibbs energy of oxide formation larger than an absolute value of standard Gibbs energy of oxide formation of the element contained in the oxide.
摘要翻译：根据一个实施例，非易失性存储器件包括多个非易失性存储元件，每个非易失性存储元件包括电阻变化膜。电阻变化膜能够响应于施加到电阻变化膜的电压或通过电阻变化膜的电流中的至少一个而在具有不同电阻的多个状态之间进行转换来记录信息，并且电阻变化膜包括包含选自Hf，Zr，Ni，Ta，W，Co，Al，Fe，Mn，Cr和Nb中的至少一种元素的氧化物。包含在电阻变化膜中的杂质元素是选自Mg，Ca，Sr，Ba，Sc，Y，La，V，Ta，B，Ga，In，Tl，C，Si中的至少一种元素， Ge，Sn，Pb，N，P，As，Sb，Bi，S，Se和Te，并且杂质元素的氧化物形成的标准吉布斯能量的绝对值大于氧化物形成的标准吉布斯能量的绝对值的氧化物中所含的元素。

40. 发明授权

US08411486B2 Nonvolatile memory device and method of manufacturing the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US08411486B2
公开(公告)日：2013-04-02
申请号：US12823467
申请日：2010-06-25
申请人： Katsuyuki Sekine , Ryota Fujitsuka , Yoshio Ozawa
发明人： Katsuyuki Sekine , Ryota Fujitsuka , Yoshio Ozawa
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/005 , G11C11/5685 , G11C13/0007 , G11C13/0064 , G11C2013/0083 , G11C2213/32 , G11C2213/34 , G11C2213/72 , H01L27/101
摘要： According to one embodiment, there is provided a method of manufacturing a nonvolatile memory device. In this method, a first voltage may be applied to a variable resistive element having a resistance value which is electrically rewritable in a high resistance and in a low resistance. In this method, a second voltage may be applied to the variable resistive element in a case where the resistance value of the variable resistive element to which the first voltage has been applied is greater than a resistance value of the low resistance and is not greater than a resistance value of the high resistance. Further, in this method, the applying of the second voltage to the variable resistive element may be repeated until the resistance value of the variable resistive element to which the second voltage has been applied falls within a range of the resistance value of the low resistance.
摘要翻译：根据一个实施例，提供了一种制造非易失性存储器件的方法。在该方法中，可以将第一电压施加到具有电阻可变的电阻值的高电阻和低电阻的可变电阻元件。在该方法中，在施加了第一电压的可变电阻元件的电阻值大于低电阻的电阻值的情况下，可以向可变电阻元件施加第二电压，并且不大于电阻值为高电阻。此外，在该方法中，可以重复向可变电阻元件施加第二电压，直到施加了第二电压的可变电阻元件的电阻值落在低电阻的电阻值的范围内。

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