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31. 发明授权

US4764822A Method for recording cue signal 失效
标题翻译：记录提示信号的方法
公开(公告)号：US4764822A
公开(公告)日：1988-08-16
申请号：US842174
申请日：1986-03-21
申请人： Hiroshi Taniguchi , Mitsunobu Furumoto , Kanji Kubo
发明人： Hiroshi Taniguchi , Mitsunobu Furumoto , Kanji Kubo
IPC分类号： G11B15/087 , G11B27/032 , G11B27/036 , G11B27/30 , G11B5/09 , G11B15/18
CPC分类号： G11B15/087 , G11B27/036 , G11B27/3018 , G11B2220/90 , G11B2220/913 , G11B27/032
摘要： The present invention relates to a cue signal recording method in which multi-audio tracks are formed by dividing a magnetic tape in a widthwise direction, and PCM data is recorded in a scanning track segment of an audio track of the multi-audio tracks by a helically scanning rotary head. A cue signal is then recorded in a remaining area of the scanning track segment except for the area recorded with the PCM data, such as in the after-recording-margin area or the track-guard area which is immediately after the PCM data area.
摘要翻译：本发明涉及一种提示信号记录方法，其中通过在宽度方向上分割磁带形成多声道，并且PCM数据被记录在多声道的音轨的扫描轨道段中螺旋扫描旋转头。然后，将记录信号再记录在扫描轨道段的剩余区域中，除了记录在PCM数据的区域之外，例如在PCM数据区之后的后记录边缘区域或轨道保护区域中。

32. 发明授权

US4618926A Buffer storage control system 失效
标题翻译：缓冲存储控制系统
公开(公告)号：US4618926A
公开(公告)日：1986-10-21
申请号：US518698
申请日：1983-07-29
申请人： Kanji Kubo , Kenichi Wada , Yooichi Shintani
发明人： Kanji Kubo , Kenichi Wada , Yooichi Shintani
IPC分类号： G06F9/38 , G06F12/08 , G06F12/10 , G11C9/06
CPC分类号： G06F12/0846 , G06F12/0848
摘要： In a storage hierarchy system, a part of data stored in a main storage in held as a copy by a buffer storage of a smaller capacity and higher speed than the main storage. A processor fetches data from the buffer storage or stores data in the buffer storage at a high speed. A buffer storage control system includes a first buffer directory and a second buffer directory. The first buffer directory and the buffer storage are accessed by an address for a fetch request, while the second buffer directory and the buffer storage are accessed by an address for store request, whereby competition for the access to the buffer storage between the fetch and store operations is reduced.
摘要翻译：在存储分层系统中，存储在主存储器中的数据的一部分被保存为比主存储器更小容量和更高速度的缓冲存储器作为副本。处理器从缓冲存储器中取出数据或以高速将数据存储在缓冲存储器中。缓冲存储控制系统包括第一缓冲目录和第二缓冲目录。第一缓冲器目录和缓冲存储器由用于获取请求的地址访问，而第二缓冲器目录和缓冲存储器被存储请求的地址访问，由此在获取和存储之间访问缓冲存储器的竞争操作减少。

33. 发明授权

US4580214A Memory control system 失效
标题翻译：内存控制系统
公开(公告)号：US4580214A
公开(公告)日：1986-04-01
申请号：US460807
申请日：1983-01-25
申请人： Kanji Kubo , Noriaki Hashimoto
发明人： Kanji Kubo , Noriaki Hashimoto
IPC分类号： G06F9/34 , G06F12/04 , G06F12/06 , G06F12/08 , G06F9/36
CPC分类号： G06F9/3816 , G06F12/04 , G06F12/08
摘要： The present memory control system fetches data blocks from memories, fetches data corresponding to the unit of processing in the execution unit from the data blocks, and transfers the data to the execution unit. Data blocks fetched from the memories are held in first hold device. The data blocks held in the first hold device are transferred to second hold device via gate. The gate selectively transfers all or a part of data in data blocks held by the first hold device to the second hold device. When a part of data held in the first hold device is transferred, the second hold device forms data blocks by using the data previously held and the data newly transferred from the first hold device. A data fetch device fetches the data corresponding to the unit length of data processing in the execution unit from the data blocks held in said second hold device and transfers the data to said execution unit.
摘要翻译：本存储器控制系统从存储器中取出数据块，从数据块中取出与执行单元中的处理单元对应的数据，并将数据传送到执行单元。从存储器取出的数据块被保持在第一保持装置中。保持在第一保持装置中的数据块经由门被传送到第二保持装置。门选择性地将由第一保持装置保持的数据块中的数据的全部或一部分传送到第二保持装置。当保持在第一保持装置中的数据的一部分被传送时，第二保持装置通过使用先前保存的数据和从第一保持装置新传送的数据来形成数据块。数据提取装置从保持在所述第二保持装置中的数据块中取出与执行单元中的数据处理的单位长度相对应的数据，并将数据传送到所述执行单元。

34. 发明授权

US4565389A Vehicle suspension system 失效
标题翻译：车辆悬挂系统
公开(公告)号：US4565389A
公开(公告)日：1986-01-21
申请号：US554515
申请日：1983-11-23
申请人： Yozo Kami , Masaaki Minakawa , Kanji Kubo
发明人： Yozo Kami , Masaaki Minakawa , Kanji Kubo
IPC分类号： B60G21/055 , B60G3/00
CPC分类号： B60G21/055
摘要： A vehicle suspension system comprising a knuckle arm supporting a wheel, upper and lower arms connecting the knuckle arm to a frame of a vehicle body, and a radius rod and a stabilizer each having an end attached to the lower arm in the vicinity of an end thereof connected to the knuckle arm. The lower arm has an attachment aperture defined therethrough substantially longitudinally of the vehicle body. Either the radius rod or the stabilizer is coupled to one of upper and lower surfaces of the lower arm, the other being inserted in the attachment aperture and coupled to the lower arm therein.
摘要翻译：一种车辆悬架系统，包括支撑车轮的转向节臂，将转向节臂连接到车体的框架的上臂和下臂，以及在端部附近具有附接到下臂的一端的半径杆和稳定器其连接到转向节臂。下臂具有基本上沿车身纵向限定的附接孔。半径杆或稳定器联接到下臂的上表面和下表面中的一个，另一个被插入附接孔中并且联接到下臂中。

35. 发明授权

US4544966A Tracking control system using intermittently recorded pilot signals 失效
标题翻译：跟踪控制系统采用间歇式记录的导频信号
公开(公告)号：US4544966A
公开(公告)日：1985-10-01
申请号：US301097
申请日：1981-09-10
申请人： Hiroshi Taniguchi , Masamitsu Ohtsu , Kanji Kubo
发明人： Hiroshi Taniguchi , Masamitsu Ohtsu , Kanji Kubo
IPC分类号： H04N5/7826 , G11B5/58 , G11B5/588 , G11B5/592 , G11B15/467 , G11B21/10 , G11B21/02
CPC分类号： G11B5/5922
摘要： A control signal recording and reproducing system for exactly tracking a record track in a helical scan type VTR or the like is disclosed.Intermittent pilot signals are recorded with the frequency spectra thereof being interleaved between adjacent tracks. In a reproducing operation, the main track pilot signals and the adjacent track pilot signals are separated by a comb type filter, and using a time position of the main pilot signals as a reference, the adjacent track pilot signals are separated in time to the front adjacent track pilot signal and the rear adjacent track pilot signal to detect the direction of a tracking error.
摘要翻译：公开了一种用于以螺旋扫描型VTR等精确跟踪记录轨道的控制信号记录和再现系统。记录间歇导频信号，其频谱在相邻轨道之间交错。在再现操作中，主轨道导频信号和相邻轨道导频信号由梳状滤波器分离，并且使用主导频信号的时间位置作为参考，相邻轨道导频信号在时间上分离到前面相邻轨道导频信号和后相邻轨道导频信号，以检测跟踪误差的方向。

36. 发明授权

US5025329A Electronically controlled magnetic tape editing device 失效
标题翻译：电子控制磁带编辑装置
公开(公告)号：US5025329A
公开(公告)日：1991-06-18
申请号：US371287
申请日：1989-06-26
申请人： Hiroshi Taniguchi , Kanji Kubo , Hiromi Nakase
发明人： Hiroshi Taniguchi , Kanji Kubo , Hiromi Nakase
IPC分类号： H04N5/7826 , G11B5/588 , G11B5/592 , G11B15/467 , G11B27/00 , G11B27/02 , G11B27/024
CPC分类号： G11B15/4678 , G11B27/024 , G11B5/592 , G11B2220/90
摘要： A device is provided for electronically editing and recording new signals on recorded tracks on a recording medium. Reproduction is started from the track just before an editing point and a magnetic head mounted on an electro-mechanical converting element traces the curvature of the reproducing track. A deviation amount of the electro-mechanical converting element upon reproduction of the track just before the editing point is detected by a strain detecting sensor mounted on the electro-mechanical converting element. The detection signal is sampled at a plurality of sample points and stored in a memory circuit. When the head reaches the editing point, the head is set into the recording mode. The electro-mechanical converting element on which the head is mounted is deviated in accordance with the curvature information of the reproducing track just before the editing point and, at the same time, a closed loop control is executed such that a strain pattern in the track scan which is detected by the strain sensor mounted on the converting element coincides with a strain pattern of the strain sensor upon reproduction of the track just before the editing point which was stored. Due to this, the curvature characteristics of the recorded tracks before and after the editing point are made to coincide.

37. 发明授权

US4943914A Storage control system in which real address portion of TLB is on same chip as BAA 失效
标题翻译：存储控制系统，其中TLB的实际地址部分与BAA在同一芯片上
公开(公告)号：US4943914A
公开(公告)日：1990-07-24
申请号：US110425
申请日：1987-10-20
申请人： Kanji Kubo
发明人： Kanji Kubo
IPC分类号： G06F12/08 , G06F12/10
CPC分类号： G06F12/1054
摘要： The storage control system translates a logical address into a real address by using a translation lookaside buffer (TLB), and checks if a data to be referred to is present in a buffer storage by using a buffer address array (BAA). An integrated logic-in memory device for the storage control system includes a first memory for holding a real address part of the TLB, a second memory for holding a real address part of the BAA, and comparator means, for comparing outputs from the first and second memories, thus eliminating the transfer of a real address from the TLB to the BAA as in a discrete circuit form.
摘要翻译：存储控制系统通过使用翻译后备缓冲器（TLB）将逻辑地址转换为实际地址，并且通过使用缓冲器地址阵列（BAA）来检查要参考的数据是否存在于缓冲存储器中。用于存储控制系统的集成逻辑存储器件包括用于保持TLB的实际地址部分的第一存储器，用于保持BAA的实际地址部分的第二存储器和比较器装置，用于比较来自第一和第二存储器，从而消除了将实际地址从TLB传送到BAA，如以离散电路形式。

38. 发明授权

US4916604A Cache storage apparatus 失效
标题翻译：缓存存储设备
公开(公告)号：US4916604A
公开(公告)日：1990-04-10
申请号：US211451
申请日：1988-06-24
申请人： Akio Yamamoto , Kanji Kubo
发明人： Akio Yamamoto , Kanji Kubo
IPC分类号： G06F12/08
CPC分类号： G06F12/084 , G06F12/0857
摘要： A cache storage apparatus used for a plurality of requestors includes a unit for detecting if consecutive requests by the same requestor have the same access line; a stack unit for storing access addresses to a cache storage unit for each requestor after a cache directory unit was searched; and a plurality of pipe lines allowing the service of plural and concurrent accesses to other than the cache directory unit. In the cache storage apparatus, if there are consecutive accesses to the same line from the same requestor, the access address to the cache storage unit for the succeeding request is not obtained by searching the cache directory unit, but the access address to the cache storage unit for the preceding request is read from the stack unit and used as the access address for the succeeding request. If there is an access request from another requestor while processing the succeeding request which does not require the search of the cache directory unit, the priviledge of using the cache directory unit is given to the access request by the other requestor to thereby allow concurrently processing a plurality of requests.
摘要翻译：用于多个请求者的高速缓存存储装置包括用于检测同一请求者的连续请求是否具有相同访问线的单元; 堆栈单元，用于在搜索高速缓存目录单元之后，将访问地址存储到每个请求者的高速缓存存储单元; 以及允许多个并行访问的服务的多条管线，而不是高速缓存目录单元。在高速缓存存储装置中，如果从相同的请求者连续访问同一行，则通过搜索高速缓存目录单元，而不是高速缓存存储单元的访问地址不能获得用于后续请求的高速缓存存储单元的访问地址从堆栈单元读取上述请求的单位，并将其用作后续请求的访问地址。如果在处理不需要搜索高速缓存目录单元的后续请求的情况下存在来自另一请求者的访问请求，则由其他请求者将访问请求赋予给高速缓存目录单元的授权，从而允许同时处理多个请求

39. 发明授权

US4878688A Vehicle suspension system for a steerable wheel 失效
标题翻译：用于转向轮的车辆悬架系统
公开(公告)号：US4878688A
公开(公告)日：1989-11-07
申请号：US169438
申请日：1988-03-17
申请人： Kanji Kubo
发明人： Kanji Kubo
IPC分类号： B60G3/20
CPC分类号： B60G3/20 , B60G2200/156 , B60G2200/184
摘要： A suspension system for a steerable wheel, comprising two pairs of lateral links, each pair being located one above the other, which are pivotally connected to upper and lower parts of a knuckle at their first ends, respectively, and pivotally connected to a vehicle body at their second ends, so as to allow both a steering action and a vertical motion of the knuckle which carries a wheel, wherein: the lower lateral links comprise a first lower link which extends laterally of the vehicle and a second lower link which diverges from the first lower link so as to act as a radius rod; and the upper lateral links comprise a first upper link which extends in a direction intermediate between those of the lower links as projected onto a horizontal plane and a second upper link which diverges relative to the first upper link, so as to extend obliquely in opposite direction to the second lower link. Preferably, the first end of the second upper lateral link is spaced laterally from the first end of the first upper lateral link away from the vehicle body. Thereby, the imaginary kingpin is prevented from moving in a complex manner and a favorable arrangement of a shock absorber system is made possible by connecting the lower end of the shock absorber system to the first lower link and passing the upper end thereof through the space between the upper links.
摘要翻译：一种用于可转向轮的悬挂系统，包括两对横向连杆，每对横向连杆分别位于另一端上方，并分别枢转地连接在转向节的上部和下部，并且枢转地连接至车体在其第二端处，以允许承载车轮的转向节的转向动作和垂直运动，其中：下横向连杆包括从车辆侧面延伸的第一下连杆和从车辆侧向延伸的第二下连杆第一下连杆作为半径杆; 并且所述上横向连杆包括第一上连杆，所述第一上连杆在投影到水平平面上时在所述下连杆的中心的方向上延伸，并且所述第二上连杆相对于所述第一上连杆分叉，以相反方向倾斜延伸到第二个下面的链接。优选地，第二上横向连杆的第一端与第一上横向连杆的第一端横向偏离车体。因此，防止虚拟主销以复杂的方式移动，并且通过将减震器系统的下端连接到第一下连杆并使其上端穿过其间的空间，可以实现减震器系统的有利布置上层链接。

40. 发明授权

US4868692A Tracking error signal forming circuit 失效
标题翻译：跟踪误差信号形成电路
公开(公告)号：US4868692A
公开(公告)日：1989-09-19
申请号：US174399
申请日：1988-03-28
申请人： Hiromi Nakase , Kanji Kubo , Hiroshi Taniguchi , Mitsunobu Furumoto
发明人： Hiromi Nakase , Kanji Kubo , Hiroshi Taniguchi , Mitsunobu Furumoto
IPC分类号： G11B5/592 , G11B15/467 , G11B21/10
CPC分类号： G11B5/592 , G11B15/467 , G11B21/10
摘要： A tracking error signal forming circuit is disclosed, which circuit comprises means for obtaining a reproduction time difference between specified signals, each of which is contained in the reproduced signal reproduced by each of at least two heads having different azimuthal angles and mounted on an electro-mechanical converting element; reference value forming means for forming a reference value for the tracking control, operating means for calculating the difference between the reproduction time difference and the reference value or the sum thereof; displacement means for displacing forcedly the electro-mechanical converting element in the positive or negative direction; and maximum value detecting means for detecting the maximum value of at least one of the reproduced signals; the reference value forming means including means for calculating the difference between the reproduction time difference and the fixed reference value or the sum thereof at the point of time at which the maximum value of the reproduced signal is obtained by the maximum value detecting means.

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