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31. 发明授权

US07538011B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07538011B2
公开(公告)日：2009-05-26
申请号：US11882907
申请日：2007-08-07
申请人： Shunpei Yamazaki , Osama Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
发明人： Shunpei Yamazaki , Osama Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
IPC分类号： H01L21/322
CPC分类号： H01L29/66757 , G02F1/13454 , H01L27/12 , H01L27/1277 , H01L29/78621 , H01L29/78624 , H01L29/78675 , H01L29/78678
摘要： An object is to reduce the number of high temperature (equal to or greater than 600° C.) heat treatment process steps and achieve lower temperature (equal to or less than 600° C.) processes, and to simplify the process steps and increase throughput in a method of manufacturing a semiconductor device. With the present invention, a barrier layer, a second semiconductor film, and a third semiconductor film containing a noble (rare) gas element are formed on a first semiconductor film having a crystalline structure. Gettering is performed and a metallic element contained in the first semiconductor film passes through the barrier layer and the second semiconductor film by a heat treatment process, and moves to the third semiconductor film. The second semiconductor film and the third semiconductor film are then removed, with the barrier layer used as an etching stopper.
摘要翻译：目的是减少高温（等于或高于600℃）的热处理工艺步骤，达到较低的温度（等于或小于600℃）的工艺，并简化工艺步骤并增加在制造半导体器件的方法中的吞吐量。通过本发明，在具有结晶结构的第一半导体膜上形成有阻挡层，第二半导体膜和含有贵重（稀有）气体元素的第三半导体膜。进行吸气，并且包含在第一半导体膜中的金属元素通过热处理工艺通过阻挡层和第二半导体膜，并移动到第三半导体膜。然后去除第二半导体膜和第三半导体膜，其中阻挡层用作蚀刻停止层。

32. 发明授权

US09287407B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US09287407B2
公开(公告)日：2016-03-15
申请号：US13484670
申请日：2012-05-31
申请人： Junichi Koezuka , Shinji Ohno , Yuichi Sato , Shunpei Yamazaki
发明人： Junichi Koezuka , Shinji Ohno , Yuichi Sato , Shunpei Yamazaki
IPC分类号： H01L21/22 , H01L29/786 , H01L29/66
CPC分类号： H01L29/7869 , H01L29/24 , H01L29/4908 , H01L29/495 , H01L29/66969 , H01L29/78603 , H01L29/78618
摘要： A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.
摘要翻译：提供了具有良好的导通状态特性的使用氧化物半导体的晶体管。提供了包括能够进行高速响应和高速运行的晶体管的高性能半导体器件。晶体管包括包括沟道形成区域的氧化物半导体膜和包含金属元素和掺杂剂的低电阻区域。沟道形成区域位于沟道长度方向的低电阻区域之间。在晶体管的制造方法中，通过在氧化物半导体膜与包含金属元素的膜接触的状态下进行的热处理来添加金属元素，并且通过植入通过包含金属元素的膜添加掺杂剂形成包含金属元素和掺杂剂的低电阻区域。

33. 发明授权

US09260779B2 Light-transmitting conductive film, display device, electronic device, and manufacturing method of light-transmitting conductive film 有权
标题翻译：透光导电膜，显示装置，电子装置以及透光性导电膜的制造方法
公开(公告)号：US09260779B2
公开(公告)日：2016-02-16
申请号：US12781894
申请日：2010-05-18
申请人： Junichi Koezuka , Tetsunori Maruyama , Takayuki Saito , Yuki Imoto , Noriaki Uto , Yuta Endo , Hitomi Shionoya , Takuya Hirohashi , Shunpei Yamazaki
发明人： Junichi Koezuka , Tetsunori Maruyama , Takayuki Saito , Yuki Imoto , Noriaki Uto , Yuta Endo , Hitomi Shionoya , Takuya Hirohashi , Shunpei Yamazaki
IPC分类号： C23C14/08 , C23C14/34 , C23C14/06 , C23C14/58 , C23C14/54
CPC分类号： H01B1/02 , C23C14/0676 , C23C14/3414 , C23C14/541 , C23C14/5806
摘要： An object is to provide a transparent conductive film having favorable transparency and conductivity at low cost. Another object is to reduce the resistivity of a transparent conductive film formed using conductive oxynitride including zinc and aluminum. Another object is to provide a transparent conductive film that is formed using conductive oxynitride including zinc and aluminum. When aluminum and nitrogen are made to be included in a transparent conductive film formed using oxide including zinc to form a transparent conductive film that is formed using conductive oxynitride including zinc and aluminum, the transparent conductive film can have reduced resistivity. Heat treatment after the formation of the transparent conductive film that is formed using conductive oxynitride including zinc and aluminum enables reduction in resistivity of the transparent conductive film.
摘要翻译：本发明的目的是提供一种透明导电膜，其具有良好的透明性和低导电性。另一个目的是降低使用包括锌和铝的导电氮氧化物形成的透明导电膜的电阻率。另一个目的是提供使用包括锌和铝的导电氮氧化物形成的透明导电膜。当使用包含锌的氧化物形成的透明导电膜中包含铝和氮以形成使用包括锌和铝的导电氮氧化物形成的透明导电膜时，透明导电膜可以具有降低的电阻率。在形成使用包括锌和铝的导电氮氧化物形成的透明导电膜之后的热处理使得能够降低透明导电膜的电阻率。

34. 发明授权

US08551824B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08551824B2
公开(公告)日：2013-10-08
申请号：US13029148
申请日：2011-02-17
申请人： Shunpei Yamazaki , Junichi Koezuka
发明人： Shunpei Yamazaki , Junichi Koezuka
IPC分类号： H01L21/84 , H01L21/00 , H01L21/331 , H01L21/322
CPC分类号： H01L21/385 , G02F1/134309 , G02F1/13439 , G02F1/1368 , G02F2201/123 , H01L27/1225 , H01L27/124 , H01L29/4908 , H01L29/4958 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.
摘要翻译：在包括氧化物半导体层的晶体管中，形成与氧化物半导体层接触的氧化物绝缘层。然后，通过氧化物绝缘层将氧引入（添加）到氧化物半导体层，并进行热处理。通过氧气引入和热处理的这些步骤，有意地从氧化物半导体层除去诸如氢，水分，羟基或氢化物的杂质，使得氧化物半导体层被高度纯化。

35. 发明授权

US08445338B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08445338B2
公开(公告)日：2013-05-21
申请号：US13549540
申请日：2012-07-16
申请人： Keiichi Sekiguchi , Junichi Koezuka , Yasuyuki Arai , Shunpei Yamazaki
发明人： Keiichi Sekiguchi , Junichi Koezuka , Yasuyuki Arai , Shunpei Yamazaki
IPC分类号： H01L21/84
CPC分类号： H01L27/1214 , H01L27/1203 , H01L27/127 , H01L29/78624 , H01L29/78645 , H01L29/78675 , H01L29/78696 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05548 , H01L2224/05569 , H01L2224/05572 , H01L2224/16225 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014 , H01L2224/05599 , H01L2224/05099
摘要： The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.
摘要翻译：本发明提供了一种制造半导体器件的方法，通过该方法，提供了包括有源层，与有源层接触的栅极绝缘膜和与有源层重叠的栅极与其间的栅极绝缘膜的晶体管。在有源层和第二区域之间，与栅电极重叠的第一区域的一部分添加杂质，而通过从有源层向一个倾斜方向添加杂质，而在有源层中添加杂质 ; 并且第二区域相对于第一区域位于一个方向上。

36. 发明授权

US07306982B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07306982B2
公开(公告)日：2007-12-11
申请号：US10940821
申请日：2004-09-15
申请人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
发明人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
IPC分类号： H01L21/84
CPC分类号： H01L21/02672 , H01L21/02532 , H01L21/2022 , H01L21/3221 , H01L27/12 , H01L27/1277 , H01L29/66757 , H01L29/78621 , H01L29/78633 , H01L29/78645 , H01L29/78675 , H01L29/78678
摘要： It is intended to achieve the reduction in number of heat treatments carried out at high temperature (at least 600° C.) and the employment of lower temperature processes (600° C. or lower), and to achieve step simplification and throughput improvement. In the present invention, a barrier layer (105), a second semiconductor film (106), and a third semiconductor layer (108) containing an impurity element (phosphorus) that imparts one conductive type are formed on a first semiconductor film (104) having a crystalline structure. Gettering is carried out in which the metal element contained in the first semiconductor film (104) is allowed to pass through the barrier layer (105) and the second semiconductor film (106) by a heat treatment to move into the third semiconductor film (107). Afterward, the second and third semiconductor films (106) and (107) are removed with the barrier layer (105) used as an etching stopper.
摘要翻译：旨在实现在高温（至少600℃）下进行的热处理和使用较低温度工艺（600℃或更低）的热处理数量的减少，并且实现步骤简化和生产量提高。在本发明中，在第一半导体膜（104）上形成有阻挡层（105），第二半导体膜（106）和含有赋予一种导电类型的杂质元素（磷）的第三半导体层（108）具有晶体结构。进行吸收，其中包含在第一半导体膜（104）中的金属元素被允许通过热处理通过阻挡层（105）和第二半导体膜（106）以移动到第三半导体膜（107））。之后，第二和第三半导体膜（106）和（107）被用作蚀刻停止层的阻挡层（105）去除。

37. 发明授权

US07045444B2 Method of manufacturing semiconductor device that includes selectively adding a noble gas element 失效
标题翻译：包括选择性地添加惰性气体元件的半导体器件的制造方法
公开(公告)号：US07045444B2
公开(公告)日：2006-05-16
申请号：US10020961
申请日：2001-12-19
申请人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka
发明人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka
IPC分类号： H01L21/322
CPC分类号： H01L29/78621 , H01L21/02532 , H01L21/02667 , H01L21/02672 , H01L21/02675 , H01L27/1255 , H01L27/1277 , H01L29/66757 , H01L29/78633 , H01L29/78645 , Y10S257/913
摘要： Phosphorus is implanted into a crystalline semiconductor film by an ion dope method. However, a concentration of phosphorus required for gettering is 1×1020/cm3 or higher which hinders recrystallization by later anneal, and thus this becomes a problem. Also, when phosphorus is added at a high concentration, processing time required for doping is increased and throughput in a doping step is reduced, and thus this becomes a problem. The present invention is characterized in that impurity regions to which an element belonging to the group 18 of the periodic table is added are formed in a semiconductor film having a crystalline structure and gettering for segregating in the impurity regions a metal element contained in the semiconductor film is performed by heat treatment. Also, a one conductivity type impurity may be contained in the impurity regions.
摘要翻译：通过离子掺杂法将磷注入到结晶半导体膜中。然而，吸杂所需的磷的浓度为1×10 20 / cm 3以上，这阻碍了后续退火的再结晶，因此成为问题。此外，当以高浓度添加磷时，掺杂所需的处理时间增加，并且掺杂步骤中的生产量降低，因此这成为问题。本发明的特征在于，在具有晶体结构的半导体膜中形成杂质区域，其中添加了属于元素周期表第18族的元素，并且在杂质区域中分离出包含在半导体膜中的金属元素的吸杂剂通过热处理进行。此外，杂质区域中也可以含有一种导电型杂质。

38. 发明授权

US06808968B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06808968B2
公开(公告)日：2004-10-26
申请号：US10074050
申请日：2002-02-14
申请人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
发明人： Shunpei Yamazaki , Osamu Nakamura , Masayuki Kajiwara , Junichi Koezuka , Koji Dairiki , Toru Mitsuki , Toru Takayama , Hideto Ohnuma , Taketomi Asami , Mitsuhiro Ichijo
IPC分类号： H01L2100
CPC分类号： H01L21/02672 , H01L21/02532 , H01L21/2022 , H01L21/3221 , H01L27/12 , H01L27/1277 , H01L29/66757 , H01L29/78621 , H01L29/78633 , H01L29/78645 , H01L29/78675 , H01L29/78678
摘要： It is intended to achieve the reduction in number of heat treatments carried out at high temperature (at least 600° C.) and the employment of lower temperature processes (600° C. or lower), and to achieve step simplification and throughput improvement. In the present invention, a barrier layer (105), a second semiconductor film (106), and a third semiconductor layer (108) containing an impurity element (phosphorus) that imparts one conductive type are formed on a first semiconductor film (104) having a crystalline structure. Gettering is carried out in which the metal element contained in the first semiconductor film (104) is allowed to pass through the barrier layer (105) and the second semiconductor film (106) by a heat treatment to move into the third semiconductor film (107). Afterward, the second and third semiconductor films (106) and (107) are removed with the barrier layer (105) used as an etching stopper.
摘要翻译：旨在实现在高温（至少600℃）下进行的热处理和使用较低温度工艺（600℃或更低）的热处理数量的减少，并且实现步骤简化和生产量提高。在本发明中，在第一半导体膜（104）上形成有阻挡层（105），第二半导体膜（106）和含有赋予一种导电类型的杂质元素（磷）的第三半导体层（108）具有晶体结构。进行吸收，其中包含在第一半导体膜（104）中的金属元素被允许通过热处理通过阻挡层（105）和第二半导体膜（106）以移动到第三半导体膜（107））。之后，第二和第三半导体膜（106）和（107）被用作蚀刻停止层的阻挡层（105）去除。

39. 发明授权

US08748223B2 Method for manufacturing oxide semiconductor film and method for manufacturing semiconductor device 有权
标题翻译：氧化物半导体膜的制造方法及半导体装置的制造方法
公开(公告)号：US08748223B2
公开(公告)日：2014-06-10
申请号：US12888846
申请日：2010-09-23
申请人： Shunpei Yamazaki , Junichiro Sakata , Akiharu Miyanaga , Masayuki Sakakura , Junichi Koezuka , Tetsunori Maruyama , Yuki Imoto
发明人： Shunpei Yamazaki , Junichiro Sakata , Akiharu Miyanaga , Masayuki Sakakura , Junichi Koezuka , Tetsunori Maruyama , Yuki Imoto
IPC分类号： H01L21/00 , H01L21/16
CPC分类号： H01L29/66742 , C23C14/086 , H01L21/02422 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/7869
摘要： An object is to provide an oxide semiconductor having stable electric characteristics and a semiconductor device including the oxide semiconductor. A manufacturing method of a semiconductor film by a sputtering method includes the steps of holding a substrate in a treatment chamber which is kept in a reduced-pressure state; heating the substrate at lower than 400° C.; introducing a sputtering gas from which hydrogen and moisture are removed in the state where remaining moisture in the treatment chamber is removed; and forming an oxide semiconductor film over the substrate with use of a metal oxide which is provided in the treatment chamber as a target. When the oxide semiconductor film is formed, remaining moisture in a reaction atmosphere is removed; thus, the concentration of hydrogen and the concentration of hydride in the oxide semiconductor film can be reduced. Thus, the oxide semiconductor film can be stabilized.
摘要翻译：目的是提供具有稳定电特性的氧化物半导体和包括氧化物半导体的半导体器件。通过溅射法制造半导体膜的方法包括将基板保持在保持在减压状态的处理室中的步骤; 在低于400℃下加热基材。在去除处理室中的剩余水分的状态下引入除去氢气和水分的溅射气体; 以及使用设置在处理室中的金属氧化物作为目标，在基板上形成氧化物半导体膜。当形成氧化物半导体膜时，除去反应气氛中的剩余水分; 因此，可以降低氧化物半导体膜中的氢浓度和氢化物浓度。因此，可以使氧化物半导体膜稳定。

40. 发明授权

US08658508B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08658508B2
公开(公告)日：2014-02-25
申请号：US13411864
申请日：2012-03-05
申请人： Takeshi Shichi , Junichi Koezuka , Hideto Ohnuma , Shunpei Yamazaki
发明人： Takeshi Shichi , Junichi Koezuka , Hideto Ohnuma , Shunpei Yamazaki
IPC分类号： H01L21/33 , H01L21/8222
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772
摘要： The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.
摘要翻译：本发明提供一种制造SOI衬底的方法，即使在非质量分离型离子照射方法为非质子分离型离子照射方法的情况下，通过有利地分离单晶半导体衬底来提高分离后的单晶半导体层的表面的平面性并且在分离之后提高单晶半导体层的表面的平面性以及提高生产量。该方法包括以下步骤：当单晶半导体衬底被冷却以在单晶半导体衬底中形成脆化区域时，通过离子掺杂方法照射具有加速离子的单晶半导体衬底; 将单晶半导体衬底和基底衬底之间插入绝缘层; 并且沿着脆化区域分离单晶半导体衬底，以在基底衬底上形成绝缘层，形成单晶半导体层。

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