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    • 33. 发明授权
    • Image processing circuit and display unit having the image processing
circuit
    • 具有图像处理电路的图像处理电路和显示单元
    • US5821948A
    • 1998-10-13
    • US289589
    • 1994-08-15
    • Yasuhisa KawamotoTakeshi MurakamiSuzuki Ryuichi
    • Yasuhisa KawamotoTakeshi MurakamiSuzuki Ryuichi
    • G06F3/153G09G5/00G09G5/395
    • G09G5/395
    • An image processing circuit includes input terminals receiving image data as a first number of bits, a memory selectively storing the image data received at the input terminals and outputting the image data stored therein as a second number of bits, which is an integer multiple of the first number of bits, in response to a write signal which is synchronized to a memory clock signal, and a shift register selectively and in succession storing the image data output from the memory and outputting the image data stored therein as a third number of bits in response to a video clock signal which has a second frequency which is different from the first frequency of the memory clock signal and wherein the second number of bits is greater than the third number of bits.
    • 图像处理电路包括:接收图像数据作为第一位数的输入端;存储器,选择性地存储在输入端接收到的图像数据,并输出存储在其中的图像数据,作为第二位数, 第一位数,响应于与存储器时钟信号同步的写入信号,以及移位寄存器,选择性地并且相继地存储从存储器输出的图像数据,并将存储在其中的图像数据作为第三位数输出 响应于具有与存储器时钟信号的第一频率不同的第二频率的视频时钟信号,并且其中第二位数大于第三位数。