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31. 发明申请

US20070037546A1 Superheterodyne receiver having at least one downconversion stage empolying a single image reject filter stage and both low-side injection and high-side injection of a local oscillator signal 有权
标题翻译：具有至少一个下变频级的超外差接收器，其具有单个图像抑制滤波器级以及本地振荡器信号的低侧注入和高侧注入
公开(公告)号：US20070037546A1
公开(公告)日：2007-02-15
申请号：US11203473
申请日：2005-08-11
申请人： David Steed , Martin Johnson
发明人： David Steed , Martin Johnson
IPC分类号： H04B1/16
CPC分类号： H04B1/28
摘要： A multi-channel superheterodyne receiver employs a low intermediate frequency (IF) and both high-side injection and low-side injection of a selected local oscillator (LO) signal into the mixer in order to position image frequencies outside the passband of a single image reject filter. Any channel that falls within a used portion of the image reject filter passband can be downconverted with image rejection if the utilized bandwidth portion is no greater than about 4 times the IF minus the bandwidth of a channel in the filter passband. Low side injection is used for channels falling within the lower half of the passband of the image reject filter, while high-side injection is used for channels falling within the upper half thereof. The image always remains outside the passband and the receiver can accommodate a greatly increased number of channels.
摘要翻译：多通道超外差接收机采用低中频（IF），并将所选择的本地振荡器（LO）信号的高侧注入和低端注入混频器，以将图像频率定位在单个图像的通带之外拒绝过滤器如果所使用的带宽部分不大于IF的大约4倍，而不是滤波器通带中的信道的带宽，则落入图像拒绝滤波器通带的使用部分内的任何信道可以被镜像抑制下变频。低边注入用于落在图像抑制滤波器通带下半部的通道，而高边注入用于落在其上半部分的通道。图像始终保持在通带外，接收器可以容纳大量增加的通道数。

32. 发明申请

US20060274107A1 Method and apparatus for calibrating a printhead 有权
标题翻译：用于校准打印头的方法和装置
公开(公告)号：US20060274107A1
公开(公告)日：2006-12-07
申请号：US11145801
申请日：2005-06-06
申请人： Timothy Anderson , James Bush , Michael Donovan , Nathan Foley , Martin Johnson , Patrick Kroger , Tommy Lowe
发明人： Timothy Anderson , James Bush , Michael Donovan , Nathan Foley , Martin Johnson , Patrick Kroger , Tommy Lowe
IPC分类号： B41J29/393
CPC分类号： B41J29/393
摘要： A method for calibrating a printhead includes printing a test pattern, scanning the test pattern to obtain calibration data, performing an ink drop velocity optimization for the printhead using the calibration data, and determining a bi-directional offset based on the calibration data.
摘要翻译：用于校准打印头的方法包括打印测试图案，扫描测试图案以获得校准数据，使用校准数据对打印头执行墨滴速度优化，以及基于校准数据确定双向偏移。

33. 发明申请

US20050128226A1 Method of performing dynamic printhead maintenance firing in an ink jet printer 有权
标题翻译：在喷墨打印机中执行动态打印头维护点火的方法
公开(公告)号：US20050128226A1
公开(公告)日：2005-06-16
申请号：US10735368
申请日：2003-12-12
申请人： Charles Aldrich , Nathan Foley , Marc Herwald , Martin Johnson
发明人： Charles Aldrich , Nathan Foley , Marc Herwald , Martin Johnson
IPC分类号： B41J2/165 , B41J29/38
CPC分类号： B41J2/16508 , B41J2/16526
摘要： A method of performing printhead maintenance firing in an ink jet printer that has a printhead carrier that carries an ink jet printhead, the ink jet printer having a waste ink receptacle, includes the steps of decelerating the printhead carrier from a first velocity after printing print data; and controlling a firing of the printhead during the decelerating in accordance with maintenance data so that ink droplets ejected from the printhead during the decelerating are received by the waste ink receptacle.
摘要翻译：一种在具有携带喷墨打印头的打印头托架的喷墨打印机中执行打印头维护点火的方法，该喷墨打印机具有废墨盒，包括以下步骤：在打印打印数据之后使打印头载体从第一速度减速 ; 以及根据维护数据在减速期间控制打印头的点火，使得在减速期间从打印头喷射的墨滴被废墨容器接收。

34. 发明授权

US06803868B2 Method and apparatus of producing a digital depiction of a signal 有权
标题翻译：产生信号的数字描绘的方法和装置
公开(公告)号：US06803868B2
公开(公告)日：2004-10-12
申请号：US10311887
申请日：2002-12-23
申请人： Selina A Ballantyne , Adrian S Coffey , Martin Johnson , Robin Jones
发明人： Selina A Ballantyne , Adrian S Coffey , Martin Johnson , Robin Jones
IPC分类号： H03M110
CPC分类号： H03M7/30 , H03M1/12
摘要： An apparatus for producing a digital depiction of a signal (10) which is adaptive to the signal itself. A constant rate sampling means, such as an analogue to digital converter (2), samples the signal (10) at a constant rate and produces a first digital depiction (12) of a signal. A transformation means (14) is responsive to the first digital depiction (12) and produces a second digital depiction based on the evolution of the signal. The transformation means may be capable of determining when a predetermined threshold level has been crossed and measuring the time interval between predetermined threshold level crossings. The transformation means (14) may include a logic arrangement and a timer counter and is run from a clock signal (16) from the same clock (6) as drives the sampling means. A method of adapting a conventional ADC (2) to adaptively sample the signal (10) by adding a transformation means (14) run off the same clock (6) as the ADC (2) is also provided.
摘要翻译：一种用于产生适应信号本身的信号（10）的数字描绘的装置。诸如模数转换器（2）的恒定速率采样装置以恒定速率采样信号（10）并产生信号的第一数字描绘（12）。变换装置（14）响应于第一数字描绘（12）并且基于信号的演变产生第二数字描绘。变换装置可能能够确定何时已经超过预定的阈值水平并且测量预定的阈值级别交叉之间的时间间隔。变换装置（14）可以包括逻辑装置和定时器计数器，并且从驱动采样装置的相同时钟（6）的时钟信号（16）运行。还提供了一种通过添加与ADC（2）相同的时钟（6）运行的变换装置（14）来适配常规ADC（2）以自适应采样信号（10）的方法。

35. 发明授权

US06492929B1 Analogue to digital converter and method of analogue to digital conversion with non-uniform sampling 失效
标题翻译：模数转换器和模数转换方法采用非均匀采样
公开(公告)号：US06492929B1
公开(公告)日：2002-12-10
申请号：US09856312
申请日：2001-05-21
申请人： Adrian S Coffey , Martin Johnson , Robin Jones
发明人： Adrian S Coffey , Martin Johnson , Robin Jones
IPC分类号： H03M112
CPC分类号： H03M1/127
摘要： An analogue to digital converter generating at least two threshold levels and a comparator for comparing each of the levels with the input signal and generating a primary digital output signal to provide an indication that the input signal has crossed one of the threshold levels. The converter comprises a timer for determining the elapsed period of time between the input signal crossing a first level and the input signal crossing a second level and for generating a secondary output signal representing the elapsed time, whereby the secondary digital output signal and the corresponding primary output signal are used to provide a digital representation of the analogue input signal. The converter may also comprise a receiver of the primary digital output signal from the comparator and for providing an UP/DOWN digital output signal to indicate in which direction the input signal crossed the threshold level.
摘要翻译：产生至少两个阈值电平的模数转换器和用于将每个电平与输入信号进行比较并产生主数字输出信号的比较器，以提供输入信号已经越过阈值电平之一的指示。该转换器包括一个定时器，用于确定穿过第一电平的输入信号与穿过第二电平的输入信号之间经过的时间间隔，并产生表示经过时间的辅助输出信号，由此辅助数字输出信号和相应的主电路输出信号用于提供模拟输入信号的数字表示。转换器还可以包括来自比较器的主数字输出信号的接收器，并且用于提供UP / DOWN数字输出信号，以指示输入信号在哪个方向上越过阈值电平。

36. 发明授权

US5835682A Dynamical system analyzer 失效
标题翻译：动力系统分析仪
公开(公告)号：US5835682A
公开(公告)日：1998-11-10
申请号：US551732
申请日：1995-11-01
申请人： David S. Broomhead , Robin Jones , Martin Johnson
发明人： David S. Broomhead , Robin Jones , Martin Johnson
IPC分类号： G01H17/00 , G01M13/04 , G01M15/04 , G01M19/00 , G06F15/18 , G06F17/00 , G06F17/50 , G06F19/00 , H03H21/00 , H04B3/04 , G05B13/02
CPC分类号： A61B5/0476 , G05B23/0221 , G06N99/005 , Y10S706/902 , Y10S706/903
摘要： A dynamical system analyser (10) incorporates a computer (22) to perform a singular value decomposition of a time series of signals from a nonlinear (possibly chaotic) dynamical system (14). Relatively low-noise singular vectors from the decomposition are loaded into a finite impulse response filter (34). The time series is formed into Takens' vectors each of which is projected onto each of the singular vectors by the filter (34). Each Takens' vector thereby provides the co-ordinates of a respective point on a trajectory of the system (14) in a phase space. A heuristic processor (44) is used to transform delayed co-ordinates by QR decomposition and least squares fitting so that they are fitted to non-delayed co-ordinates. The heuristic processor (44) generates a mathematical model to implement this transformation, which predicts future system states on the basis of respective current states. A trial system is employed to generate like co-ordinates for transformation in the heuristic processor (44). This produces estimates of the trial system's future states predicted from the comparison system's model. Alternatively, divergences between such estimates and actual behavior may be obtained. As a further alternative, mathematical models derived by the analyser (10) from different dynamical systems may be compared.
摘要翻译：动态系统分析器（10）包括计算机（22），以执行来自非线性（可能是混沌）动力系统（14）的时间序列信号的奇异值分解。来自分解的相对低噪声奇异矢量被加载到有限脉冲响应滤波器（34）中。时间序列被形成为通过滤波器（34）投影到每个奇异矢量上的Takens向量。因此，每个Takens向量从而在相位空间中提供系统（14）的轨迹上的相应点的坐标。启发式处理器（44）用于通过QR分解和最小二乘拟合来转换延迟坐标，使得它们适合于非延迟坐标。启发式处理器（44）产生一个数学模型以实现该变换，其基于相应的当前状态来预测未来的系统状态。在启发式处理器（44）中，采用一种试验系统来产生类似坐标变换的坐标。这产生了从比较系统模型预测的试验系统未来状态的估计。或者，可以获得这种估计与实际行为之间的分歧。作为另一替代方案，可以比较来自不同动力系统的分析器（10）导出的数学模型。

37. 发明授权

US5020015A Multichannel digital signal correlator or structurator 失效
标题翻译：多通道数字信号相关器或结构器
公开(公告)号：US5020015A
公开(公告)日：1991-05-28
申请号：US359755
申请日：1989-05-16
申请人： Robin Jones , Martin Johnson
发明人： Robin Jones , Martin Johnson
IPC分类号： G06F17/15
CPC分类号： G06F17/15
摘要： A digital cross and auto correlator or structurator receives a stream of pulses of varying time separation forming an input signal. A plurality of channels each receives this input signal which is sampled to provide a series of digital numbers in successive sample time intervals. Each channel has a delay for delaying an input signal to a delay value to provide a delayed signal, and an arithmetic section for receiving at one input a non-delayed input signal and at another input the delayed signal. An accumulator receives the output of the arithmetic section. The collective output of the channels provides the required auto or cross correlation function. The correlator has means in each channel for providing a sample time interval and a delay value that are independent of one another and of other channels. The sample time and delay value are set by the frequency of and phase difference respectively between clock pulses.
摘要翻译： PCT No.PCT / GB87 / 00845 Sec。 371日期：1989年5月16日 102（e）日期1989年5月16日PCT提交1987年11月26日PCT公布。出版物WO88 / 04079 日期：1988年6月2日。数字交叉和自相关器或结构器接收形成输入信号的不同时间间隔的脉冲流。多个通道每个接收该输入信号，该输入信号被采样以在连续的采样时间间隔中提供一系列数字数字。每个通道具有用于将输入信号延迟到延迟值以提供延迟信号的延迟，以及用于在一个输入端接收非延迟输入信号并在另一输入端接收延迟信号的运算部分。累加器接收运算部分的输出。通道的集体输出提供所需的自动或互相关功能。相关器在每个通道中具有用于提供采样时间间隔和独立于其他通道的延迟值的装置。采样时间和延迟值分别由时钟脉冲之间的频率和相位差设置。

38. 发明公开

US20230389873A1 Infrared Glucose Monitoring Wristband Device 审中-公开
公开(公告)号：US20230389873A1
公开(公告)日：2023-12-07
申请号：US17829686
申请日：2022-06-01
申请人： Martin Johnson
发明人： Martin Johnson
IPC分类号： A61B5/00 , A61B5/145 , A61B5/1455
CPC分类号： A61B5/681 , A61B5/14532 , A61B5/1455 , A61B5/0002 , A61B5/748
摘要： An infrared glucose monitoring wristband device for measuring blood glucose levels includes a wristband having a smart watch. A first side of the wristband has a plurality of holes and a second side of the wristband has a aperture. Each of the holes is a first portion of a wristband fastener. A glucose reader is a second portion of the wristband fastener and includes an encasing. The encasing has a top end, a bottom end, and an interior. The interior defines a space for a pair of infrared diodes to be positioned within. A pair of glass caps is positioned on the top end of the encasing, wherein the pair of glass caps emits infrared light upon the wrist of the user. A circuit board is positioned on the bottom end of the encasing and sends readings from the pair of infrared diodes to the smart watch.

39. 发明授权

US09917430B2 Active cover plates 有权
公开(公告)号：US09917430B2
公开(公告)日：2018-03-13
申请号：US15486280
申请日：2017-04-12
申请人： Jeremy Smith , Martin Johnson , Phil Dietz , Darren Knight
发明人： Jeremy Smith , Martin Johnson , Phil Dietz , Darren Knight
IPC分类号： H05B33/00 , H02G3/14 , H02G3/18 , H02G3/08 , H01R25/00 , H01R13/66 , H02B1/46 , H05B33/08 , H05B37/02 , H01R103/00
CPC分类号： H02G3/14 , H01R13/665 , H01R25/006 , H01R2103/00 , H02B1/46 , H02G3/081 , H02G3/18 , H05B33/0806 , H05B33/0842 , H05B37/0218 , H05B37/0227 , H05B37/0272 , Y02B20/46
摘要： In one example, a cover plate may include a face plate with at least one outlet aperture, a back plate abutting the back of the face plate, an electric load between the face plate and the back plate, and at least one prong that extends from the face plate to a free end. The prong may be configured to interface with a terminal on the side of an outlet receptacle body and may include any or all of the following: an insulated portion and/or an electrical contact. The prong may resiliently deflects outward when interfacing with the terminal and may deflect with a first resistance prior to contacting a wall and with a second resistance that is greater than the first resistance when the prong contacts the wall. The cover play may also include at least one conductor electrically connecting the prong to the electric load.

40. 发明申请

US20170222414A1 ACTIVE COVER PLATES 有权
公开(公告)号：US20170222414A1
公开(公告)日：2017-08-03
申请号：US15486277
申请日：2017-04-12
申请人： Jeremy Smith , Martin Johnson , Phil Dietz , Darren Knight
发明人： Jeremy Smith , Martin Johnson , Phil Dietz , Darren Knight
IPC分类号： H02G3/08 , H02G3/14 , H01R13/717 , H01R25/00 , H01R13/66 , F21V33/00 , H02G3/18 , H01R4/48
CPC分类号： H02G3/081 , F21V33/006 , F21Y2115/10 , H01H9/0271 , H01R4/4809 , H01R13/665 , H01R13/7175 , H01R25/006 , H01R2103/00 , H02G3/14 , H02G3/18
摘要： Various embodiments of a wall-plate system are disclosed. For example, wall-plate system may extend in longitudinal, lateral, and transverse directions that are orthogonal to one another. The wall-plate system may include any or all of the following: (1) a face plate; (2) a back plate; (3) electronic circuitry; (4) at least one spring clip comprising at least one first portion of conductive material and resiliently deflecting between a neutral position and a deflected position located outboard of the neutral position in the lateral direction; (6) at least one insulator positioned outboard of the at least one first portion of conductive material in the lateral direction; (7) the at least one insulator tracking the at least one spring clip as the at least one spring clip deflects between the neutral position and the deflected position.

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