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31. 发明授权

US07774600B2 Launching a secure kernel in a multiprocessor system 有权
公开(公告)号：US07774600B2
公开(公告)日：2010-08-10
申请号：US12005570
申请日：2007-12-27
申请人： John H. Wilson , Ioannis T. Schoinas , Mazin S. Yousif , Linda J. Rankin , David W. Grawrock , Robert J. Greiner , James A. Sutton , Kushagra Vaid , Willard M. Wiseman
发明人： John H. Wilson , Ioannis T. Schoinas , Mazin S. Yousif , Linda J. Rankin , David W. Grawrock , Robert J. Greiner , James A. Sutton , Kushagra Vaid , Willard M. Wiseman
IPC分类号： G06F9/30 , H04L29/06
CPC分类号： G06F21/575 , G06F21/44 , G06F21/445 , G06F21/50 , G06F21/606 , G06F21/64 , G06F21/71 , G06F2221/034
摘要： In one embodiment of the present invention, a method includes verifying an initiating logical processor of a system; validating a trusted agent with the initiating logical processor if the initiating logical processor is verified; and launching the trusted agent on a plurality of processors of the system if the trusted agent is validated. After execution of such a trusted agent, a secure kernel may then be launched, in certain embodiments. The system may be a multiprocessor server system having a partially or fully connected topology with arbitrary point-to-point interconnects, for example.

32. 发明申请

US20090024715A1 Method, System, and Apparatus for Dynamic Reconfiguration of Resources 有权
公开(公告)号：US20090024715A1
公开(公告)日：2009-01-22
申请号：US12235968
申请日：2008-09-23
申请人： Mani Ayyar , Eric Delano , Ioannis T. Schoinas , Akhiles Kumar , Jay Jayasimha , Jose A. Vargas
发明人： Mani Ayyar , Eric Delano , Ioannis T. Schoinas , Akhiles Kumar , Jay Jayasimha , Jose A. Vargas
IPC分类号： G06F15/167
CPC分类号： G06F9/44505 , G06F9/50 , G06F9/5011 , G06F13/00 , G06F13/24 , G06F13/4081 , G06F13/409
摘要： A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.

33. 发明授权

US07328368B2 Dynamic interconnect width reduction to improve interconnect availability 有权
标题翻译：动态互连宽度减少，以提高互连可用性
公开(公告)号：US07328368B2
公开(公告)日：2008-02-05
申请号：US10801448
申请日：2004-03-12
申请人： Phanindra K. Mannava , Victor W. Lee , Akhilesh Kumar , Doddaballapur N. Jayasimha , Ioannis T. Schoinas
发明人： Phanindra K. Mannava , Victor W. Lee , Akhilesh Kumar , Doddaballapur N. Jayasimha , Ioannis T. Schoinas
IPC分类号： G06F11/00
CPC分类号： G06F11/0793 , G06F11/0745 , G06F11/1443 , G06F11/2007 , G06F2213/0038 , H04L1/1867 , H04L2001/0094
摘要： In some embodiments an apparatus includes a transmission error detector to detect an error of a transmission of an interconnect and a transmitting agent to retry the transmission in response to the detected error. The apparatus also includes a hard failure detector to detect a hard failure of the interconnect if the retry is unsuccessful, and a transmission width reducer to reduce a transmission width of the interconnect in response to the hard failure detector. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，一种装置包括传输错误检测器，用于响应于检测到的错误来检测互连的传输错误和发送代理重试传输。如果重试不成功，该装置还包括硬故障检测器，用于检测互连的硬故障;以及传输宽度减小器，以响应于硬故障检测器来减小互连的传输宽度。描述和要求保护其他实施例。

34. 发明申请

US20080005346A1 Separable transport layer in cache coherent multiple component microelectronic systems 有权
标题翻译：缓存相干多分量微电子系统中的可分离传输层
公开(公告)号：US20080005346A1
公开(公告)日：2008-01-03
申请号：US11479922
申请日：2006-06-30
申请人： Ioannis T. Schoinas , Doddaballapur Narasimha-Murthy Jayasimha
发明人： Ioannis T. Schoinas , Doddaballapur Narasimha-Murthy Jayasimha
IPC分类号： G06F15/16
CPC分类号： H04L47/193 , G06F15/173 , H04L1/1803 , H04L1/1874 , H04L45/22 , H04L45/28 , H04L47/32 , H04L47/34
摘要： A separable Transport Layer is described in the context of cache coherent multiple component micro-electronic systems. In one example, a packet is received from a source component, the packet containing a Protocol Layer. A Transport Layer is attached to the packet and the packet is sent across a component communications interface to a second component, the packet containing the Transport Layer and the Protocol Layer.
摘要翻译：在缓存相干多分量微电子系统的上下文中描述了可分离的传输层。在一个示例中，从源组件接收分组，该分组包含协议层。传输层连接到分组，并且分组通过组件通信接口发送到第二组件，该分组包含传输层和协议层。

35. 发明申请

US20190095350A1 System, Apparatus And Method For Page Granular,Software Controlled Multiple Key Memory Encryption 审中-公开
公开(公告)号：US20190095350A1
公开(公告)日：2019-03-28
申请号：US15714217
申请日：2017-09-25
申请人： David M. Durham , Siddhartha Chhabra , Amy L. Santoni , Gilbert Neiger , Barry E. Huntley , Hormuzd M. Khosravi , Baiju V. Patel , Ravi L. Sahita , Gideon Gerzon , Ido Ouziel , Ioannis T. Schoinas , Rajesh M. Sankaran
发明人： David M. Durham , Siddhartha Chhabra , Amy L. Santoni , Gilbert Neiger , Barry E. Huntley , Hormuzd M. Khosravi , Baiju V. Patel , Ravi L. Sahita , Gideon Gerzon , Ido Ouziel , Ioannis T. Schoinas , Rajesh M. Sankaran
IPC分类号： G06F12/14 , G06F21/60 , G06F21/82 , G06F3/06
摘要： In one embodiment, a cryptographic circuit is adapted to receive a data line including at least an encrypted portion from a memory in response to a read request having a memory address from a first agent, obtain a key identifier for a key of the first agent from the data line, obtain the key using the key identifier, decrypt the at least encrypted portion of the data line using the key and send decrypted data of the at least encrypted portion of the data line to the first agent. Other embodiments are described and claimed.

36. 发明授权

US09805221B2 Incorporating access control functionality into a system on a chip (SoC) 有权
公开(公告)号：US09805221B2
公开(公告)日：2017-10-31
申请号：US13995659
申请日：2011-12-21
申请人： Manoj R. Sastry , Ioannis T. Schoinas , Robert J. Toepfer , Alpa T. Narendra Trivedi , Men Long
发明人： Manoj R. Sastry , Ioannis T. Schoinas , Robert J. Toepfer , Alpa T. Narendra Trivedi , Men Long
IPC分类号： G06F21/76 , G06F13/38
CPC分类号： G06F21/76 , G06F13/385
摘要： In one embodiment, the present invention includes a system on a chip (SoC) that has a first agent with an intellectual property (IP) logic, an interface to a fabric including a target interface, a master interface and a sideband interface, and an access control plug-in unit to handle access control policy for the first agent with respect to incoming and outgoing transactions. This access control plug-in unit can be incorporated into the SoC at integration time and without any modification to the IP logic. Other embodiments are described and claimed.

37. 发明授权

US09304964B2 Separable transport layer in cache coherent multiple component microelectronic systems 有权
标题翻译：缓存相干多分量微电子系统中的可分离传输层
公开(公告)号：US09304964B2
公开(公告)日：2016-04-05
申请号：US11479922
申请日：2006-06-30
申请人： Ioannis T. Schoinas , Doddaballapur Narasimha-Murthy Jayasimha
发明人： Ioannis T. Schoinas , Doddaballapur Narasimha-Murthy Jayasimha
IPC分类号： G06F15/16 , G06F15/173 , H04L12/707 , H04L12/703
CPC分类号： H04L47/193 , G06F15/173 , H04L1/1803 , H04L1/1874 , H04L45/22 , H04L45/28 , H04L47/32 , H04L47/34
摘要： A separable Transport Layer is described in the context of cache coherent multiple component micro-electronic systems. In one example, a packet is received from a source component, the packet containing a Protocol Layer. A Transport Layer is attached to the packet and the packet is sent across a component communications interface to a second component, the packet containing the Transport Layer and the Protocol Layer.
摘要翻译：在缓存相干多分量微电子系统的上下文中描述了可分离的传输层。在一个示例中，从源组件接收分组，该分组包含协议层。传输层连接到分组，并且分组通过组件通信接口发送到第二组件，该分组包含传输层和协议层。

38. 发明申请

US20150331043A1 SYSTEM-ON-CHIP SECURE DEBUG 审中-公开
标题翻译：系统级芯片安全调试
公开(公告)号：US20150331043A1
公开(公告)日：2015-11-19
申请号：US14279007
申请日：2014-05-15
申请人： Manoj R. Sastry , Enrico D. Carrieri , Michael Neve de Mevergnies , Ioannis T. Schoinas , Michael J. Wiznerowicz
发明人： Manoj R. Sastry , Enrico D. Carrieri , Michael Neve de Mevergnies , Ioannis T. Schoinas , Michael J. Wiznerowicz
IPC分类号： G01R31/3177 , G06F21/76
CPC分类号： G06F21/76 , G01R31/31705 , G01R31/3177 , G06F21/31
摘要： A system on chip (SOC) includes a policy generator to identify lifecycle data that identifies a lifecycle of the SOC and identify authentication data that identifies a particular user that is to debug the SoC. A particular policy is determined based on the lifecycle and identification of the particular user, and policy data is sent to at least one block of the SoC, the policy data identifying the particular policy. Debug access at the block is based on the particular policy.
摘要翻译：片上系统（SOC）包括一个策略生成器，用于识别识别SOC的生命周期的生命周期数据，并识别识别要调试SoC的特定用户的认证数据。特定策略基于特定用户的生命周期和标识来确定，策略数据被发送到SoC的至少一个块，该策略数据标识特定策略。该块的调试访问是基于特定策略。

39. 发明授权

US08789170B2 Method for enforcing resource access control in computer systems 有权
标题翻译：在计算机系统中执行资源访问控制的方法
公开(公告)号：US08789170B2
公开(公告)日：2014-07-22
申请号：US12890040
申请日：2010-09-24
申请人： Manoj R. Sastry , Ioannis T. Schoinas , Daniel M. Cermak
发明人： Manoj R. Sastry , Ioannis T. Schoinas , Daniel M. Cermak
IPC分类号： G06F12/14
CPC分类号： H04L63/10 , G06F12/1458 , G06F21/6218 , G06F21/78
摘要： A method and system for enforcing access control to system resources and assets. Security attributes associated with devices that initiate transactions in the system are automatically generated and forwarded with transaction messages. The security attributes convey access privileges assigned to each initiator. One or more security enforcement mechanisms are implemented in the system to evaluate the security attributes against access policy requirements to access various system assets and resources, such as memory, registers, address ranges, etc. If the privileges identified by the security attributes indicate the access request is permitted, the transaction is allowed to proceed. The security attributes of the initiator scheme provides a modular, consistent secure access enforcement scheme across system designs.
摘要翻译：一种执行对系统资源和资产的访问控制的方法和系统。与系统中发起事务的设备相关联的安全属性将自动生成并使用事务消息进行转发。安全属性传达分配给每个启动器的访问权限。在系统中实现一个或多个安全执行机制以根据访问策略要求评估安全属性以访问诸如存储器，寄存器，地址范围等的各种系统资产和资源。如果由安全属性标识的特权指示访问允许请求，允许交易进行。启动器方案的安全属性提供跨系统设计的模块化，一致的安全访问实施方案。

40. 发明授权

US08464048B2 Launching a secure kernel in a multiprocessor system 有权
公开(公告)号：US08464048B2
公开(公告)日：2013-06-11
申请号：US13422786
申请日：2012-03-16
申请人： John H. Wilson , Ioannis T. Schoinas , Mazin S. Yousif , Linda J. Rankin , David W. Grawrock , Robert J. Greiner , James A. Sutton , Kushagra Vaid , Willard M. Wiseman
发明人： John H. Wilson , Ioannis T. Schoinas , Mazin S. Yousif , Linda J. Rankin , David W. Grawrock , Robert J. Greiner , James A. Sutton , Kushagra Vaid , Willard M. Wiseman
IPC分类号： G06F9/30
CPC分类号： G06F21/575 , G06F21/44 , G06F21/445 , G06F21/50 , G06F21/606 , G06F21/64 , G06F21/71 , G06F2221/034
摘要： In one embodiment of the present invention, a method includes verifying a master processor of a system; validating a trusted agent with the master processor if the master processor is verified; and launching the trusted agent on a plurality of processors of the system if the trusted agent is validated. After execution of such a trusted agent, a secure kernel may then be launched, in certain embodiments. The system may be a multiprocessor server system having a partially or fully connected topology with arbitrary point-to-point interconnects, for example.

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