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31. 发明申请

US20080012090A1 Semiconductor component and methods for producing a semiconductor component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20080012090A1
公开(公告)日：2008-01-17
申请号：US11477076
申请日：2006-06-28
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/00
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

32. 发明申请

US20050243594A1 Electrically programmable memory cell and methods for programming and reading from such a memory cell 有权
标题翻译：电可编程存储单元以及用于从这样的存储单元编程和读取的方法
公开(公告)号：US20050243594A1
公开(公告)日：2005-11-03
申请号：US11104686
申请日：2005-04-13
申请人： Rainhald Sander , Andreas Meiser
发明人： Rainhald Sander , Andreas Meiser
IPC分类号： G11C11/22 , G11C16/04 , H01L27/115
CPC分类号： H01L27/115 , G11C16/0433
摘要： The invention relates to an electrically programmable memory cell comprising a memory transistor having a source and a drain zone and also a storage electrode and a control electrode, and a selection transistor having a source and a drain zone and also a control electrode, the drain zones of the storage and selection transistors being electrically conductively connected to one another. In this case, the drain zone of the selection transistor has a connection zone and an intermediate zone doped more weakly than the connection zone, the intermediate zone being arranged between the connection zone and a channel zone of the selection transistor and serving, during the programming operation, for taking up a programming voltage and thus for protecting a control electrode insulation layer of the selection transistor.
摘要翻译：本发明涉及一种电可编程存储单元，其包括具有源极和漏极区以及存储电极和控制电极的存储晶体管，以及具有源极和漏极区以及控制电极的选择晶体管，所述漏极区的存储和选择晶体管彼此导电连接。在这种情况下，选择晶体管的漏区具有连接区和掺杂比连接区更弱的中间区，中间区被布置在连接区与选择晶体管的沟道区之间，并在编程期间用于占用编程电压并因此用于保护选择晶体管的控制电极绝缘层。

33. 发明申请

US20050189564A1 Integrated semiconductor diode arrangement and integrated semiconductor component 有权
标题翻译：集成半导体二极管布置和集成半导体元件
公开(公告)号：US20050189564A1
公开(公告)日：2005-09-01
申请号：US11042928
申请日：2005-01-25
申请人： Nils Jensen , Andreas Meiser
发明人： Nils Jensen , Andreas Meiser
IPC分类号： H01L27/02 , H01L27/08 , H01L29/06 , H01L29/739
CPC分类号： H01L29/861 , H01L27/0255 , H01L27/0814 , H01L29/0692 , H01L29/87
摘要： An integrated semiconductor diode arrangement is provided. The arrangement includes an anode region and a cathode region that are formed in a semiconductor material region. The anode region has an arrangement of alternately occurring and directly adjacent first and second anode zones, which alternate in their conductivity type. The anode region furthermore has a first particular anode zone of the second conductivity type, the lateral extent of which is comparatively larger than that of the further anode zones of the same conductivity type.
摘要翻译：提供了一种集成半导体二极管布置。该装置包括形成在半导体材料区域中的阳极区域和阴极区域。阳极区域具有交替发生并直接相邻的第一和第二阳极区的布置，其在其导电类型中交替。阳极区域还具有第二导电类型的第一特定阳极区域，其横向范围比相同导电类型的其它阳极区域的横向范围更大。

34. 发明申请

US20190194587A1 FLOATING HORIZONTAL TUBULAR PHOTOBIOREACTOR SYSTEM WITH INTEGRATED MANIFOLDS FOR HOUSING PUMPING AND PROCESS MONITORING AND CONTROL DEVICES 审中-公开
公开(公告)号：US20190194587A1
公开(公告)日：2019-06-27
申请号：US16229154
申请日：2018-12-21
申请人： Michael Welch , Lawrence Walmsley , Andreas Meiser , George Philippidis
发明人： Michael Welch , Lawrence Walmsley , Andreas Meiser , George Philippidis
IPC分类号： C12M1/00 , C12M1/12 , C12M1/09 , C12M1/06 , C12P13/04 , C12P7/06 , C12P5/02 , C12P3/00 , C12P7/64 , C12P21/00
CPC分类号： C12M21/02 , C12M21/12 , C12M23/06 , C12M23/26 , C12M23/56 , C12M27/02 , C12M29/00 , C12M29/20 , C12M41/06 , C12P3/00 , C12P5/023 , C12P7/065 , C12P7/6409 , C12P13/04 , C12P21/00
摘要： This invention relates to a floating horizontal tubular photobioreactor system comprising a photosynthetically active area made of flexible tubes connected to rigid manifolds with an integrated system for mixing, aeration and degassing. This invention further relates to methods of using the floating photobioreactor system.

35. 发明授权

US09076805B2 Current sense transistor with embedding of sense transistor cells 有权
标题翻译：具有感测晶体管单元的嵌入的电流检测晶体管
公开(公告)号：US09076805B2
公开(公告)日：2015-07-07
申请号：US13549463
申请日：2012-07-14
申请人： Steffen Thiele , Andreas Meiser , Markus Zundel
发明人： Steffen Thiele , Andreas Meiser , Markus Zundel
IPC分类号： H01L29/78 , H01L23/58 , H01L29/417 , H03K17/082 , H01L27/12 , G01R19/00
CPC分类号： H01L29/7815 , G01R19/0092 , H01L23/58 , H01L27/124 , H01L29/41741 , H01L29/41766 , H01L29/7813 , H01L2924/0002 , H03K17/0822 , H03K2217/0027 , H01L2924/00
摘要： A semiconductor device a field of transistor cells integrated in a semiconductor body. A number of the transistor cells forming a power transistor and at least one of the transistor cells forming a sense transistor. A first source electrode is arranged on the semiconductor body electrically connected to the transistor cell(s) of the sense transistor but electrically isolated from the transistor cells of the power transistor. A second source electrode is arranged on the semiconductor body and covers the transistor cells of both the power transistor and the sense transistor, and at least partially covering the first source electrode in such a manner that the second source electrode is electrically connected only to the transistor cells of the power transistor but electrically isolated from the transistor cells of the sense transistor.
摘要翻译：一种半导体器件，集成在半导体本体中的晶体管单元的场。形成功率晶体管的多个晶体管单元和形成感测晶体管的至少一个晶体管单元。第一源电极布置在电连接到感测晶体管的晶体管单元的半导体本体上，但与功率晶体管的晶体管单元电隔离。第二源电极布置在半导体本体上并覆盖功率晶体管和感测晶体管的晶体管单元，并且至少部分地覆盖第一源电极，使得第二源电极仅电连接到晶体管功率晶体管的单元，但与感测晶体管的晶体管单元电隔离。

36. 发明授权

US09059256B2 Method for producing a controllable semiconductor component 有权
标题翻译：用于制造可控半导体部件的方法
公开(公告)号：US09059256B2
公开(公告)日：2015-06-16
申请号：US13614076
申请日：2012-09-13
申请人： Andreas Meiser , Markus Zundel
发明人： Andreas Meiser , Markus Zundel
IPC分类号： H01L21/8242 , H01L21/336 , H01L21/76 , H01L21/311 , H01L21/768 , H01L21/28 , H01L23/48 , H01L21/74 , H01L29/40 , H01L29/423 , H01L29/78
CPC分类号： H01L29/7813 , H01L21/28008 , H01L21/28229 , H01L21/743 , H01L21/76877 , H01L21/76898 , H01L23/481 , H01L29/1095 , H01L29/401 , H01L29/407 , H01L29/4236 , H01L29/4916 , H01L29/495 , H01L29/51 , H01L29/66734 , H01L29/7827 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a method for producing a controllable semiconductor component. In a semiconductor body with a top side and a bottom side, a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body are formed in a common etching process. The first trench has a first width and the second trench has a second width greater than the first width. Then, in a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. Subsequently, the oxide layer is removed from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.
摘要翻译：公开了一种制造可控半导体部件的方法。在具有顶侧和底侧的半导体本体中，在公共蚀刻工艺中形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。第一沟槽具有第一宽度，第二沟槽具有大于第一宽度的第二宽度。然后，在共同的工艺中，在第一沟槽和第二沟槽中形成氧化物层，使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘。随后，完全或至少部分地从第一沟槽去除氧化物层，使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。

37. 发明授权

US08637378B2 Semiconductor component and methods for producing a semiconductor component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US08637378B2
公开(公告)日：2014-01-28
申请号：US13156970
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/763 , H01L27/105
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

38. 发明授权

US08476734B2 Semiconductor component and methods for producing a semiconductor component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US08476734B2
公开(公告)日：2013-07-02
申请号：US13156987
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/763 , H01L27/105
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

39. 发明申请

US20120107452A1 AERATION SYSTEMS FOR HORIZONTAL PHOTOBIOREACTORS 审中-公开
标题翻译：水平光电子器件的航空系统
公开(公告)号：US20120107452A1
公开(公告)日：2012-05-03
申请号：US13264396
申请日：2010-04-16
申请人： Andreas Meiser , Lawrence A. Walmsley
发明人： Andreas Meiser , Lawrence A. Walmsley
IPC分类号： C12N1/12 , C12N5/04 , C12N1/20 , C12P1/00 , A23J1/00 , C12P21/00 , B01F3/04 , A23L1/30 , A23K1/18 , C12M1/42 , C12P1/04
CPC分类号： C12M29/20 , C12M21/02 , C12M23/26 , C12M23/56 , C12M29/06
摘要： This invention relates to an aeration system comprising an aeration section, a degassing section and optionally an additional section. This invention also relates to a horizontal photobioreactor comprising the aeration system. This invention further relates to methods of using the photobioreactors.
摘要翻译：本发明涉及曝气系统，其包括曝气部分，脱气部分和任选的附加部分。本发明还涉及一种包括曝气系统的水平光生物反应器。本发明还涉及使用光生物反应器的方法。

40. 发明申请

US20110233721A1 SEMICONDUCTOR COMPONENT AND METHODS FOR PRODUCING A SEMICONDUCTOR COMPONENT 有权
标题翻译：半导体元件的制造方法和半导体元件的制造方法
公开(公告)号：US20110233721A1
公开(公告)日：2011-09-29
申请号：US13156987
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/06
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

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