会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 35. 发明授权
    • Fabrication method of metal oxide semiconductor transistor
    • 金属氧化物半导体晶体管的制造方法
    • US07494865B2
    • 2009-02-24
    • US11459360
    • 2006-07-23
    • Yu-Chi ChenJih-Wen ChouFrank Chen
    • Yu-Chi ChenJih-Wen ChouFrank Chen
    • H01L21/8242
    • H01L29/66628H01L21/28061H01L29/66621H01L29/7834
    • A manufacturing method of metal oxide semiconductor transistor is provided. A substrate is provided. A source/drain extension region is formed in the substrate. A pad material layer with low dielectric constant is formed on the substrate. A trench is formed in the substrate and the pad material layer. A gate dielectric layer is formed on the surface of the substrate in the trench. A stacked gate structure is formed in the trench, wherein the top surface of a conductive layer of the stacked gate structure is higher than the surface of the pad material layer. A spacer material layer is formed conformably on the substrate. Portions of the spacer material layer and the pad material layer are removed so as to form a pair of first spacers and a pair of pad blocks. A source/drain is formed on the substrate beside the stacked gate structure.
    • 提供了金属氧化物半导体晶体管的制造方法。 提供基板。 源极/漏极延伸区域形成在衬底中。 在基板上形成具有低介电常数的焊盘材料层。 在衬底和衬垫材料层中形成沟槽。 栅极电介质层形成在沟槽中的衬底的表面上。 在沟槽中形成堆叠的栅极结构,其中层叠栅极结构的导电层的顶表面高于焊盘材料层的表面。 衬垫材料层在衬底上顺应地形成。 去除间隔材料层和垫材料层的一部分,以形成一对第一间隔物和一对垫块。 源极/漏极形成在堆叠栅极结构旁边的衬底上。
    • 36. 发明申请
    • METAL OXIDE SEMICONDUCTOR TRANSISTOR AND FABRICATION METHOD THEREOF
    • 金属氧化物半导体晶体管及其制造方法
    • US20070267691A1
    • 2007-11-22
    • US11459360
    • 2006-07-23
    • Yu-Chi ChenJih-Wen ChouFrank Chen
    • Yu-Chi ChenJih-Wen ChouFrank Chen
    • H01L29/94
    • H01L29/66628H01L21/28061H01L29/66621H01L29/7834
    • A manufacturing method of metal oxide semiconductor transistor is provided. A substrate is provided. A source/drain extension region is formed in the substrate. A pad material layer with low dielectric constant is formed on the substrate. A trench is formed in the substrate and the pad material layer. A gate dielectric layer is formed on the surface of the substrate in the trench. A stacked gate structure is formed in the trench, wherein the top surface of a conductive layer of the stacked gate structure is higher than the surface of the pad material layer. A spacer material layer is formed conformably on the substrate. Portions of the spacer material layer and the pad material layer are removed so as to form a pair of first spacers and a pair of pad blocks. A source/drain is formed on the substrate beside the stacked gate structure.
    • 提供了金属氧化物半导体晶体管的制造方法。 提供基板。 源极/漏极延伸区域形成在衬底中。 在基板上形成具有低介电常数的焊盘材料层。 在衬底和衬垫材料层中形成沟槽。 栅极电介质层形成在沟槽中的衬底的表面上。 在沟槽中形成堆叠的栅极结构,其中层叠栅极结构的导电层的顶表面高于焊盘材料层的表面。 衬垫材料层在衬底上顺应地形成。 去除间隔材料层和垫材料层的一部分,以形成一对第一间隔物和一对垫块。 源极/漏极形成在堆叠栅极结构旁边的衬底上。