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31. 发明授权

US09213653B2 Memory integrity 有权
标题翻译：内存完整性
公开(公告)号：US09213653B2
公开(公告)日：2015-12-15
申请号：US14097414
申请日：2013-12-05
申请人： David M. Durham , Men Long
发明人： David M. Durham , Men Long
IPC分类号： G06F21/00 , H04L29/06 , G06F12/14 , G06F21/60 , G06F21/55 , G06F21/64 , G06F7/52 , G06F21/62
CPC分类号： H04L9/0618 , G06F11/1068 , G06F12/0868 , G06F12/1408 , G06F21/554 , G06F21/602 , G06F21/64 , G06F2212/1021 , G06F2212/1052 , G11C29/52 , G11C2029/1804 , G11C2029/3602 , H04L9/0637 , H04L9/3239 , H04L9/3242 , H04L9/3247 , Y02D10/13
摘要： Systems and methods may provide for identifying unencrypted data including a plurality of bits, wherein the unencrypted data may be encrypted and stored in memory. In addition, a determination may be made as to whether the unencrypted data includes a random distribution of the plurality of bits. An integrity action may be implemented, for example, when the unencrypted data includes a random distribution of the plurality of bits.
摘要翻译：系统和方法可以提供用于识别包括多个比特的未加密数据，其中未加密数据可以被加密并存储在存储器中。此外，可以确定未加密数据是否包括多个比特的随机分布。可以实现完整性动作，例如，当未加密数据包括多个比特的随机分布时。

32. 发明申请

US20150161059A1 MEMORY INTEGRITY 有权
标题翻译：记忆完整性
公开(公告)号：US20150161059A1
公开(公告)日：2015-06-11
申请号：US14097414
申请日：2013-12-05
申请人： David M. Durham , Men Long
发明人： David M. Durham , Men Long
IPC分类号： G06F12/14 , G06F21/60
CPC分类号： H04L9/0618 , G06F11/1068 , G06F12/0868 , G06F12/1408 , G06F21/554 , G06F21/602 , G06F21/64 , G06F2212/1021 , G06F2212/1052 , G11C29/52 , G11C2029/1804 , G11C2029/3602 , H04L9/0637 , H04L9/3239 , H04L9/3242 , H04L9/3247 , Y02D10/13
摘要： Systems and methods may provide for identifying unencrypted data including a plurality of bits, wherein the unencrypted data may be encrypted and stored in memory. In addition, a determination may be made as to whether the unencrypted data includes a random distribution of the plurality of bits. An integrity action may be implemented, for example, when the unencrypted data includes a random distribution of the plurality of bits.
摘要翻译：系统和方法可以提供用于识别包括多个比特的未加密数据，其中未加密数据可以被加密并存储在存储器中。此外，可以确定未加密数据是否包括多个比特的随机分布。可以实现完整性动作，例如，当未加密数据包括多个比特的随机分布时。

33. 发明授权

US09053346B2 Low-overhead cryptographic method and apparatus for providing memory confidentiality, integrity and replay protection 有权
标题翻译：低开销的加密方法和装置，用于提供内存保密性，完整性和重放保护
公开(公告)号：US09053346B2
公开(公告)日：2015-06-09
申请号：US13976930
申请日：2011-12-28
申请人： Siddhartha Chhabra , Uday R. Savagaonkar , Carlos V. Rozas , Alpa T. Narendra Trivedi , Men Long , David M. Durham
发明人： Siddhartha Chhabra , Uday R. Savagaonkar , Carlos V. Rozas , Alpa T. Narendra Trivedi , Men Long , David M. Durham
IPC分类号： G06F12/00 , G06F21/64 , G06F12/14 , G06F21/00 , G06F21/77
CPC分类号： G06F21/64 , G06F12/1408 , G06F21/00 , G06F21/77
摘要： A method and system to provide a low-overhead cryptographic scheme that affords memory confidentiality, integrity and replay-protection by removing the critical read-after-write dependency between the various levels of the cryptographic tree. In one embodiment of the invention, the cryptographic processing of a child node can be pipelined with that of the parent nodes. This parallelization provided by the invention results in an efficient utilization of the cryptographic pipeline, enabling significantly lower performance overheads.
摘要翻译：一种提供低开销加密方案的方法和系统，其通过去除加密树的各个级别之间的关键读后依赖关系来提供内存机密性，完整性和重放保护。在本发明的一个实施例中，子节点的密码处理可以与母节点的密码处理流水线化。由本发明提供的这种并行化导致密码流水线的有效利用，能够显着降低性能开销。

34. 发明申请

US20170097898A1 TECHNOLOGIES FOR EXECUTE ONLY TRANSACTIONAL MEMORY 审中-公开
公开(公告)号：US20170097898A1
公开(公告)日：2017-04-06
申请号：US14974972
申请日：2015-12-18
申请人： David M. Durham , Michael Lemay , Men Long
发明人： David M. Durham , Michael Lemay , Men Long
IPC分类号： G06F12/10 , G06F9/30 , G06F12/14
CPC分类号： G06F12/1027 , G06F9/3005 , G06F12/1408 , G06F12/1475 , G06F2212/402 , G06F2212/50 , Y02D10/13
摘要： Technologies for execute only transactional memory include a computing device with a processor and a memory. The processor includes an instruction translation lookaside buffer (iTLB) and a data translation lookaside buffer (dTLB). In response to a page miss, the processor determines whether a page physical address is within an execute only transactional (XOT) range of the memory. If within the XOT range, the processor may populate the iTLB with the page physical address and prevent the dTLB from being populated with the page physical address. In response to an asynchronous change of control flow such as an interrupt, the processor determines whether a last iTLB translation is within the XOT range. If within the XOT range, the processor clears or otherwise secures the processor register state. The processor ensures that an XOT range starts execution at an authorized entry point. Other embodiments are described and claimed.

35. 发明申请

US20160182223A1 Encryption Interface 有权
标题翻译：加密界面
公开(公告)号：US20160182223A1
公开(公告)日：2016-06-23
申请号：US14581946
申请日：2014-12-23
申请人： Eugene M. Kishinevsky , Uday R. Savagaonkar , Alpa T. Narendra Trivedi , Siddhartha Chhabra , Baiju V. Patel , Men Long , Kirk S. Yap , David M. Durham
发明人： Eugene M. Kishinevsky , Uday R. Savagaonkar , Alpa T. Narendra Trivedi , Siddhartha Chhabra , Baiju V. Patel , Men Long , Kirk S. Yap , David M. Durham
IPC分类号： H04L9/06 , G06F12/14 , G06F21/62
CPC分类号： H04L9/0631 , G06F12/1408 , G06F12/1425 , G06F21/602 , G06F21/85 , G06F2212/1052 , G06F2212/402 , G09C1/00 , H04L2209/125 , Y02D10/13
摘要： Encryption interface technologies are described. A processor can include a system agent, an encryption interface, and a memory controller. The system agent can communicate data with a hardware functional block. The encryption interface can be coupled between the system agent and a memory controller. The encryption interface can receive a plaintext request from the system agent, encrypt the plaintext request to obtain an encrypted request, and communicate the encrypted request to the memory controller. The memory controller can communicate the encrypted request to a main memory of the computing device.
摘要翻译：描述加密接口技术。处理器可以包括系统代理，加密接口和存储器控制器。系统代理可以与硬件功能块通信数据。加密接口可以耦合在系统代理和存储器控制器之间。加密接口可以从系统代理接收明文请求，加密明文请求以获得加密请求，并将加密的请求传送到存储器控制器。存储器控制器可以将加密的请求传送到计算设备的主存储器。

36. 发明授权

US08819455B2 Parallelized counter tree walk for low overhead memory replay protection 有权
标题翻译：并行计数器树行走低开销内存重放保护
公开(公告)号：US08819455B2
公开(公告)日：2014-08-26
申请号：US13646105
申请日：2012-10-05
申请人： Siddhartha Chhabra , Uday R. Savagaonkar , David M. Durham , Niranjan L. Cooray , Men Long , Carlos V. Rozas , Alpa T. Narendra Trivedi
发明人： Siddhartha Chhabra , Uday R. Savagaonkar , David M. Durham , Niranjan L. Cooray , Men Long , Carlos V. Rozas , Alpa T. Narendra Trivedi
IPC分类号： G06F11/30 , G06F12/14
CPC分类号： G06F12/1408 , G06F21/71
摘要： A processor includes a memory encryption engine that provides replay and confidentiality protections to a memory region. The memory encryption engine performs low-overhead parallelized tree walks along a counter tree structure. The memory encryption engine upon receiving an incoming read request for the protected memory region, performs a dependency check operation to identify dependency between the incoming read request and an in-process request and to remove the dependency when the in-process request is a read request that is not currently suspended.
摘要翻译：处理器包括为存储器区域提供重放和保密性保护的存储器加密引擎。存储器加密引擎沿着计数器树结构执行低架构并行化的树行走。存储器加密引擎在接收到对受保护的存储器区域的传入读取请求时，执行依赖性检查操作以识别传入的读取请求与进程内请求之间的依赖关系，并且当进程内请求是读取请求时，去除依赖关系目前尚未暂停。

37. 发明申请

US20140208109A1 METHOD AND SYSTEM FOR PROTECTING MEMORY INFORMATION IN A PLATFORM 有权
标题翻译：保护平台内存信息的方法和系统
公开(公告)号：US20140208109A1
公开(公告)日：2014-07-24
申请号：US13976935
申请日：2011-12-28
申请人： Alpa T. Narendra Trivedi , David M. Durham , Men Long , Siddhartha Chhabra , Uday R. Savagaonkar , Carlos V. Rozas
发明人： Alpa T. Narendra Trivedi , David M. Durham , Men Long , Siddhartha Chhabra , Uday R. Savagaonkar , Carlos V. Rozas
IPC分类号： H04L29/06
CPC分类号： G06F21/64 , G06F12/1408 , G06F21/78 , G06F21/79 , H04L9/0643 , H04L2209/12
摘要： A method and system to provide an effective, scalable and yet low-cost solution for Confidentiality, Integrity and Replay protection for sensitive information stored in a memory and prevent an attacker from observing and/or modifying the state of the system. In one embodiment of the invention, the system has strong hardware protection for its memory contents via XTS-tweak mode of encryption where the tweak is derived based on “Global and Local Counters”. This scheme offers to enable die-area efficient Replay protection for any sized memory by allowing multiple counter levels and facilitates using small counter-sizes to derive the “tweak” used in the XTS encryption without sacrificing cryptographic strength.
摘要翻译：一种方法和系统，为存储在存储器中的敏感信息提供有效，可扩展且低成本的保密性，完整性和重放保护解决方案，并防止攻击者观察和/或修改系统的状态。在本发明的一个实施例中，系统通过经由XTS调整加密模式对其存储器内容具有强大的硬件保护，其中基于“全局和本地计数器”导出调整。该方案提供了通过允许多个计数器级别为任何大小的存储器提供芯片区域高效的重放保护，并有助于使用小型计数器来导出XTS加密中使用的“调整”，而不会牺牲加密强度。

38. 发明申请

US20220012055A1 APPARATUS, COMPUTER-READABLE MEDIUM, AND METHOD FOR REDUCING BOUNDS CHECKING OVERHEAD BY INSTRUMENTING POINTER ARITHMETIC 有权
公开(公告)号：US20220012055A1
公开(公告)日：2022-01-13
申请号：US17485347
申请日：2021-09-25
申请人： Michael Lemay , David M. Durham
发明人： Michael Lemay , David M. Durham
IPC分类号： G06F9/30
摘要： Methods, apparatus, systems, and articles of manufacture are disclosed that perform bounds checking on authorized memory allocations during pointer arithmetic. In some examples, instruction decode circuitry decodes an update pointer instruction for a pointer. In some examples, bounds checking circuitry determines an authorized allocation for the pointer, determines one or more exclusion zones and poison zones for the pointer. In some examples, bounds checking circuitry updates the pointer and generates a fault if the pointer points to one of the exclusion zones and poisons the pointer if the pointer points to one of the poison zones.

39. 发明申请

US20180046803A1 TECHNOLOGIES FOR HARDWARE ASSISTED NATIVE MALWARE DETECTION 审中-公开
公开(公告)号：US20180046803A1
公开(公告)日：2018-02-15
申请号：US15235806
申请日：2016-08-12
申请人： Xiaoning Li , Ravi L. Sahita , David M. Durham
发明人： Xiaoning Li , Ravi L. Sahita , David M. Durham
IPC分类号： G06F21/56 , G06F21/52 , G06F11/14
CPC分类号： G06F21/566 , G06F11/1417 , G06F11/302 , G06F11/3089 , G06F21/54 , G06F2201/84
摘要： Technologies for hardware assisted native malware detection include a computing device. The computing device includes one or more processors with hook logic to monitor for execution of branch instructions of an application, compare the monitored branch instructions to filter criteria, and determine whether a monitored branch instruction satisfies the filter criteria. Additionally, the computing device includes a malware detector to provide the filter criteria to the hook logic, provide an address of a callback function to the hook logic to be executed in response to a determination that a monitored branch instruction satisfies the filter criteria, and analyze, in response to execution of the callback function, the monitored branch instruction to determine whether the monitored branch instruction is indicative of malware. Other embodiments are also described and claimed.

40. 发明申请

US20140215602A1 RANGE BASED USER IDENTIFICATION AND PROFILE DETERMINATION 有权
标题翻译：基于范围的用户识别和配置文件的确定
公开(公告)号：US20140215602A1
公开(公告)日：2014-07-31
申请号：US13995507
申请日：2011-12-30
申请人： Michelle H. Chuaprasort , David M. Durham , Mark D. Boucher , Sanjay Bakshi
发明人： Michelle H. Chuaprasort , David M. Durham , Mark D. Boucher , Sanjay Bakshi
IPC分类号： G06F21/35
CPC分类号： H04L63/0876 , G06F21/35 , G06Q10/10 , G06Q30/02 , H04L67/306
摘要： An embodiment includes a main compute node that detects the physical presence of a first user and subsequently loads a profile for the first user. The main compute node may detect the first user's presence based on detecting a first compute node corresponding to the first user. For example, the main compute node may be a desktop computer that detects the presence of the first user's Smart phone, which is nearby the first user. The main compute node may unload the first user's profile when the main compute node no longer detects the first user's presence. Upon detecting a second user's presence, the main computer may load a profile for the second user. The profile may include cookies and/or other identifiers for the second user. The profile may facilitate the second user's navigation of a computing environment (e.g. web pages). Other embodiments are addressed herein.
摘要翻译：一个实施例包括主计算节点，其检测第一用户的物理存在并随后加载用于第一用户的简档。主计算节点可以基于检测对应于第一用户的第一计算节点来检测第一用户的存在。例如，主计算节点可以是检测在第一用户附近的第一用户的智能电话的存在的台式计算机。当主计算节点不再检测到第一用户的存在时，主计算节点可以卸载第一用户的简档。当检测到第二用户的存在时，主计算机可以加载用于第二用户的简档。该简档可以包括用于第二用户的cookie和/或其他标识符。该简档可以促进第二用户导航计算环境（例如，网页）。其他实施例在这里被解决。

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