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31. 发明授权

US09741645B2 Dense interconnect with solder cap (DISC) formation with laser ablation and resulting semiconductor structures and packages 有权
公开(公告)号：US09741645B2
公开(公告)日：2017-08-22
申请号：US13995629
申请日：2011-12-21
申请人： Chuan Hu
发明人： Chuan Hu
IPC分类号： H01L23/02 , H01L23/498 , H01L21/768 , H01L23/00 , H01L23/538
CPC分类号： H01L23/49811 , H01L21/76885 , H01L23/49816 , H01L23/5389 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/05647 , H01L2224/11332 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/12105 , H01L2224/13022 , H01L2224/131 , H01L2224/13147 , H01L2224/13294 , H01L2224/133 , H01L2224/16227 , H01L2224/97 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/15153 , H01L2924/18162 , H01L2924/3511 , H01L2924/00 , H01L2224/82 , H01L2924/00014 , H01L2924/014 , H01L2224/81
摘要： Dense interconnect with solder cap (DISC) formation with laser ablation and resulting semiconductor structures and packages are described. For example, a method of fabricating a semiconductor structure includes forming an insulative material stack above a plurality of solder bump landing pads. The solder bump landing pads are above an active side of a semiconductor die. A plurality of trenches is formed in the insulative material stack by laser ablation to expose a corresponding portion of each of the plurality of solder bump landing pads. A solder bump is formed in each of the plurality of trenches. A portion of the insulative material stack is then removed.

32. 发明申请

US20140240943A1 SOLDER IN CAVITY INTERCONNECTION TECHNOLOGY 审中-公开
标题翻译：在CAVITY INTERCONNECTION技术中焊接
公开(公告)号：US20140240943A1
公开(公告)日：2014-08-28
申请号：US14269571
申请日：2014-05-05
申请人： Chuan Hu
发明人： Chuan Hu
IPC分类号： H05K1/02 , H05K1/11
CPC分类号： H05K1/0271 , B23K1/0018 , B23K1/203 , B23K3/0623 , B23K2101/40 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/05647 , H01L2224/10135 , H01L2224/10145 , H01L2224/11442 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/1403 , H01L2224/16238 , H01L2224/81139 , H01L2224/81191 , H01L2224/81193 , H01L2224/81201 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2924/3841 , H05K1/11 , H05K13/0465 , H05K2201/10734 , Y10T428/12222 , H01L2924/00014 , H01L2924/00
摘要： An interconnection technology may use molded solder to define solder balls. A mask layer may be patterned to form cavities and solder paste deposited in the cavities. Upon heating, solder balls are formed. The cavity is defined by spaced walls to keep the solder ball from bridging during a bonding process. In some embodiments, the solder bumps connected to the solder balls may have facing surfaces which are larger than the facing surfaces of the solder ball.
摘要翻译：互连技术可以使用模制焊料来限定焊球。掩模层可以被图案化以形成沉积在空腔中的空腔和焊膏。加热时，形成焊球。空腔由间隔壁限定，以在焊接过程中保持焊球不起桥接作用。在一些实施例中，连接到焊球的焊料凸块可以具有大于焊球的相对表面的相对表面。

33. 发明申请

US20130206820A1 SOLDER IN CAVITY INTERCONNECTION TECHNOLOGY 审中-公开
标题翻译：在CAVITY INTERCONNECTION技术中焊接
公开(公告)号：US20130206820A1
公开(公告)日：2013-08-15
申请号：US13850581
申请日：2013-03-26
申请人： Chuan Hu
发明人： Chuan Hu
IPC分类号： H05K13/04 , H05K1/11
CPC分类号： H05K1/0271 , B23K1/0018 , B23K1/203 , B23K3/0623 , B23K2101/40 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/05647 , H01L2224/10135 , H01L2224/10145 , H01L2224/11442 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/1403 , H01L2224/16238 , H01L2224/81139 , H01L2224/81191 , H01L2224/81193 , H01L2224/81201 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2924/3841 , H05K1/11 , H05K13/0465 , H05K2201/10734 , Y10T428/12222 , H01L2924/00014 , H01L2924/00
摘要： An interconnection technology may use molded solder to define solder balls. A mask layer may be patterned to form cavities and solder paste deposited in the cavities. Upon heating, solder balls are formed. The cavity is defined by spaced walls to keep the solder ball from bridging during a bonding process. In some embodiments, the solder bumps connected to the solder balls may have facing surfaces which are larger than the facing surfaces of the solder ball.
摘要翻译：互连技术可以使用模制焊料来限定焊球。掩模层可以被图案化以形成沉积在空腔中的空腔和焊膏。加热时，形成焊球。空腔由间隔壁限定，以在焊接过程中保持焊球不起桥接作用。在一些实施例中，连接到焊球的焊料凸块可以具有大于焊球的相对表面的相对表面。

34. 发明授权

US07888183B2 Thinned die integrated circuit package 有权
标题翻译：薄模集成电路封装
公开(公告)号：US07888183B2
公开(公告)日：2011-02-15
申请号：US12042392
申请日：2008-03-05
申请人： Cheng-Yi Liu , Johanna Swan , Steven Towle , Anna George, legal representative , Chuan Hu
发明人： Cheng-Yi Liu , Johanna Swan , Steven Towle , Chuan Hu
IPC分类号： H01L21/44
CPC分类号： H01L24/97 , H01L21/4871 , H01L23/142 , H01L23/36 , H01L23/367 , H01L23/49816 , H01L23/5389 , H01L24/11 , H01L24/19 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/05124 , H01L2224/05147 , H01L2224/13099 , H01L2224/16225 , H01L2224/16227 , H01L2224/20 , H01L2224/211 , H01L2224/32245 , H01L2224/73253 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15174 , H01L2924/15311 , H01L2924/3011 , H01L2224/83 , H01L2224/82 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
摘要翻译：一种方法和装置提供具有改进的散热和更容易制造的集成电路封装。集成电路封装包括使用导热材料附着到散热器的薄化半导体管芯。减薄的模头降低了模具/散热器组合的热阻，以改善从模具的热提取以及消除制造中的加工步骤。此外，薄型模具变得更加柔顺，因为它承受散热器的热/机械性能，以减少模具的应力引起的开裂。

35. 发明授权

US07560640B2 Densely packed thermoelectric cooler 有权
标题翻译：密集热电冷却器
公开(公告)号：US07560640B2
公开(公告)日：2009-07-14
申请号：US10996195
申请日：2004-11-22
申请人： Chuan Hu , David S. Chau
发明人： Chuan Hu , David S. Chau
IPC分类号： H01L35/28
CPC分类号： H01L35/34 , H01L23/38 , H01L35/32 , H01L2924/0002 , H01L2924/00
摘要： Embodiments of the invention provide a thin film thermoelectric cooler. The cooler may have a high packing density that provides good cooling performance. The cooler may be formed by forming a first set of cooling elements, depositing a conformal insulating layer on the first set, then forming a second set of cooling elements between the first set of elements.
摘要翻译：本发明的实施例提供一种薄膜热电冷却器。冷却器可具有高填充密度，提供良好的冷却性能。可以通过形成第一组冷却元件，在第一组上沉积保形绝缘层，然后在第一组元件之间形成第二组冷却元件来形成冷却器。

36. 发明申请

US20070217147A1 INTEGRATED CIRCUIT COOLANT MICROCHANNEL ASSEMBLY WITH TARGETED CHANNEL CONFIGURATION 审中-公开
标题翻译：集成电路冷凝器微通道组件与目标通道配置
公开(公告)号：US20070217147A1
公开(公告)日：2007-09-20
申请号：US11749444
申请日：2007-05-16
申请人： Je-Young Chang , Ioan Sauciuc , Chuan Hu , Chia-Pin Chiu , Gregory Chrysler , Ravi Prasher , Rajiv Mongia , Himanshu Pokharna , Eric DiStefano
发明人： Je-Young Chang , Ioan Sauciuc , Chuan Hu , Chia-Pin Chiu , Gregory Chrysler , Ravi Prasher , Rajiv Mongia , Himanshu Pokharna , Eric DiStefano
IPC分类号： H05K7/20
CPC分类号： H01L23/473 , F28F3/12 , F28F2260/02 , H01L2924/0002 , H01L2924/00
摘要： A microchannel structure has microchannels formed therein. The microchannels are to transport a coolant and to be proximate to an integrated circuit to transfer heat from the integrated circuit to the coolant. At least one of the microchannels has a length extent and has a first section at a first location along the length extent and a second section at a second location along the length extent. The first section of the microchannel has a first aspect ratio and the second section is divided into at least two sub-channels. Each sub-channel has a respective second aspect ratio that is greater than the first aspect ratio.
摘要翻译：微通道结构中形成有微通道。微通道将输送冷却剂并靠近集成电路以将热量从集成电路传递到冷却剂。微通道中的至少一个具有长度范围，并且具有沿着长度范围的第一位置处的第一部分和沿着长度范围的第二位置处的第二部分。微通道的第一部分具有第一宽高比，第二部分被划分为至少两个子通道。每个子通道具有大于第一宽高比的相应的第二宽高比。

37. 发明授权

US07095111B2 Package with integrated wick layer and method for heat removal 有权
标题翻译：具有集成芯吸层的封装和散热方法
公开(公告)号：US07095111B2
公开(公告)日：2006-08-22
申请号：US10403645
申请日：2003-03-31
申请人： Chuan Hu , Richard D. Emery
发明人： Chuan Hu , Richard D. Emery
IPC分类号： H01L23/34
CPC分类号： H01L23/427 , H01L23/36 , H01L24/24 , H01L24/72 , H01L24/82 , H01L2224/24227 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/10329 , H01L2924/15153 , H01L2924/15165 , H01L2924/351 , H01L2924/00
摘要： A package for a die includes a porous wick layer disposed between the die and a substrate. A sealed chamber between the die and substrate includes a phase-change fluid to transfer heat from a substrate side of the die to a heat spreader. Interconnects coupling bonding pads of the die to the substrate may pass through the chamber and through vias in the wick layer. In embodiments, the wick layer may have a coefficient of thermal expansion (CTE) matching a CTE of the die of the heat spreader. Heat generated by the die may evaporate the fluid in a die region and the evaporated fluid may condense in a heat spreader region. The wick layer returns the condensed fluid from the heat spreader region to the die region to complete the cycle. The fluid may be non-corrosive with respect to the interconnects and may be an electrical insulator. In embodiments, the wick layer in the heat spreader region may be disposed on the heat spreader in a pattern to efficiently draw the condensed fluid to the die region. In other embodiments, the wick layer may comprise materials of different pore size and porosity to efficiently draw the condensed fluid to the die region.
摘要翻译：用于管芯的封装包括设置在管芯和基板之间的多孔芯层。模具和衬底之间的密封腔室包括相互转换流体，以将热量从模具的衬底侧传递到散热器。将管芯的接合焊盘耦合到衬底的互连可以穿过腔室并穿过芯层中的通孔。在实施例中，芯吸层可以具有与散热器的管芯的CTE匹配的热膨胀系数（CTE）。由模具产生的热量可能使模具区域中的流体蒸发并且蒸发的流体可以在散热器区域中冷凝。芯层将冷凝流体从散热器区域返回到模具区域以完成循环。流体相对于互连件可以是非腐蚀性的并且可以是电绝缘体。在实施例中，散热器区域中的芯吸层可以以图案方式设置在散热器上，以有效地将冷凝的流体抽吸到管芯区域。在其它实施例中，芯层可以包括不同孔径和孔隙率的材料，以有效地将冷凝的流体抽吸到模具区域。

38. 发明申请

US20060177994A1 Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devices 有权
公开(公告)号：US20060177994A1
公开(公告)日：2006-08-10
申请号：US11397412
申请日：2006-04-03
申请人： Peter Tolchinsky , Irwin Yablok , Chuan Hu , Richard Emery
发明人： Peter Tolchinsky , Irwin Yablok , Chuan Hu , Richard Emery
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/6835 , H01L21/3063 , H01L21/76254 , H01L23/367 , H01L24/81 , H01L2221/68359 , H01L2221/68368 , H01L2224/16 , H01L2224/73204 , H01L2224/81801 , H01L2924/01019 , H01L2924/14 , H01L2924/181 , Y10S438/96 , H01L2924/00012 , H01L2924/00
摘要： Embodiments of the invention use silicon on porous silicon wafers to produce a reduced-thickness IC device wafers. After device manufacturing, a temporary support is bonded to the device layer. The uppermost silicon layer is then separated from the silicon substrate by splitting the porous silicon layer. The porous silicon layer and temporary support are then removed and packaging is completed. Embodiments of the invention provide reliable, low cost methods and apparatuses for producing reduced-thickness IC device wafers to substantially increase thermal conductivity between the device layer of an IC device and a heat sink. In alternative embodiments, the layered silicon substrate includes an insulator layer on a layer of porous silicon and a silicon layer on the insulator layer.

39. 发明申请

US20050287766A1 WAFER-LEVEL DIAMOND SPREADER 失效
标题翻译：水平钻石螺旋桨
公开(公告)号：US20050287766A1
公开(公告)日：2005-12-29
申请号：US10876511
申请日：2004-06-24
申请人： Gregory Chrysler , Chuan Hu
发明人： Gregory Chrysler , Chuan Hu
IPC分类号： H01L21/30 , H01L21/46 , H01L21/48 , H01L21/78 , H01L23/373 , H01L29/15 , H01L31/0312
CPC分类号： H01L21/4882 , H01L21/78 , H01L23/3732 , H01L23/3735 , H01L2224/0401 , H01L2224/04026 , H01L2224/16225 , H01L2224/16227 , H01L2224/274 , H01L2224/73253 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/15312 , H01L2924/00
摘要： An embodiment of the present invention is a technique to heat spread at wafer level. A silicon wafer is thinned. A chemical vapor deposition diamond (CVDD) wafer processed. The CVDD wafer is bonded to the thinned silicon wafer to form a bonded wafer. Metallization is plated on back side of the CVDD wafer. The CVDD wafer is reflowed to flatten the back side.
摘要翻译：本发明的一个实施例是一种在晶片级散热的技术。硅晶片变薄。化学气相沉积金刚石（CVDD）晶圆处理。 CVDD晶片被结合到变薄的硅晶片以形成接合晶片。金属化电镀在CVDD晶片的背面。 CVDD晶片被回流以使背面变平。

40. 发明申请

US20150279824A1 ELECTRONIC PACKAGE AND METHOD OF FORMING AN ELECTRONIC PACKAGE 审中-公开
标题翻译：电子封装和形成电子封装的方法
公开(公告)号：US20150279824A1
公开(公告)日：2015-10-01
申请号：US14228685
申请日：2014-03-28
申请人： Vijay K. Nair , Chuan Hu
发明人： Vijay K. Nair , Chuan Hu
IPC分类号： H01L25/16 , H01L23/31 , H01L21/768 , H01L23/29 , H01L23/528 , H01L23/532 , H01L25/00 , H01L21/56
CPC分类号： H01L25/16 , H01L21/568 , H01L23/3128 , H01L23/49816 , H01L23/5383 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/24137 , H01L2224/24195 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105
摘要： An electronic package that includes a mold that includes at least one passive component, each of the passive components including electric conductors that are exposed from the mold, and a first conductive layer directly attached to the mold such that the conductive layer touches the mold and the electrical conductors that are exposed from the mold. A method that includes removing a temporary carrier from a mold that includes electronic devices, wherein electric conductors on the electronic devices are exposed once the temporary carrier is removed from the mold, and covering the mold with a first conductive layer such that the first conductive layer covers the mold and is electrically connected to the exposed electric conductors on the electronic devices.
摘要翻译：一种电子封装，其包括模具，所述模具包括至少一个无源部件，每个所述无源部件包括从所述模具露出的电导体，以及直接附接到所述模具的第一导电层，使得所述导电层接触所述模具，从模具露出的导电体。一种包括从包括电子设备的模具中移除临时载体的方法，其中一旦临时载体从模具中移出，电子设备上的电导体就被暴露，并且用第一导电层覆盖模具，使得第一导电层覆盖模具并与电子设备上暴露的电导体电连接。

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