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    • 32. 发明申请
    • Systems and Methods for Power Measurement in a Data Processing System
    • 数据处理系统中功率测量的系统和方法
    • US20130111250A1
    • 2013-05-02
    • US13284684
    • 2011-10-28
    • Shaohua YangZongwang LiFan ZhangYang HanChung-Li Wang
    • Shaohua YangZongwang LiFan ZhangYang HanChung-Li Wang
    • G06F11/30
    • G06F11/3062G06F1/30
    • Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a data detector circuit, a data decoder circuit, and a power usage control circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output. The data decoder circuit is operable to apply a data decode algorithm to a data set derived from the detected output to yield a decoded output. The power usage control circuit is operable to force a defined number of global iterations applied to the data input by the data detector circuit and the data decoder circuit regardless of convergence of the data decode algorithm.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了一种数据处理电路,其包括:数据检测器电路,数据解码器电路和电力使用控制电路。 数据检测器电路可操作以将数据检测算法应用于数据输入以产生检测到的输出。 数据解码器电路可操作以将数据解码算法应用于从检测到的输出导出的数据集,以产生解码输出。 功率使用控制电路可操作以强制对数据检测器电路和数据解码器电路输入的数据施加的定义数量的全局迭代,而与数据解码算法的收敛无关。
    • 39. 发明申请
    • Systems and Methods for Data Addressing in a Storage Device
    • 存储设备中数据寻址的系统和方法
    • US20120300332A1
    • 2012-11-29
    • US13113219
    • 2011-05-23
    • Yang HanZongwang LiShaohua YangWu Chang
    • Yang HanZongwang LiShaohua YangWu Chang
    • G11B5/02G11B5/09
    • G11B5/012G11B5/09G11B20/1217G11B20/1833G11B20/1866G11B2020/1222G11B2020/1267G11B2020/1288G11B2220/2516
    • Various embodiments of the present invention provide systems and methods for format efficient data storage. As an example, a data storage device is described that includes: a storage medium, a read/write head assembly, and a read channel circuit. The read/write head assembly is disposed in relation to the storage medium and operable to sense information corresponding to an encoded codeword. The read channel circuit is operable to receive the encoded codeword. The read channel circuit includes a missing symbols insertion circuit, a codeword de-scramble circuit, an address insertion circuit, and a data decoder circuit. The missing symbols insertion circuit, the codeword de-scramble circuit, and the address insertion circuit together are operable to pad a derivative of the encoded codeword with a plurality of symbols, to de-scramble the derivative of the encoded codeword, and to insert address information corresponding to the derivative of the encoded codeword to yield a modified encoded codeword. The data decoder circuit is operable to apply a data decoding algorithm to the modified encoded codeword to yield a decoded output.
    • 本发明的各种实施例提供了用于格式化数据存储的系统和方法。 作为示例,描述了数据存储设备,其包括:存储介质,读/写头组件和读通道电路。 读/写头组件相对于存储介质设置并且可操作以感测与编码码字对应的信息。 读通道电路可操作以接收编码码字。 读通道电路包括缺失符号插入电路,码字解扰电路,地址插入电路和数据解码器电路。 丢失的符号插入电路,码字解扰电路和地址插入电路在一起可操作以用多个符号填充经编码的码字的导数,以解码编码码字的导数,并插入地址 对应于编码码字的导数的信息以产生经修改的编码码字。 数据解码器电路可操作以将数据解码算法应用到经修改的编码码字以产生解码输出。