专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20080222116A1 LONGEST PREFIX MATCH (LPM) ALGORITHM IMPLEMENTATION FOR A NETWORK PROCESSOR 失效
标题翻译：用于网络处理器的最大前缀匹配（LPM）算法实现
公开(公告)号：US20080222116A1
公开(公告)日：2008-09-11
申请号：US12103140
申请日：2008-04-15
申请人： Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Antonios Maragkos , Piyush Chunilal Patel , Michael Steven Siegel , Fabrice Jean Verplanken
发明人： Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Antonios Maragkos , Piyush Chunilal Patel , Michael Steven Siegel , Fabrice Jean Verplanken
IPC分类号： G06F17/30
CPC分类号： G06F17/30985 , H04L45/7457 , Y10S707/99931 , Y10S707/99933 , Y10S707/99936 , Y10S707/99942 , Y10S707/99943 , Y10S707/99945
摘要： Novel data structures, methods and apparatus for finding the longest prefix match search when searching tables with variable length patterns or prefixes. To find the exact match or the best matching prefix, patterns have to be compared a bit at a time until the exact or first match is found. This requires “n” number of comparisons or memory accesses to identify the closest matching pattern. The trees are built in such a way that the matching result is guaranteed to be a best match, whether it is an exact match or a longest prefix match. Using the trail of all the birds and associated prefix lengths enables determination of the correct prefix result from the trail. By construction, the search tree provides the best matching prefix at or after the first compare during walking of the trail or tree.
摘要翻译：当搜索具有可变长度模式或前缀的表时，用于查找最长前缀的新型数据结构，方法和装置匹配搜索。要找到完全匹配或最匹配的前缀，模式必须一次比较一下，直到发现确切或第一个匹配。这需要“n”个比较或存储器访问来识别最接近的匹配模式。树的建立方式使得匹配结果保证是最佳匹配，无论是完全匹配还是最长匹配前缀。使用所有鸟的踪迹和相关的前缀长度可以确定路线中正确的前缀结果。通过构建，搜索树在步道或树的步行期间在第一次比较之前或之后提供最佳的匹配前缀。

32. 发明授权

US06985431B1 Network switch and components and method of operation 有权
标题翻译：网络交换机及组件及操作方法
公开(公告)号：US06985431B1
公开(公告)日：2006-01-10
申请号：US09384692
申请日：1999-08-27
申请人： Brian Mitchell Bass , Jean Louis Calvignac , Anthony Matteo Gallo , Marco C. Heddes , Sridhar Rao , Michael Steven Siegel , Fabrice Jean Verplanken , Brian Alan Youngman
发明人： Brian Mitchell Bass , Jean Louis Calvignac , Anthony Matteo Gallo , Marco C. Heddes , Sridhar Rao , Michael Steven Siegel , Fabrice Jean Verplanken , Brian Alan Youngman
IPC分类号： H04Q11/04
CPC分类号： H04L49/3036 , G06F13/4022 , H04L49/15 , H04L49/205 , H04L49/3009 , H04L49/351
摘要： A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
摘要翻译：一种网络交换装置，这种装置的组件，以及操作这样的装置的方法，其中通过控制点和形成在半导体衬底上的多个接口处理器的协作来增强数据流处理和灵活性。控制点和接口处理器一起形成一个网络处理器，能够在执行指导网络中的数据流的指令的情况下与包括可选交换结构设备在内的其他元件协作。

33. 发明授权

US06766381B1 VLSI network processor and methods 失效
标题翻译： VLSI网络处理器和方法
公开(公告)号：US06766381B1
公开(公告)日：2004-07-20
申请号：US09384689
申请日：1999-08-27
申请人： Kenneth James Barker , Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Michael Steven Siegel , Michael Raymond Trombley , Fabrice Jean Verplanken
发明人： Kenneth James Barker , Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Michael Steven Siegel , Michael Raymond Trombley , Fabrice Jean Verplanken
IPC分类号： G06F1516
CPC分类号： H04L29/06 , H04L49/1507 , H04L49/45 , H04L69/12
摘要： A network processor useful in network switch apparatus and methods of operating such a processor in which data flow handling and flexibility is enhanced by the cooperation of a plurality of interface processors formed on a semiconductor substrate. The interface processors provide data paths for inbound and outbound data flow and operate under the control of instructions stored in an instruction store formed on the semiconductor substrate.
摘要翻译：可用于网络交换设备的网络处理器和操作这样的处理器的方法，其中通过形成在半导体衬底上的多个接口处理器的协作来增强数据流处理和灵活性。接口处理器提供用于入站和出站数据流的数据路径，并且在存储在形成在半导体衬底上的指令存储器中的指令的控制下操作。

34. 发明授权

US06675163B1 Full match (FM) search algorithm implementation for a network processor 失效
标题翻译：网络处理器的完全匹配（FM）搜索算法实现
公开(公告)号：US06675163B1
公开(公告)日：2004-01-06
申请号：US09543531
申请日：2000-04-06
申请人： Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Antonios Maragkos , Piyush Chunilal Patel , Michael Steven Siegel , Fabrice Jean Verplanken
发明人： Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Antonios Maragkos , Piyush Chunilal Patel , Michael Steven Siegel , Fabrice Jean Verplanken
IPC分类号： G06F1730
CPC分类号： H04L45/742 , H04L45/7453 , Y10S707/99933 , Y10S707/99934 , Y10S707/99935 , Y10S707/99936 , Y10S707/99937 , Y10S707/99943 , Y10S707/99945
摘要： Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBs) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n→n mapping of the bits of the key to the bits of the hash key. The data structure that is used to store the hash key and the related information in the tree is called a leaf. Each leaf corresponds to a single key that matches exactly with the input key. The leaf contains the key as well as additional information. The length of the leaf is programmable, as is the length of the key. The leaf is stored in random access memory and is implemented as a single memory entry. If the key is located in the direct table then it is called a direct leaf.
摘要翻译：用于在搜索图案和存储在搜索树的叶中的模式之间找到完全匹配的新型数据结构，方法和装置。键输入，对密钥执行哈希函数，访问直接表（DT），并通过模式搜索控制块（PSCB），树直到达到叶。搜索机制使用一组可以位于几个寄存器和常规内存中的数据结构，然后用于构建可由相对简单的硬件宏操作的Patricia树结构。检索所需的两个密钥和相应的信息都存储在Patricia树结构中。散列函数提供密钥的比特到散列密钥的比特的n> n映射。用于存储散列键和树中相关信息的数据结构称为叶。每个叶对应于与输入键完全匹配的单个键。叶包含关键以及其他信息。叶片的长度是可编程的，密钥的长度也是可编程的。叶存储在随机存取存储器中，并被实现为单个存储器条目。如果键位于直接表中，则称为直接叶。

35. 发明授权

US06657962B1 Method and system for managing congestion in a network 失效
标题翻译：管理网络拥塞的方法和系统
公开(公告)号：US06657962B1
公开(公告)日：2003-12-02
申请号：US09546651
申请日：2000-04-10
申请人： Peter Irma August Barri , Brian Mitchell Bass , Jean Louis Calvignac , Ivan Oscar Clemminck , Marco C. Heddes , Clark Debs Jeffries , Michael Steven Siegel , Fabrice Jean Verplanken , Miroslav Vrana
发明人： Peter Irma August Barri , Brian Mitchell Bass , Jean Louis Calvignac , Ivan Oscar Clemminck , Marco C. Heddes , Clark Debs Jeffries , Michael Steven Siegel , Fabrice Jean Verplanken , Miroslav Vrana
IPC分类号： H04L1256
CPC分类号： H04L47/2441 , H04L47/10 , H04L47/12 , H04L47/30 , H04L47/32 , H04L49/103 , H04L49/3018 , H04L49/50 , H04L49/90
摘要： A system for minimizing congestion in a communication system is disclosed. The system comprises at least one ingress system for providing data. The ingress system includes a first free queue and a first flow queue. The system also includes a first congestion adjustment module for receiving congestion indications from the free queue and the flow queue. The first congestion adjustment module generates end stores transmit probabilities and performs per packet flow control actions. The system further includes a switch fabric for receiving data from the ingress system and for providing a congestion indication to the ingress system. The system further includes at least one egress system for receiving the data from the switch fabric. The egress system includes a second free queue and a second flow queue. The system also includes a second congestion adjustment module for receiving congestion indications from the second free queue and the second flow queue. The second congestion adjustment module generates and stores transmit probabilities and performs per packet flow control actions. Finally, the system includes a scheduler for determining the order and timing of transmission of packets out the egress system and to another node or destination. A method and system in accordance with the present invention provides for a unified method and system for logical connection of congestion with the appropriate flow control responses. The method and system utilizes congestion indicators within the ingress system, egress system, and the switch fabric in conjunction with a coarse adjustment system and fine adjustment system within the ingress device and the egress device to intelligently manage the system.
摘要翻译：公开了一种用于最小化通信系统中的拥塞的系统。该系统包括用于提供数据的至少一个入口系统。入口系统包括第一空闲队列和第一流队列。该系统还包括用于从空闲队列和流队列接收拥塞指示的第一拥塞调整模块。第一拥塞调整模块生成终端存储发送概率并执行每个分组流控制动作。该系统还包括用于从入口系统接收数据并向入口系统提供拥塞指示的交换结构。该系统还包括用于从交换结构接收数据的至少一个出口系统。出口系统包括第二空闲队列和第二流队列。该系统还包括第二拥塞调整模块，用于从第二空闲队列和第二流队列接收拥塞指示。第二拥塞调整模块生成并存储发送概率，并执行每个分组流控制动作。最后，该系统包括一个调度器，用于确定出口系统和另一个节点或目的地的分组传输的顺序和定时。根据本发明的方法和系统提供了用于将拥塞与适当流控制响应逻辑连接的统一方法和系统。该方法和系统利用入口系统，出口系统和交换结构中的拥塞指示符与入口设备和出口设备内的粗调系统和精细调整系统结合，智能地管理系统。

36. 发明授权

US06498781B1 Self-tuning link aggregation system 失效
标题翻译：自调整链路聚合系统
公开(公告)号：US06498781B1
公开(公告)日：2002-12-24
申请号：US09374003
申请日：1999-08-13
申请人： Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Clark Debs Jeffries , Loren Douglas Larsen , Jeffrey James Lynch , Mark Anthony Rinaldi , Michael Steven Siegel
发明人： Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Clark Debs Jeffries , Loren Douglas Larsen , Jeffrey James Lynch , Mark Anthony Rinaldi , Michael Steven Siegel
IPC分类号： H04L1226
CPC分类号： H04L41/5025 , H04L43/0829 , H04L43/16
摘要： A data processing system and method in a computer network are disclosed for improving performance of a link aggregation system included in the network. Parameters are established which are utilized to determine performance criteria of the link aggregation system. A performance of the link aggregation system is determined by determining the performance criteria. The performance of the link aggregation system changes in response to a flow traffic burden on the link aggregation system changing. The link aggregation system dynamically modifies the parameters in response to the changing performance of the link aggregation system. The link aggregation system is self-tuning and capable of automatically adjusting to a changing flow traffic burden on the link aggregation system.
摘要翻译：公开了一种计算机网络中的数据处理系统和方法，用于改善网络中包括的链路聚合系统的性能。建立了用于确定链路聚合系统性能标准的参数。通过确定性能标准来确定链路聚合系统的性能。链路聚合系统的性能响应链路聚合系统的流量负担变化而变化。链路聚合系统根据链路聚合系统的性能变化动态修改参数。链路聚合系统是自调整的，能够自动调整链路聚合系统上流量流量负担的变化。

37. 发明授权

US06829651B1 Local MAC address learning in layer 2 frame forwarding 有权
标题翻译：本地MAC地址学习在第二层帧转发
公开(公告)号：US06829651B1
公开(公告)日：2004-12-07
申请号：US09547369
申请日：2000-04-11
申请人： Brian Mitchell Bass , Teresa Lynn Davis , Anthony Matteo Gallo , Michael Steven Siegel , Fabrice Jean Verplanken , Gail Irene Woodland
发明人： Brian Mitchell Bass , Teresa Lynn Davis , Anthony Matteo Gallo , Michael Steven Siegel , Fabrice Jean Verplanken , Gail Irene Woodland
IPC分类号： G06F1300
CPC分类号： H04L61/00 , H04L29/12009
摘要： Method and apparatus for receiving a data frame on a received port of a network switch. The data frame includes a source media access control (MAC) address for the first device, and a destination MAC address for a second device connected to another port of the network. The data frame is forwarded to a target port which is connected to the second device. The MAC address is learned locally at the target port which facilities communications for frames which later enter the target port and contain addresses previously learned from a received frame.
摘要翻译：用于在网络交换机的接收端口上接收数据帧的方法和装置。数据帧包括用于第一设备的源媒体访问控制（MAC）地址和连接到网络的另一端口的第二设备的目的地MAC地址。数据帧被转发到连接到第二设备的目标端口。 MAC地址在目标端口本地学习，为进一步进入目标端口并包含从接收帧先前学习的地址的帧进行通信。

38. 发明授权

US07440417B2 Method and system for frame and protocol classification 失效
标题翻译：框架和协议分类的方法和系统
公开(公告)号：US07440417B2
公开(公告)日：2008-10-21
申请号：US10870730
申请日：2004-06-17
申请人： Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel , Jean Louis Calvignac , Gordon Taylor Davis
发明人： Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel , Jean Louis Calvignac , Gordon Taylor Davis
IPC分类号： H04L12/28
CPC分类号： H04L29/06 , H04L69/18 , H04L69/22
摘要： A system and method of protocol and frame classification in a system for data processing is disclosed, including, analyzing a portion of the, packet or frame according to predetermined tests, and storing characteristics of the packet for use in subsequent processing of the frame. The characteristics are preferably obtained with hardware, which does so quickly and in a uniform time period. The stored characteristics of the packet are then used by the network processing complexes in further processing of the frame. The processor is preconditioned with a starting instruction address or cede entry point and the location of the beginning of the layer 3 header as well as flags for the type of frame.
摘要翻译：公开了一种用于数据处理的系统中的协议和帧分类的系统和方法，包括：根据预定的测试分析一部分数据包或帧，以及存储该数据包的特性以用于帧的后续处理。这些特征优选地通过硬件获得，硬件在快速且均匀的时间周期内这样做。然后，分组的存储特性由网络处理复合体用于帧的进一步处理。处理器使用开始指令地址或者入门点进行预处理，并且第3层头的开始位置以及帧类型的标志。

39. 发明授权

US06775284B1 Method and system for frame and protocol classification 失效
标题翻译：框架和协议分类的方法和系统
公开(公告)号：US06775284B1
公开(公告)日：2004-08-10
申请号：US09479027
申请日：2000-01-07
申请人： Jean Louis Calvignac , Gordon Taylor Davis , Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel
发明人： Jean Louis Calvignac , Gordon Taylor Davis , Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel
IPC分类号： H04L1256
CPC分类号： H04L29/06 , H04L69/18 , H04L69/22
摘要： A system and method of protocol and frame classification in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the packet or frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit, such as the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address and flags indicating whether the frame uses a virtual local area network, preferably using hardware to quickly and in a uniform time period. The stored key characteristics of the packet are then used by the network processing complexes in its further processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additionally, additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions.
摘要翻译：用于数据处理（例如，切换或路由数据分组或帧）的系统中的协议和帧分类的系统和方法。本发明包括根据预定的测试来分析分组或帧的一部分，然后存储该分组的关键特征以用于该帧的后续处理。帧（或输入信息单元，例如帧中使用的层3协议的类型，第2层封装技术，起始指令地址和指示帧是否使用虚拟局域网的标志）的关键特性，优选地使用硬件在快速和统一的时间段内，存储的密钥特性随后由网络处理复合体在帧的进一步处理中被使用，处理器使用起始指令地址和开始指令的位置进行预处理第3层标题以及帧类型的标志，即处理器使用指令地址或代码入口点，根据帧类型对正确位置的帧开始处理，另外附加指令地址可以在分支上顺序堆叠和使用，以避免额外的测试和分支指令。

40. 发明授权

US06728253B1 Mixed queue scheduler 失效
标题翻译：混合队列调度程序
公开(公告)号：US06728253B1
公开(公告)日：2004-04-27
申请号：US09405691
申请日：1999-09-24
申请人： Clark Debs Jeffries , Marco C. Heddes , Mark Anthony Rinaldi , Michael Steven Siegel
发明人： Clark Debs Jeffries , Marco C. Heddes , Mark Anthony Rinaldi , Michael Steven Siegel
IPC分类号： H04L1256
CPC分类号： H04L47/50 , H04L2012/5682
摘要： A method and system are disclosed for allocating data input bandwidth from a source link to a plurality of N data queues each having a variable occupancy value, Qi(t), and a constant decrement rate, Di, where i designated the ith queue among the N queues. First, a threshold occupancy value, T, is designated for the N queues. During each time step of a repeating time interval, &Dgr;t, the occupancy value, Qi, is compared with T. In response to each and every of said N data queues having occupancy values exceeding T, pausing data transmission from the source link to the N data queues, such that overflow within the data queues is minimized. In response to at least one of the N data queues having an occupancy value less than or equal to T, selecting one among the N data queues to be incremented, and incrementing the selected data queue, such that underflow of the selected queue is minimized. In the context of scheduling one cell per time step, the value of T is one. Furthermore, the method of the present invention guarantees that output port occupancy shall never, in that context, exceed two cells.
摘要翻译：公开了一种用于将数据输入带宽从源链路分配给多个N个数据队列的方法和系统，每个N个数据队列具有可变占用值Qi（t）和常数递减率Di，其中i指定i < 排队N队列。首先，为N个队列指定阈值占有率T。在重复时间间隔的每个时间步长，Deltat，占用值Qi与T进行比较。响应于具有超过T的占用值的所述N个数据队列中的每一个，暂停从源链路到N的数据传输数据队列，使数据队列中的溢出最小化。响应于具有小于或等于T的占用值的N个数据队列中的至少一个，选择要增加的N个数据队列中的一个，并增加所选择的数据队列，使得所选队列的下溢最小化。在每个时间步长调度一个单元格的上下文中，T的值为1。此外，本发明的方法保证输出端口占用在这方面永远不超过两个小区。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式