会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 32. 发明申请
    • DISPLAY DRIVING CIRCUIT, DRIVING METHOD THEREOF AND DISPLAY APPARATUS
    • 显示驱动电路,其驱动方法和显示设备
    • US20150379949A1
    • 2015-12-31
    • US14417337
    • 2014-05-28
    • BOE TECHNOLOGY GROUP CO., LTD.
    • Yanfeng WangYan HeYanan JiaGuobing Yin
    • G09G3/36
    • G09G3/3648G09G3/3611G09G3/3674G09G3/3685G09G3/3696G09G2300/0426G09G2310/08G09G2370/08
    • Provided are a display driving circuit, a driving method thereof and a display apparatus. The display driving circuit comprises a timing sequence control unit (20) and at least one signal driving unit (30) connected to the timing sequence control unit (20). The timing sequence control unit (20) comprises a receiving module (201), a processing module (202) and a sending module (203). The receiving module (201) receives feedback signals (FB) outputted from respective signal driving units (30) to the timing sequence control unit (20); the processing module (202) obtains a maximum delay time after comparing signal delay time of the signal driving units (30) according to the feedback signals (FB); the sending module (203) sends a second clock signal (CLK2) to respective signal driving units (30) according to the maximum delay time such that respective signal driving units (30) receive the second clock signal (CLK2) simultaneously. Therefore, delay errors of the display driving signals can be eliminated, and distortion of the display image can be avoided.
    • 提供了显示驱动电路,其驱动方法和显示装置。 显示驱动电路包括定时序列控制单元(20)和连接到时序控制单元(20)的至少一个信号驱动单元(30)。 定时序列控制单元(20)包括接收模块(201),处理模块(202)和发送模块(203)。 接收模块(201)从各个信号驱动单元(30)接收从定时序列控制单元(20)输出的反馈信号(FB)。 在根据反馈信号(FB)比较信号驱动单元(30)的信号延迟时间之后,处理模块(202)获得最大延迟时间; 发送模块(203)根据最大延迟时间向相应的信号驱动单元(30)发送第二时钟信号(CLK2),使得各个信号驱动单元(30)同时接收第二时钟信号(CLK2)。 因此,可以消除显示驱动信号的延迟误差,并且可以避免显示图像的失真。
    • 35. 发明授权
    • Display driving circuit for eliminating delay errors among display driving signals, driving method thereof and display apparatus
    • 用于消除显示驱动信号之间的延迟误差的显示驱动电路,其驱动方法和显示装置
    • US09583058B2
    • 2017-02-28
    • US14417337
    • 2014-05-28
    • BOE TECHNOLOGY GROUP CO., LTD.
    • Yanfeng WangYan HeYanan JiaGuobing Yin
    • G09G3/36
    • G09G3/3648G09G3/3611G09G3/3674G09G3/3685G09G3/3696G09G2300/0426G09G2310/08G09G2370/08
    • Provided are a display driving circuit, a driving method thereof and a display apparatus. The display driving circuit comprises a timing sequence control unit (20) and at least one signal driving unit (30) connected to the timing sequence control unit (20). The timing sequence control unit (20) comprises a receiving module (201), a processing module (202) and a sending module (203). The receiving module (201) receives feedback signals (FB) outputted from respective signal driving units (30) to the timing sequence control unit (20); the processing module (202) obtains a maximum delay time after comparing signal delay time of the signal driving units (30) according to the feedback signals (FB); the sending module (203) sends a second clock signal (CLK2) to respective signal driving units (30) according to the maximum delay time such that respective signal driving units (30) receive the second clock signal (CLK2) simultaneously. Therefore, delay errors of the display driving signals can be eliminated, and distortion of the display image can be avoided.
    • 提供了显示驱动电路,其驱动方法和显示装置。 显示驱动电路包括定时序列控制单元(20)和连接到时序控制单元(20)的至少一个信号驱动单元(30)。 定时序列控制单元(20)包括接收模块(201),处理模块(202)和发送模块(203)。 接收模块(201)从各个信号驱动单元(30)接收从定时序列控制单元(20)输出的反馈信号(FB)。 在根据反馈信号(FB)比较信号驱动单元(30)的信号延迟时间之后,处理模块(202)获得最大延迟时间; 发送模块(203)根据最大延迟时间向相应的信号驱动单元(30)发送第二时钟信号(CLK2),使得各个信号驱动单元(30)同时接收第二时钟信号(CLK2)。 因此,可以消除显示驱动信号的延迟误差,并且可以避免显示图像的失真。