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31. 发明授权

US06754755B1 Service request system using an activity indicator to reduce processing overhead 失效
标题翻译：服务请求系统使用活动指示器来减少处理开销
公开(公告)号：US06754755B1
公开(公告)日：2004-06-22
申请号：US09717667
申请日：2000-11-21
申请人： Scott C. Johnson , Rodney S. Canion
发明人： Scott C. Johnson , Rodney S. Canion
IPC分类号： G06F948
CPC分类号： G06F13/24 , G06F13/102
摘要： A service request system for a subsystem of a computer including a processor, a driver, and inhibit logic. The inhibit logic detects requests for service by the subsystem and asserts an interrupt unless the driver is executing and servicing the subsystem. The driver is executed by the processor in response to the interrupt to service the subsystem, where the driver controls the inhibit logic to prevent interrupts associated with the subsystem from being asserted while the driver is being executed by the processor. In this manner, redundant interrupts or service requests initiated by the subsystem are eliminated. The service request system may include an activity indicator that indicates whether the driver is being executed. Th inhibit logic asserts an interrupt in response to a service request from the subsystem unless the activity indicator indicates that the driver is in control of the processor. The subsystem may further detect the activity indicator and inhibit requesting service while the activity indicator indicates that the driver is active. In this manner, the subsystem avoids wasting time associated with requesting service. Also, the subsystem may be operated in a more streamlined mode while the driver is in control of the processor. In one embodiment, the activity indicator is a logic bit, where the driver changes the state of the logic bit upon execution to a first state and changes the state of the logic bit to a second state upon exiting.
摘要翻译：一种用于包括处理器，驱动器和禁止逻辑的计算机的子系统的服务请求系统。禁止逻辑检测子系统的服务请求并断言中断，除非驱动程序正在执行和维护子系统。驱动器由处理器响应于中断来执行以对子系统进行服务，其中驱动器控制禁止逻辑，以防止在处理器执行驱动程序时与子系统相关联的中断被断言。以这种方式，消除了由子系统发起的冗余中断或服务请求。服务请求系统可以包括指示是否正在执行驱动程序的活动指示符。响应于来自子系统的服务请求，禁止逻辑断言中断，除非活动指示符指示驱动程序处于处理器的控制状态。当活动指示符指示驾驶员是活动的时，子系统可以进一步检测活动指示符并禁止请求服务。以这种方式，子系统避免与请求服务相关联的浪费时间。而且，当驱动程序控制处理器时，子系统可以以更加流线型的模式操作。在一个实施例中，活动指示符是逻辑位，其中驱动器在执行时将逻辑位的状态改变到第一状态，并且在退出时将逻辑位的状态改变为第二状态。

32. 发明授权

US5905874A Method and system for reducing data transfer latency when transferring data from a network to a computer system 失效
标题翻译：用于在将数据从网络传输到计算机系统时减少数据传输延迟的方法和系统
公开(公告)号：US5905874A
公开(公告)日：1999-05-18
申请号：US64432
申请日：1998-04-22
申请人： Scott C. Johnson
发明人： Scott C. Johnson
IPC分类号： G06F13/38 , H04L12/56 , G06F13/00
CPC分类号： H04L49/9063 , G06F13/387 , H04L49/90
摘要： A computer system for communicating with a network including a host processor, memory, an interface bus and a network interface device for reducing data transfer latency between the computer system and the network. The network interface device includes a buffer for temporarily storing data, a media interface device for transferring data between the buffer and the network, a bus interface for transferring data between the computer system's memory and the buffer, and a local processor for writing a unique value at a predetermined location within the buffer, for periodically comparing the data value at the predetermined location with the unique value and for initiating data transfer from the buffer to the computer's memory when the data value does not match the unique value. The network interface device is preferably a network interface card (NIC) for plugging into a slot of the interface or expansion bus of the computer system. The local processor writes the unique value at the location and then periodically compares the data at that location with the unique value. When the data value is different from the unique value, the local processor has detected new data in that block of memory. The local processor respondingly initiates data transfer of the new data from that block to the memory of the computer system.
摘要翻译：一种用于与包括主机处理器，存储器，接口总线和网络接口设备的网络通信的计算机系统，用于减少计算机系统和网络之间的数据传输等待时间。网络接口设备包括用于临时存储数据的缓冲器，用于在缓冲器和网络之间传送数据的媒体接口设备，用于在计算机系统的存储器和缓冲器之间传送数据的总线接口和用于写入唯一值的本地处理器在缓冲器中的预定位置处，用于周期性地将预定位置处的数据值与唯一值进行比较，并且用于当数据值与唯一值不匹配时发起从缓冲器到计算机的存储器的数据传送。网络接口设备优选地是用于插入到计算机系统的接口或扩展总线的时隙中的网络接口卡（NIC）。本地处理器在该位置写入唯一值，然后定期将该位置的数据与唯一值进行比较。当数据值与唯一值不同时，本地处理器检测到该存储器块中的新数据。本地处理器响应地发起将新数据从该块传送到计算机系统的存储器的数据。

33. 发明授权

US5819115A Driver bundle including a compressed, self-extracting, executable driver for the host processor and an adapter driver for the processor of a network adapter card 失效
标题翻译：驱动程序包包括用于主机处理器的压缩，自解压缩可执行驱动程序，以及用于网络适配器卡的处理器的适配器驱动程序
公开(公告)号：US5819115A
公开(公告)日：1998-10-06
申请号：US672648
申请日：1996-06-28
申请人： Geoffrey B. Hoese , Scott C. Johnson , Rodney S. Canion
发明人： Geoffrey B. Hoese , Scott C. Johnson , Rodney S. Canion
IPC分类号： G06F9/445 , G06F13/10 , G06F13/00
CPC分类号： G06F9/4411 , G06F13/102
摘要： A driver bundle including a compressed, executable and self-extracting host driver prepended to an adapter card driver to form a single executable driver bundle. The driver bundle has a size less than the maximum allowable size for a command file, which is 64 Kbytes as defined by MS-DOS.RTM.. The combined size of the expanded host driver and the adapter card driver is greater than the maximum allowable size. When the driver bundle is executed, it commands a processor of a computer system to expand and execute the host driver. The computer system includes a network adapter card with an adapter processor for executing the adapter card driver. When executed, the host driver commands the processor to retrieve and download the adapter card driver to the network adapter card for execution by the adapter processor.
摘要翻译：一个驱动程序包，包括一个压缩的，可执行的和自解压的主机驱动程序，提供给适配器卡驱动程序，以形成单个可执行驱动程序包。驱动程序包的大小小于命令文件的最大允许大小，这是MS-DOS TM定义的64 KB。扩展主机驱动程序和适配器卡驱动程序的组合大小大于最大允许大小。当驱动程序包执行时，它命令计算机系统的处理器来扩展和执行主机驱动程序。计算机系统包括具有用于执行适配器卡驱动器的适配器处理器的网络适配器卡。当执行时，主机驱动程序命令处理器检索并将适配器卡驱动程序下载到网卡，供适配器处理器执行。

34. 发明授权

US5666559A Fail-safe communication abort mechanism for parallel ports with selectable NMI or parallel port interrupt 失效
公开(公告)号：US5666559A
公开(公告)日：1997-09-09
申请号：US727287
申请日：1996-10-09
申请人： Michael T. Wisor , Scott C. Johnson
发明人： Michael T. Wisor , Scott C. Johnson
IPC分类号： G06F11/30 , G06F11/00 , G06F11/07 , G06F13/00 , G06F13/36 , G06F13/38 , G06F13/42
CPC分类号： G06F11/0757 , G06F11/0745 , G06F11/0751 , G06F11/0772 , G06F11/0793
摘要： A computer system is provided including a processor and a parallel port configured to transfer data to or from a peripheral device. The parallel port includes a data buffer for receiving data transferred on a system bus when the processor executes a write cycle to the parallel port. A control unit associated with the parallel port decodes the address signals of the system bus to selectively latch data within the data buffer, and generates handshake signals to the peripheral device to indicate that write data is presently contained within the data buffer. The peripheral device consequently receives the data and provides an acknowledge signal to the control unit. The control unit thereafter generates a ready signal to indicate to the processor that the data has been written into the peripheral device. A time-out counter is coupled to the control unit to determine whether the peripheral device has returned the acknowledge signal within a predetermined time-out period after the control unit asserts the handshake signal to the peripheral device indicating that data is available at the parallel port. If the time-out period expires and the peripheral device did not return an acknowledge signal, the control unit releases the processor from the current cycle by asserting the ready signal on the system bus. The control unit further asserts an error flag within a status register to indicate that a failure occurred. In response to assertion of the error flag, the control unit asserts an interrupt signal which effectively alerts the processor of a failure. The processor thereafter executes code from an interrupt service routine during which the status register may be read to determine that the failure was associated with the parallel port. The parallel port is also associated with a configuration register that controls whether a non-maskable interrupt or a parallel port interrupt is asserted in response to the assertion of the error flag.

35. 发明授权

US08719598B2 Power OK distribution for multi-voltage chips 有权
标题翻译：多功能电源芯片的Power OK配置
公开(公告)号：US08719598B2
公开(公告)日：2014-05-06
申请号：US12828880
申请日：2010-07-01
申请人： Shawn Searles , Scott C. Johnson , Grace I. Chuang
发明人： Shawn Searles , Scott C. Johnson , Grace I. Chuang
IPC分类号： G06F1/28 , G06F1/30
CPC分类号： G06F1/28
摘要： A method and apparatus for powering up an integrated circuit (IC). An IC includes a plurality of power domains each coupled to receive power from one of a plurality of power sources. Each power domain includes a power-sensing unit. A power-sensing unit in a first one of the plurality of power domains is coupled to receive a first power ok signal from an upstream power domain, and is configured to assert a second power ok signal to be provided to a second power domain. A power-sensing unit in the second power domain is coupled to detect the presence of voltage in the first power domain, and to receive the first power ok signal. When the power-sensing unit in the second power domain has both sensed the presence of power in the first power domain and received the second power ok signal, a third power ok signal is asserted.
摘要翻译：一种用于为集成电路（IC）供电的方法和装置。 IC包括多个功率域，每个功率域被耦合以从多个电源之一接收功率。每个功率域包括功率感测单元。多个功率域中的第一个功率区中的功率感测单元被耦合以从上游功率域接收第一功率ok信号，并且被配置为断言要提供给第二功率域的第二功率ok信号。耦合第二功率域中的功率感测单元以检测第一功率域中的电压的存在并接收第一功率ok信号。当第二功率域中的功率感测单元已经感测到在第一功率域中存在功率并且接收到第二功率ok信号时，断言第三功率确认信号。

36. 发明申请

US20100281181A1 NETWORK ABSTRACTION AND ISOLATION LAYER FOR MASQUERADING MACHINE IDENTITY OF A COMPUTER 有权
标题翻译：计算机主机识别的网络摘要和隔离层
公开(公告)号：US20100281181A1
公开(公告)日：2010-11-04
申请号：US12838009
申请日：2010-07-16
申请人： Scott C. Johnson , Dave D. McCrory
发明人： Scott C. Johnson , Dave D. McCrory
IPC分类号： G06F15/16
CPC分类号： H04L63/0407 , H04L63/16
摘要： A network abstraction and isolation layer (NAIL) for masquerading the machine identity of a computer in a network to enable the computer to communicate in the network with a different machine identity including an isolated network interface for communicating with the computer, an abstraction network interface for communicating with a network device coupled to the network, and control instructions or device. The control instructions or device performs machine identity translation to masquerade machine identity of the computer relative to the network. Machine identity masquerading includes selectively translating any one or more of an IP address, a MAC address, a machine name, a system identifier, and a DNS Name in the header or payload of communication packets.
摘要翻译：一种用于伪装网络中的计算机的机器标识的网络抽象和隔离层（NAIL），以使计算机能够在网络中与不同的机器标识进行通信，包括用于与计算机进行通信的隔离网络接口，用于与耦合到网络的网络设备进行通信，以及控制指令或设备。控制指令或设备执行机器标识转换，以相对于网络伪装计算机的机器标识。机器识别伪装包括在通信包的头部或有效载荷中选择性地翻译IP地址，MAC地址，机器名称，系统标识符和DNS名称中的一个或多个。

37. 发明授权

US07514212B2 Nucleic acid amplification using non-standard bases 有权
标题翻译：使用非标准碱的核酸扩增
公开(公告)号：US07514212B2
公开(公告)日：2009-04-07
申请号：US10542464
申请日：2004-01-17
申请人： James R. Prudent , Scott C. Johnson , Michael J. Moser , David J. Marshall
发明人： James R. Prudent , Scott C. Johnson , Michael J. Moser , David J. Marshall
IPC分类号： C12Q1/68 , C12P19/34
CPC分类号： C12Q1/6853 , C12Q1/6844 , C12Q2525/101
摘要： The present invention provides methods, kits and compositions for high fidelity nucleic acid amplification reactions of target nucleic acids such that specific amplification products that incorporate non-standard bases are produced. The amplification reactions can either be linear or exponential. In some embodiments, the fidelity of the amplification reaction is high enough such that a majority of the amplification products maintain non-standard bases at specific sites designated by the user after a specified number of amplification cycles. In some embodiments, the ratio of non-standard nucleoside triphosphates is greater than the amount of standard nucleoside triphosphates initially present in the reaction mixture.
摘要翻译：本发明提供用于靶核酸的高保真度核酸扩增反应的方法，试剂盒和组合物，从而产生包含非标准碱基的特异性扩增产物。扩增反应可以是线性的或指数的。在一些实施方案中，扩增反应的保真度足够高，使得大部分扩增产物在指定数量的扩增循环后由用户指定的特定位点维持非标准碱基。在一些实施方案中，非标准核苷三磷酸的比例大于最初存在于反应混合物中的标准核苷三磷酸的量。

38. 发明授权

US07363881B2 Beak treatment with tongue protection 有权
标题翻译：喙治疗与舌头保护
公开(公告)号：US07363881B2
公开(公告)日：2008-04-29
申请号：US10702369
申请日：2003-11-06
申请人： Marc S. Gorans , Scott C. Johnson
发明人： Marc S. Gorans , Scott C. Johnson
IPC分类号： A01K15/04 , A61B18/04
CPC分类号： A61D1/005
摘要： The present invention provides apparatus and methods for treating the beaks of poultry to prevent further growth by non-contact heating while protecting the birds' tongues. The birds' tongues are protected by providing pressure on underside of the lower beak of the bird, proximate the base of the lower beak.
摘要翻译：本发明提供了用于处理家禽喙的装置和方法，以通过非接触加热来防止进一步的生长，同时保护鸟的舌头。鸟的舌头通过在下喙的基部附近向鸟的下喙的下侧施加压力来保护。

39. 发明授权

US06631434B1 Dynamic early indication system for a computer 失效
标题翻译：电脑动态早期指示系统
公开(公告)号：US06631434B1
公开(公告)日：2003-10-07
申请号：US09440396
申请日：1999-11-15
申请人： Scott C. Johnson , Rodney S. Canion
发明人： Scott C. Johnson , Rodney S. Canion
IPC分类号： G06F948
CPC分类号： G06F13/24
摘要： A dynamic early indication system for a computer includes a processor subsystem logic that performs a subsystem function, an early indicator, indication logic, and a driver that is executed by the processor in response to an indication to perform processing. The indication logic may be coupled to the subsystem logic and early indicator to provide an indication that informs the processor when processing associated with the subsystem function is needed at a completion time of the subsystem function. The indication may be provided before the completion time of the subsystem function if the early indicator represents early indication. The driver controls the early indicator to improve efficiency of subsystem processing.
摘要翻译：用于计算机的动态早期指示系统包括执行子系统功能的处理器子系统逻辑，早期指示符，指示逻辑和由处理器响应于执行处理的指示而执行的驱动器。指示逻辑可以耦合到子系统逻辑和早期指示符，以提供通知处理器在子系统功能的完成时间需要与子系统功能相关联的处理的指示。如果早期指示符表示早期指示，则可以在子系统功能的完成时间之前提供指示。驾驶员控制早期指标以提高子系统处理的效率。

40. 发明授权

US5430934A Method for manufacturing a direct acting hydraulic tappet 失效
标题翻译：制造直动液压挺杆的方法
公开(公告)号：US5430934A
公开(公告)日：1995-07-11
申请号：US139481
申请日：1993-10-20
申请人： David M. Groh , Chris P. Kaniut , Steven L. Worthington , Martin W. Uitvlugt , Scott C. Johnson
发明人： David M. Groh , Chris P. Kaniut , Steven L. Worthington , Martin W. Uitvlugt , Scott C. Johnson
IPC分类号： F01L1/14 , F01L1/25 , B23P15/00
CPC分类号： F01L1/25 , F01L1/143 , Y10T29/49304 , Y10T29/49314 , Y10T74/2107
摘要： A method for making a direct acting tappet in which an oil groove and interior structure defining a weld interface are formed in a cupshaped body by a rolling process, the body is heat treated, a web and hub structure is positioned against the weld interface and the resulting assembly is subjected to a localized, capacitive discharge welding process in the weld interface area. The weld interface is formed to a specific shape to enhance the integrity of the weld. Further, a baffle member can be assembled to the web and hub structure prior to its positioning within the body member.
摘要翻译：一种用于制造直接作用挺杆的方法，其中通过轧制方法在杯形体中形成限定焊接界面的油槽和内部结构，所述主体被热处理，腹板和轮毂结构抵靠焊接界面定位，所得的组件在焊接界面区域进行局部的电容放电焊接工艺。焊接界面形成为特定形状以增强焊缝的完整性。此外，挡板构件可以在其定位在主体构件之前组装到腹板和轮毂结构。

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