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    • 31. 发明授权
    • Output impedance varying circuit
    • 输出阻抗变化电路
    • US07586081B2
    • 2009-09-08
    • US12076788
    • 2008-03-24
    • Hiroshi YamaguchiMasaki Taniguchi
    • Hiroshi YamaguchiMasaki Taniguchi
    • G01J1/44H01J40/14H03F3/08
    • H03F3/3069H03F1/08H03F1/56H03F3/08H03F3/087H03F3/343
    • A photo detector IC (PDIC) is connected with a flexible printed circuit board (FPC). A signal converted into a voltage through light-to-voltage conversion in the PDIC is connected with the drain of a field effect transistor (FET), while the source of the FET is connected to an output terminal. A signal from the output terminal is input into a signal processing board of the main body via the FPC serving as an equivalent circuit composed of a coil and a capacitor. The gate of the FET is connected with a variable voltage source. Peaking occurs due to inductor components and capacitance components of the FPC. However, by application of voltage to the variable voltage source, the gate voltage value of the FET is adjusted to be an optimal value, whereby the peaking is suppressed by the on-resistance of the FET.
    • 光电检测器IC(PDIC)与柔性印刷电路板(FPC)连接。 在PDIC中通过光电压转换成电压的信号与场效应晶体管(FET)的漏极连接,而FET的源极连接到输出端子。 来自输出端子的信号经由作为由线圈和电容器组成的等效电路的FPC输入到主体的信号处理板。 FET的栅极与可变电压源连接。 由于FPC的电感器元件和电容元件引起峰化。 然而,通过向可变电压源施加电压,将FET的栅极电压值调整为最佳值,由此通过FET的导通电阻来抑制峰值。