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31. 发明授权

US07759761B2 Semiconductor wafer substrate for power semiconductor components and method for producing the same 有权
标题翻译：用于功率半导体元件的半导体晶片衬底及其制造方法
公开(公告)号：US07759761B2
公开(公告)日：2010-07-20
申请号：US11613253
申请日：2006-12-20
申请人： Hans-Joachim Schulze , Helmut Strack
发明人： Hans-Joachim Schulze , Helmut Strack
IPC分类号： H01L29/06
CPC分类号： H01L29/7802 , H01L29/41741 , H01L29/456 , H01L29/66712 , H01L2924/0002 , H01L2924/13055 , H01L2924/13091 , H01L2924/19043 , Y10T428/24917 , H01L2924/00
摘要： In a semiconductor wafer substrate (20) for power semiconductor components (1) and in a method for producing the same, the semiconductor wafer substrate (20) has a large-area, buried rear side electrode (3) in form of a layer arranged between a self-supporting wafer substrate (4) and a non-self-supporting monocrystalline silicon wafer layer (5) arranged on the rear side electrode (3). The rear side electrode (3) has a ternary carbide and/or a ternary nitride and/or carbon.
摘要翻译：在用于功率半导体部件（1）的半导体晶片基板（20）中及其制造方法中，半导体晶片基板（20）具有大面积埋入式的背面侧电极（3）在自支撑晶片基板（4）和布置在后侧电极（3）上的非自支撑单晶硅晶片层（5）之间。后侧电极（3）具有三元碳化物和/或三元氮化物和/或碳。

32. 发明授权

US07511353B2 Semiconductor diode and production method suitable therefor 有权
标题翻译：半导体二极管及其适用的生产方法
公开(公告)号：US07511353B2
公开(公告)日：2009-03-31
申请号：US10971572
申请日：2004-10-22
申请人： Anton Mauder , Frank Hille , Vytla Rajeev Krishna , Elmar Falck , Hans-Joachim Schulze , Franz-Josef Niedernostheide , Helmut Strack
发明人： Anton Mauder , Frank Hille , Vytla Rajeev Krishna , Elmar Falck , Hans-Joachim Schulze , Franz-Josef Niedernostheide , Helmut Strack
IPC分类号： H01L29/72
CPC分类号： H01L21/263 , H01L29/32 , H01L29/6609 , H01L29/861
摘要： A semiconductor diode (30) has an anode (32), a cathode (33) and a semiconductor volume (31) provided between the anode (32) and the cathode (33). An electron mobility and/or hole mobility within a zone (34) of the semiconductor volume (31) that is situated in front of the cathode (33) is reduced relative to the rest of the semiconductor volume (31).
摘要翻译：半导体二极管（30）具有设置在阳极（32）和阴极（33）之间的阳极（32），阴极（33）和半导体体积（31）。位于阴极（33）前方的半导体体积（31）的区域（34）内的电子迁移率和/或空穴迁移率相对于半导体体积（31）的其余部分减小。

33. 发明授权

US07344936B2 Semiconductor wafer with a wiring structure, a semiconductor component, and methods for their production 有权
标题翻译：具有布线结构的半导体晶片，半导体元件及其制造方法
公开(公告)号：US07344936B2
公开(公告)日：2008-03-18
申请号：US11427204
申请日：2006-06-28
申请人： Hans-Joachim Schulze , Helmut Strack
发明人： Hans-Joachim Schulze , Helmut Strack
IPC分类号： H01L21/8238
CPC分类号： H01L21/6835 , H01L21/76256 , H01L21/76834 , H01L21/76838 , H01L29/417 , H01L29/456 , H01L29/861 , H01L2221/6834 , H01L2221/6835 , H01L2221/68363 , H01L2924/0002 , Y10S438/977 , H01L2924/00
摘要： A semiconductor wafer is provided with a wiring structure, and semiconductor chip positions arranged in rows and columns. The semiconductor wafer has at least one coating (6) as a self-supporting dimensionally stable substrate layer (4), and/or as a wiring structure composed of conductive, high-temperature-resistant material. The coating material (6) of the substrate layer (4) and/or of the wiring structure has a ternary carbide and/or a ternary nitride and/or carbon.
摘要翻译：半导体晶片设置有布线结构，半导体芯片位置配置成行和列。半导体晶片具有至少一个作为自支撑尺寸稳定的基板层（4）的涂层（6），和/或作为由导电的耐高温材料构成的布线结构。衬底层（4）和/或布线结构的涂层材料（6）具有三元碳化物和/或三元氮化物和/或碳。

34. 发明申请

US20070284720A1 Power semiconductor device and method for its production 有权
标题翻译：功率半导体器件及其生产方法
公开(公告)号：US20070284720A1
公开(公告)日：2007-12-13
申请号：US11746699
申请日：2007-05-10
申请人： Ralf Otremba , Helmut Strack
发明人： Ralf Otremba , Helmut Strack
IPC分类号： H01L23/48
CPC分类号： H01L23/5389 , H01L23/49524 , H01L23/49537 , H01L23/49562 , H01L23/49575 , H01L23/49861 , H01L24/24 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L24/82 , H01L25/071 , H01L2224/06181 , H01L2224/24226 , H01L2224/32245 , H01L2224/371 , H01L2224/40 , H01L2224/40245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48472 , H01L2224/73265 , H01L2224/73267 , H01L2224/82039 , H01L2224/83801 , H01L2224/83825 , H01L2224/8384 , H01L2224/8385 , H01L2224/83855 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2224/8382 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A power semiconductor device and a method for its production. The power semiconductor device has at least one power semiconductor chip, which has on its top side and on its back side large-area electrodes. The electrodes are electrically in connection with external contacts by means of connecting elements, the power semiconductor chip and the connecting elements being embedded in a plastic package. This plastic package has a number of layers of plastic, which are pressed one on top of the other and have plane-parallel upper sides. The connecting elements are arranged on at least one of the plane-parallel upper sides, between the layers of plastic pressed one on top of the other, as a patterned metal layer and are electrically in connection with the external contacts by means of contact vias through at least one of the layers of plastic.
摘要翻译：一种功率半导体器件及其制造方法。功率半导体器件具有至少一个功率半导体芯片，其在其顶侧和其后侧具有大面积电极。电极通过连接元件与外部触点电连接，功率半导体芯片和连接元件嵌入塑料封装中。该塑料包装具有多个塑料层，它们一个被压在另一个之上并具有平面平行的上侧。连接元件布置在至少一个平面平行的上侧，在塑料层之间压迫的层之间，作为图案化的金属层，并且通过接触通孔与外部触点电连接塑料层中的至少一层。

35. 发明授权

US07304349B2 Power semiconductor component with increased robustness 有权
标题翻译：功率半导体元件具有增强的鲁棒性
公开(公告)号：US07304349B2
公开(公告)日：2007-12-04
申请号：US11081787
申请日：2005-03-16
申请人： Hans-Joachim Schulze , Helmut Strack
发明人： Hans-Joachim Schulze , Helmut Strack
IPC分类号： H01L29/76
CPC分类号： H01L29/7395 , H01L23/4827 , H01L29/41741 , H01L2224/04026 , H01L2924/01068 , H01L2924/01322 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： The invention relates to a power semiconductor component with increased robustness, in which a contact layer (13, 14) applied directly to a main surface (7, 11) of the semiconductor body (1) is composed of a metal (13) having a high melting point or of a thin aluminum layer (14), the layer thickness of which preferably lies between 1 and 5 nm. This contact layer is reinforced with a customary multilayer metallization system (15). The aluminum layer may, if appropriate, be patterned (14′).
摘要翻译：本发明涉及具有增强的鲁棒性的功率半导体部件，其中直接施加于半导体本体（1）的主表面（7,11）的接触层（13,14）由金属（13）组成，金属（13）具有高熔点或薄铝层（14），其厚度优选在1至5nm之间。该接触层用常规的多层金属化系统（15）加固。如果合适，铝层可以被图案化（14'）。

36. 发明授权

US07195994B2 Method for production of deep p regions in silicon, and semiconductor components produced using the method 有权
标题翻译：用于生产硅中的深p区的方法以及使用该方法制造的半导体元件
公开(公告)号：US07195994B2
公开(公告)日：2007-03-27
申请号：US11023039
申请日：2004-12-23
申请人： Hans-Joachim Schulze , Franz-Josef Niedernostheide , Helmut Strack
发明人： Hans-Joachim Schulze , Franz-Josef Niedernostheide , Helmut Strack
IPC分类号： H01L21/425
CPC分类号： H01L29/66712 , H01L21/263 , H01L27/0814 , H01L27/0817 , H01L29/0634 , H01L29/32 , H01L29/66136 , H01L29/66333 , H01L29/66363
摘要： The invention relates to a method for production of deep p regions in silicon, with the method having the following step: bombardment of an n substrate section, an n epitaxial section or an exposed weakly doped n region of a semiconductor component that is to be produced with high-energy particles, whose energy is chosen such that the previous n region is redoped to form a p region to the desired depth after a specific healing time at a specific healing temperature after the bombardment, and to its use for the production of semiconductor components, for example in order to carry out isolating diffusion.
摘要翻译：本发明涉及一种用于生产硅中深p区的方法，该方法具有以下步骤：轰击要制备的半导体组分的n衬底部分，n外延部分或暴露的弱掺杂n区域具有高能粒子，其能量被选择为使得先前的n区域被重新加工以在轰击之后的特定愈合温度下的特定愈合时间之后形成到所需深度的ap区域，并且用于生产半导体部件，例如为了进行隔离扩散。

37. 发明授权

US06960798B2 High-voltage semiconductor component 有权
标题翻译：高压半导体元件
公开(公告)号：US06960798B2
公开(公告)日：2005-11-01
申请号：US10455842
申请日：2003-06-06
申请人： Gerald Deboy , Dirk Ahlers , Helmut Strack , Michael Rueb , Hans Martin Weber
发明人： Gerald Deboy , Dirk Ahlers , Helmut Strack , Michael Rueb , Hans Martin Weber
IPC分类号： H01L21/336 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/78 , H01L29/80
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/41766 , H01L29/4232 , H01L29/4236 , H01L29/4238 , H01L29/7801 , H01L29/7802 , H01L29/7825
摘要： A semiconductor component has a semiconductor body comprising a blocking pn junction, a source zone of a first conductivity type connected to a first electrode and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type connected to a second electrode. The side of the zone of the second conductivity type facing the drain zone forms a first surface, and in the region between the first surface and a second surface located between the first surface and the drain zone, comprises areas of the first and second conductivity type nested in one another. The second surface is positioned at a distance from the drain zone such that the areas of the first and second conductivity type nested in each other do not reach the drain zone.
摘要翻译：半导体部件具有包含阻挡pn结的半导体本体，与第一电极连接的第一导电类型的源区，与形成与第一导电类型互补的第二导电类型的阻挡pn结的区域接壤，第一导电类型的漏极区连接到第二电极。面向排水区的第二导电类型的区域的一侧形成第一表面，并且在位于第一表面和漏区之间的第一表面和第二表面之间的区域中，包括第一和第二导电类型的区域彼此嵌套在一起第二表面定位在离开排水区一定距离处，使得彼此嵌套的第一和第二导电类型的区域不会到达排水区。

38. 发明授权

US06870201B1 High voltage resistant edge structure for semiconductor components 有权
标题翻译：半导体元件耐高压边缘结构
公开(公告)号：US06870201B1
公开(公告)日：2005-03-22
申请号：US09530553
申请日：1998-11-02
申请人： Gerald Deboy , Jenoe Tihanyi , Helmut Strack , Helmut Gassel , Jens-Peer Stengl , Hans Weber
发明人： Gerald Deboy , Jenoe Tihanyi , Helmut Strack , Helmut Gassel , Jens-Peer Stengl , Hans Weber
IPC分类号： H01L29/06 , H01L29/417 , H01L29/739 , H01L29/78 , H01L29/74
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/41766 , H01L29/7395 , H01L29/7396 , H01L29/7802
摘要： The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a “soft” leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.
摘要翻译：本发明涉及一种半导体元件的边缘区域中的耐高压边缘结构，其具有布置在浮动保护环之间的第一导电类型的浮动保护环和第二导电类型的环形区，其中电导率和/或环形区域被设置为使得当施加阻断电压时它们的电荷载流子完全耗尽。本发明的边缘结构在半导体本体的表面和体积上实现了电场的调制。如果本发明的边缘结构适当地确定尺寸，则场强度最大值可以容易地位于深度中; 也就是在垂直p-n结的区域。因此，允许在体积中的电场的“软”泄漏的合适的边缘构造总是可以在宽泛的p和n掺杂浓度范围内提供。

39. 发明授权

US06441408B2 Power semiconductor component for high reverse voltages 有权
标题翻译：用于高反向电压的功率半导体元件
公开(公告)号：US06441408B2
公开(公告)日：2002-08-27
申请号：US09761241
申请日：2001-01-17
申请人： Alfred Porst , Helmut Strack , Anton Mauder , Hans-Joachim Schulze , Heinrich Brunner , Josef Bauer , Reiner Barthelmess
发明人： Alfred Porst , Helmut Strack , Anton Mauder , Hans-Joachim Schulze , Heinrich Brunner , Josef Bauer , Reiner Barthelmess
IPC分类号： H01L3300
CPC分类号： H01L29/1016 , H01L29/7395 , H01L29/7455 , H01L29/749
摘要： A power semiconductor components has stop zones. In order to optimize the static and dynamic losses of the power semiconductor components, the stop zone is provided with donors which have at least one donor level which lies within the band gap of silicon and is at least 200 meV away from the conduction band edge of silicon.
摘要翻译：功率半导体元件具有停止区域。为了优化功率半导体部件的静态和动态损耗，停止区域具有供体，其具有位于硅的带隙内的至少一个施主电平，并且距离导电带边缘至少200meV 硅。

40. 发明授权

US6072220A Integrated resistor 失效
标题翻译：集成电阻
公开(公告)号：US6072220A
公开(公告)日：2000-06-06
申请号：US206577
申请日：1998-12-07
申请人： Helmut Strack
发明人： Helmut Strack
IPC分类号： H01L27/04 , H01L21/02 , H01L21/22 , H01L21/822 , H01L27/02 , H01L29/8605
CPC分类号： H01L28/20 , H01L29/8605 , Y10S257/904
摘要： A semiconductor body includes a lightly doped semiconductor zone of a second conductivity type. A first oxide layer is produced on the semiconductor body. A structured polysilicon layer is produced on the oxide layer. The polysilicon layer acts as a mask so that the dopants of one conductivity type are implanted and driven into the surface of the semiconductor zone. A second oxide layer is then produced on the surface of the polysilicon layer and the semiconductor zone. A spacer is etched from this oxide layer. Dopants of the second conductivity type are implanted and driven into the surface of the semiconductor zone. A narrow resistor zone remains lying under the polysilicon layer.
摘要翻译：半导体本体包括第二导电类型的轻掺杂半导体区。在半导体本体上产生第一氧化物层。在氧化物层上产生结构化的多晶硅层。多晶硅层用作掩模，使得一种导电类型的掺杂剂被注入并驱动到半导体区的表面中。然后在多晶硅层和半导体区域的表面上产生第二氧化物层。从该氧化物层蚀刻间隔物。将第二导电类型的掺杂剂注入并驱动到半导体区域的表面中。窄电阻区域仍然位于多晶硅层下面。

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