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31. 发明授权

US08324874B2 System and method for controlling synchronous switch for a synchronous converter 失效
标题翻译：用于同步转换器同步开关控制的系统和方法
公开(公告)号：US08324874B2
公开(公告)日：2012-12-04
申请号：US12694594
申请日：2010-01-27
申请人： Xiaodong Zhan
发明人： Xiaodong Zhan
IPC分类号： G05F1/00
CPC分类号： H02M3/1588 , Y02B70/1466
摘要： An apparatus comprises a synchronous converter for providing a regulated output voltage responsive to an input voltage, a control PWM signal to a control switch of the synchronous converter and a synchronous PWM signal to a synchronous switch of the synchronous converter. A first circuit generates the control PWM signal and the synchronous PWM signal responsive to a PWM control signal. The first circuit limits a maximum duty cycle of the synchronous PWM signal to a predetermined level.
摘要翻译：一种装置包括：同步转换器，用于响应于输入电压提供稳定的输出电压，将控制PWM信号提供给同步转换器的控制开关，并将同步PWM信号提供给同步转换器的同步开关。第一电路响应PWM控制信号产生控制PWM信号和同步PWM信号。第一电路将同步PWM信号的最大占空比限制在预定电平。

32. 发明授权

US08320136B2 Stackable electronic component 有权
标题翻译：可堆叠电子元件
公开(公告)号：US08320136B2
公开(公告)日：2012-11-27
申请号：US12202985
申请日：2008-09-02
申请人： Kun Xing
发明人： Kun Xing
IPC分类号： H05K7/00
CPC分类号： H05K3/341 , H05K7/209 , Y10T29/4913 , Y10T29/49144 , Y10T29/49169
摘要： An embodiment of an electronic component includes a circuit element disposed within a package, which includes a surface and at least one standoff protruding from the surface. For example, where the circuit element is an inductor in a power supply, the standoff may allow one to mount the inductor component over another component, such as a transistor component. Therefore, the layout area of such a power supply may be smaller than the layout area of a power supply in which the inductor and transistor components are mounted side by side.
摘要翻译：电子部件的实施例包括设置在封装内的电路元件，其包括表面和从表面突出的至少一个支架。例如，在电路元件是电源中的电感器的情况下，间隔可以允许将电感器部件安装在诸如晶体管部件的另一部件上。因此，这种电源的布局面积可以小于其中电感器和晶体管部件并排安装的电源的布局面积。

33. 发明授权

US08319484B2 Voltage regulator system and method for efficiency optimization using duty cycle measurements 失效
标题翻译：电压调节系统和使用占空比测量的效率优化方法
公开(公告)号：US08319484B2
公开(公告)日：2012-11-27
申请号：US12334440
申请日：2008-12-12
申请人： Michael Jason Houston
发明人： Michael Jason Houston
IPC分类号： G05F1/00
CPC分类号： G05F1/10 , H02M3/156 , H02M3/1584
摘要： A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.
摘要翻译：一种方法和系统控制多相电压调节器中的相位的增加或减少。调节器具有效率，并且对于从输出电压，输入电压，输出电流和调节器的占空比激活的给定数量的相位来计算调节器的效率。如果使用占空比的导数作为输出电流的函数来添加相位，则也可以计算调节器的效率。如果使用占空比的导数作为输出电流的函数降低相位，则进一步计算调节器的效率。从这些计算操作中，相位被添加，下降或相位保持在其当前值，从而优化调节器的效率。

34. 发明授权

US08299764B2 System and method for determining output voltage level information from phase voltage for switched mode regulator controllers 有权
标题翻译：用于从开关模式调节器控制器的相电压确定输出电压电平信息的系统和方法
公开(公告)号：US08299764B2
公开(公告)日：2012-10-30
申请号：US12700103
申请日：2010-02-04
申请人： Steven P. Laur , Rhys S. A. Philbrick
发明人： Steven P. Laur , Rhys S. A. Philbrick
IPC分类号： G05F1/613
CPC分类号： H02M3/156 , H02M2001/0022
摘要： A controller integrated circuit for a switched mode regulator which converts an input voltage to an output voltage. The controller includes a phase pin, a modulation circuit and a filter. The modulation circuit is configured to regulate the output voltage using the input voltage and output voltage level information. The filter has an input coupled to the phase pin and an output providing the output voltage level information which approximates the output voltage based on phase pin voltage. Various filters are contemplated, including passive and active low pass filters and the like. A regulator using such a controller is disclosed. A method of determining a voltage level of an output voltage includes receiving a phase voltage from a phase pin coupled to the phase node, and filtering the phase voltage to provide an output sense voltage having a voltage level approximating the voltage level of the output voltage.
摘要翻译：一种用于将输入电压转换为输出电压的开关模式调节器的控制器集成电路。控制器包括相位引脚，调制电路和滤波器。调制电路被配置为使用输入电压和输出电压电平信息来调节输出电压。滤波器具有耦合到相位引脚的输入端和提供基于相位引脚电压近似输出电压的输出电压电平信息的输出。涵盖了各种滤波器，包括无源和有源低通滤波器等。公开了一种使用这种控制器的调节器。确定输出电压的电压电平的方法包括从耦合到相位节点的相位引脚接收相电压，以及对相电压进行滤波以提供具有接近输出电压的电压电平的电压电平的输出感测电压。

35. 发明申请

US20120268206A1 NEGATIVE CAPACITANCE SYNTHESIS FOR USE WITH DIFFERENTIAL CIRCUITS 失效
标题翻译：负电容合成与差分电路的使用
公开(公告)号：US20120268206A1
公开(公告)日：2012-10-25
申请号：US13534622
申请日：2012-06-27
申请人： Peter J. Mole , Philip V. Golden
发明人： Peter J. Mole , Philip V. Golden
IPC分类号： H03F1/56
CPC分类号： H03F3/4508 , H03F3/45098 , H03F3/45179 , H03F3/45493 , H03F2203/45394 , H03F2203/45458 , H03F2203/45631 , H03F2203/45652 , H03H11/481
摘要： Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.
摘要翻译：这里提供了减小差分电路的差分节点处的差分电容同时提高差分节点处的共模电容的方法和电路，其中差分电路包括一对输入和差分输出。在差分电路的差分节点之间产生负电容，这可以通过在差分电路的差分节点之间连接负电容电路来实现。在一个实施例中，负电容电路与差分电路的差分输出并联连接。在另一个实施例中，负电容电路与差分电路的输入并联连接。在另一个实施例中，负电容电路与差分电路的差分内部节点（即，除了输入和输出节点之外的节点）并联连接。

36. 发明授权

US08294375B2 Adaptive PWM controller for multi-phase LED driver 失效
标题翻译：用于多相LED驱动器的自适应PWM控制器
公开(公告)号：US08294375B2
公开(公告)日：2012-10-23
申请号：US12705783
申请日：2010-02-15
申请人： Ki-Chan Lee
发明人： Ki-Chan Lee
IPC分类号： H05B37/02
CPC分类号： H05B33/0827 , H05B33/0815 , H05B33/0851
摘要： A multi channel LED driver comprises a plurality of LED strings. Each of the plurality of LED strings are associated with a separate channel. A voltage regulator generates an output voltage to the plurality of LED strings responsive to an input voltage and a PWM control signal. First control logic generates the PWM control signal responsive to a voltage at a bottom of each of the plurality of LED strings. A plurality of dimming circuitries, each connected to one of the bottoms of the plurality of LED strings, control a light intensity in each of the plurality of LED strings responsive to dimming control signals. Second control logic generates the dimming control signals responsive to forward currents monitored through each of the plurality of LED strings and dimming data.
摘要翻译：多通道LED驱动器包括多个LED串。多个LED串中的每一个与单独的通道相关联。电压调节器响应于输入电压和PWM控制信号而产生对多个LED串的输出电压。第一控制逻辑响应于多个LED串中的每个LED串的底部的电压产生PWM控制信号。多个调光电路各自连接到多个LED串中的一个底部，响应于调光控制信号控制多个LED串中的每一个中的光强度。第二控制逻辑响应于通过多个LED串中的每一个监视的正向电流和调光数据来产生调光控制信号。

37. 发明申请

US20120256193A1 MONOLITHIC INTEGRATED CAPACITORS FOR HIGH-EFFICIENCY POWER CONVERTERS 审中-公开
标题翻译：用于高效电力转换器的单片集成电容器
公开(公告)号：US20120256193A1
公开(公告)日：2012-10-11
申请号：US13165396
申请日：2011-06-21
申请人： Francois Hebert , Stephen J. Gaul , Shea Petricek
发明人： Francois Hebert , Stephen J. Gaul , Shea Petricek
IPC分类号： H01L29/02 , H01L29/06 , H01L21/02 , H01L29/92
CPC分类号： H01L23/5223 , H01L21/823418 , H01L23/3107 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0629 , H01L27/088 , H01L28/60 , H01L29/402 , H01L29/4175 , H01L29/42368 , H01L29/456 , H01L29/7813 , H01L29/7835 , H01L2224/04042 , H01L2224/05554 , H01L2224/0603 , H01L2224/32245 , H01L2224/48137 , H01L2224/48247 , H01L2224/48472 , H01L2224/49111 , H01L2224/73265 , H01L2924/00014 , H01L2924/01322 , H01L2924/13091 , H01L2924/30107 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2924/00011 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor structure such as a power converter with an integrated capacitor is provided, and comprises a semiconductor substrate, a high-side output power device over the substrate at a first location, and a low-side output power device over the substrate at a second location adjacent to the first location. A first metal layer is over the high-side output power device and electrically coupled to the high-side output power device, and a second metal layer is over the low-side output power device and electrically coupled to the low-side output power device. A dielectric layer is over a portion of the first metal layer and a portion of the second metal layer, and a top metal layer is over the dielectric layer. The integrated capacitor comprises a first bottom electrode that includes the portion of the first metal layer, a second bottom electrode that includes the portion of the second metal layer, the dielectric layer over the portions of the first and second metal layers, and a top electrode that includes the top metal layer over the dielectric layer.
摘要翻译：提供了诸如具有集成电容器的功率转换器的半导体结构，并且包括半导体衬底，在第一位置处的衬底上的高侧输出功率器件和在第二位置处的衬底上的低侧输出功率器件位置与第一个位置相邻。第一金属层位于高侧输出功率器件的上方并且电耦合到高侧输出功率器件，并且第二金属层在低侧输出功率器件的上方并且电耦合到低侧输出功率器件。电介质层位于第一金属层的一部分和第二金属层的一部分上，并且顶部金属层在电介质层的上方。集成电容器包括包括第一金属层的部分的第一底部电极，包括第二金属层的部分的第二底部电极，第一和第二金属层的部分上的电介质层，以及顶部电极其包括在电介质层上的顶部金属层。

38. 发明授权

US08274037B2 Automatic calibration technique for time of flight (TOF) transceivers 有权
标题翻译：飞行时间自动校准技术（TOF）收发器
公开(公告)号：US08274037B2
公开(公告)日：2012-09-25
申请号：US13013173
申请日：2011-01-25
申请人： David W. Ritter , Carl Warren Craddock , Philip Golden
发明人： David W. Ritter , Carl Warren Craddock , Philip Golden
IPC分类号： H01L31/00 , H01J40/14
CPC分类号： G01N21/55 , G01J1/46 , G01J9/00 , G01S17/08 , H01L31/101
摘要： A system and method for automatically calibrating a Time-of-Flight (TOF) transceiver system for proximity/motion detection, is provided. Moreover, the system comprises a component that senses a signal (e.g., current or voltage) at an light emitting diode (LED), an attenuator, a signal injector at a sensor and a switching circuit that toggles between a normal mode (e.g., when signal from the sensor is input to the sensor front end) and a calibration mode (e.g., when signal from the attenuator is input to the sensor front end). During the calibration mode, the sensor front end identifies the phase delay error within the signal path, including board and/or package parasitic, and accounts for the phase delay error during proximity/motion detection in the normal mode.
摘要翻译：提供了一种用于自动校准飞行时间（TOF）收发器系统进行接近/运动检测的系统和方法。此外，该系统包括感测在发光二极管（LED），衰减器，传感器处的信号注入器和切换电路之间的信号（例如，电流或电压）的组件，其在正常模式（例如，来自传感器的信号被输入到传感器前端）和校准模式（例如，当来自衰减器的信号被输入到传感器前端时）。在校准模式期间，传感器前端识别信号路径中的相位延迟误差，包括板和/或封装寄生，并考虑到正常模式下接近/运动检测期间的相位延迟误差。

39. 发明授权

US08269474B2 System and method for reducing voltage overshoot during load release within a buck regulator 有权
标题翻译：降压调节器中负载释放期间减小电压过冲的系统和方法
公开(公告)号：US08269474B2
公开(公告)日：2012-09-18
申请号：US12506722
申请日：2009-07-21
申请人： John S. Kleine
发明人： John S. Kleine
IPC分类号： G05F1/00
CPC分类号： H02M3/158
摘要： A buck regulator comprises an upper switching transistor connected between a voltage input node and a phase node. A lower switching transistor is connected between the phase node and a ground node. An inductor is connected between the phase node and an output voltage node. Circuitry generates control signals to the upper switching transistor and the lower switching transistor responsive to the output voltage and a reference voltage. The control signals to the lower switching transistor selectively turn off the lower switching transistor responsive to a current direction through the lower switching transistor and an indication of whether a voltage error signal has been clamped at a selected level.
摘要翻译：降压调节器包括连接在电压输入节点和相位节点之间的上开关晶体管。下切换晶体管连接在相位节点和接地节点之间。电感器连接在相位节点和输出电压节点之间。电路根据输出电压和参考电压产生控制信号到上开关晶体管和下开关晶体管。响应于通过下开关晶体管的电流方向，向下开关晶体管的控制信号选择性地关断下开关晶体管，并且指示电压误差信号是否被钳位在选定电平。

40. 发明申请

US20120229110A1 HIGH EFFICIENCY PFM CONTROL FOR BUCK-BOOST CONVERTER 有权
标题翻译： BUCK-BOOST转换器的高效PFM控制
公开(公告)号：US20120229110A1
公开(公告)日：2012-09-13
申请号：US13341496
申请日：2011-12-30
申请人： CONGZHONG HUANG , SHEA PETRICEK
发明人： CONGZHONG HUANG , SHEA PETRICEK
IPC分类号： G05F1/46
CPC分类号： H02M3/1582
摘要： A buck/boost voltage regulator generates a regulated output voltage responsive to an input voltage and a plurality of control signals. The buck/boost voltage regulator includes a plurality of switching transistors responsive to the plurality of control signals. Control circuitry monitors the regulated output voltage and generates the plurality of control signals responsive thereto. The control circuitry controls the operation of the plurality of switching transistors to enable a charging phase in a first mode of operation, a pass through phase in a second mode of operation and a discharge phase in a third mode of operation within the buck/boost voltage regulator to eliminate occurrence of a four switch switching condition.
摘要翻译：降压/升压稳压器响应于输入电压和多个控制信号产生调节的输出电压。降压/升压稳压器包括响应于多个控制信号的多个开关晶体管。控制电路监视调节的输出电压并响应于此产生多个控制信号。控制电路控制多个开关晶体管的操作，以使第一工作模式下的充电阶段，第二工作模式中的通过阶段和降压/升压电压内的第三工作模式中的放电阶段调节器消除了四个开关切换条件的发生。

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