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    • 31. 发明申请
    • In-system testing of an oscillator
    • 振荡器的系统测试
    • US20040019449A1
    • 2004-01-29
    • US10201512
    • 2002-07-23
    • ADC DSL Systems, Inc.
    • Juan A. EspinozaL. Grant GiddensClark Tollerson
    • G06F019/00
    • G01R23/005
    • Testing an oscillator and other electronic devices on a circuit board. One method of the present invention comprises powering the oscillator. Providing test instructions to a microprocessor on the circuit board to place the microprocessor in a test mode. Receiving a clock signal from the oscillator at a multiplexer in a field programmable gate array. Receiving operating instructions at the multiplexer from the microprocessor. Multiplexing the clock signal to an external access port with the multiplexer in response to the operating instructions and measuring the frequency of the clock signal at the external access port.
    • 在电路板上测试振荡器和其他电子设备。 本发明的一种方法包括给振荡器供电。 向电路板上的微处理器提供测试指令,以将微处理器置于测试模式。 在现场可编程门阵列中的多路复用器处从振荡器接收时钟信号。 从微处理器接收多路复用器的操作指令。 响应于操作指令并且测量外部接入端口处的时钟信号的频率,将时钟信号复用到多路复用器的外部访问端口。
    • 32. 发明申请
    • High-speed digital subscriber line (HDSL) wander reduction
    • 高速数字用户线(HDSL)漫游减少
    • US20040017848A1
    • 2004-01-29
    • US10202820
    • 2002-07-25
    • ADC DSL Systems, Inc.
    • Harrison DoanDung Quoc NguyenRamya Niroshana Dissanayake
    • H04B001/38
    • H04L1/24H04J3/06H04J3/0638H04L7/0004
    • An apparatus and method are described that allows for improved wander jitter reduction in communication devices and associated communication links, in particular on HDSL communication devices and links. The improved device apparatus and method detects the current data rate offset of the HDSL data rate being utilized and the data rate of the datastream being transmitted through the HDSL communication link and allows for the transmitting HDSL communication device to adjust the HDSL data rate to avoid high wander jitter nullsweet spotsnull. The improved device apparatus and method also allows for the profiling of communication devices for their specific high wander jitter sweet spot maximum points by sweeping the input data rate being transmitted at differing HDSL data rates.
    • 描述了一种装置和方法,其允许通信设备和相关联的通信链路,特别是在HDSL通信设备和链路上的改善的抖动抖动减小。 改进的设备装置和方法检测正在使用的HDSL数据速率的当前数据速率偏移和通过HDSL通信链路传输的数据流的数据速率,并允许HDSL通信设备的HDSL数据速率调整以避免高 漂移抖动“甜点”。 改进的设备装置和方法还允许通过扫描以不同的HDSL数据速率传输的输入数据速率来对通信设备进行轮廓分析以达到其特定的高漂移抖动最佳点最大点。
    • 34. 发明申请
    • High-speed digital subscriber line (HDSL) packet abort retry during channel blocking
    • 信道阻塞期间,高速数字用户线(HDSL)数据包中止重试
    • US20030235201A1
    • 2003-12-25
    • US10179566
    • 2002-06-25
    • ADC DSL Systems, Inc.
    • David J. Kasper IILaxman Anne
    • H04L012/28H04L012/56
    • H04Q3/0062H04L41/08H04M11/062
    • An apparatus and method is described that allows for improved transmission of EOC data over the EOC channels of communication devices and links, reducing the number of dropped EOC packets and increasing the bandwidth and robustness of the EOC channel. The improved device apparatus and method also allows for the reduction of the overhead of EOC channel error detection and correction on the limited resources of the communication device by aborting a corrupted or blocked EOC packet transmission and automatically resending. The improved device apparatus and method additionally allows the reduction of dropped EOC data packets due to corrupted transmission and the resultant miscommunication and corruption of high-level applications of the communication device, such as operation commands, remote configuration and management programs, and operation displays.
    • 描述了一种装置和方法,其允许通过通信设备和链路的EOC信道改进EOC数据的传输,减少丢弃的EOC分组的数量并增加EOC信道的带宽和鲁棒性。 改进的设备装置和方法还允许通过中止受损或阻止的EOC分组传输并自动重新发送来减少通信设备的有限资源上的EOC信道错误检测和校正的开销。 改进的设备装置和方法还允许减少由于传输损坏导致的丢弃的EOC数据分组,并且导致诸如操作命令,远程配置和管理程序以及操作显示之类的通信设备的高级应用的错误通信和破坏。
    • 35. 发明申请
    • TESTING ANALOG-TO-DIGITAL AND DIGITAL-TO-ANALOG CONVERTERS
    • 测试模拟到数字和数字到模拟转换器
    • US20030227400A1
    • 2003-12-11
    • US10166156
    • 2002-06-10
    • ADC DSL Systems, Inc.
    • L. Grant GiddensJuan A. Espinoza
    • H03M001/10
    • H03M1/109H03M1/12H03M1/66
    • Testing of analog-to-digital and digital-to-analog converters formed in integrated circuits. In one embodiment, a method of testing an analog-to-digital (A/D) converter comprises applying an analog test signal of a first frequency to an input of the A/D converter. Sampling digital byte samples from an output of the A/D converter at a second sampling frequency and comparing select digital byte samples with each other. When the select digital byte samples match, storing a verify bit in a memory to verify the A/D converter is working. In another embodiment, a method of testing a digital-to-analog (D/A) comprises creating repeating digital byte samples with a logic circuit formed in the integrated circuit. Converting the repeating digital byte samples into an analog test signal with the D/A converter. Comparing the frequency of the analog test signal with the frequency of an expected analog signal to determine if the D/A converter is working.
    • 在集成电路中形成的模拟数字和数模转换器的测试。 在一个实施例中,测试模数(A / D)转换器的方法包括将第一频率的模拟测试信号应用于A / D转换器的输入端。 以第二采样频率从A / D转换器的输出采样数字字节采样,并将选择的数字字节采样进行比较。 当选择数字字节样本匹配时,将验证位存储在存储器中以验证A / D转换器是否正常工作。 在另一个实施例中,测试数模(D / A)的方法包括用在集成电路中形成的逻辑电路产生重复的数字字节样本。 使用D / A转换器将重复数字字节样本转换为模拟测试信号。 将模拟测试信号的频率与预期模拟信号的频率进行比较,以确定D / A转换器是否工作。
    • 40. 发明申请
    • Circuit board fault warning system
    • 电路板故障预警系统
    • US20030132851A1
    • 2003-07-17
    • US10051794
    • 2002-01-16
    • ADC DSL Systems, Inc.
    • Gary Gottlieb
    • G08B005/22
    • G08B29/04
    • A fault warning system controls light sources and a warning signal to provide an indication of fatal and non-fatal faults in a communication system. The circuitry uses a pull-down circuit in electrical communication with light and signal control circuits. The circuit can be operated to activate a first light emitting diode (LED) if an operational status of a monitored circuit is either fatal or non-fatal fault. The circuit can be operated to deactivate a second LED if an operational status of a monitored circuit is fatal, and the second LED remains active if the operational status of the circuit is a non-fatal fault.
    • 故障预警系统控制光源和警告信号,以提供通信系统中致命和非致命故障的指示。 该电路使用与光和信号控制电路进行电气通信的下拉电路。 如果所监测的电路的运行状态是致命的或非致命的故障,则该电路可以被操作以激活第一发光二极管(LED)。 如果被监控电路的运行状态是致命的,则可以对电路进行操作,以禁用第二个LED,如果电路的运行状态是非致命故障,则第二个LED保持有效。