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21. 发明申请

US20160233383A1 Epitaxial Hexagonal Materials on IBAD-Textured Substrates 有权
标题翻译： IBAD纹理基片上的外延六边形材料
公开(公告)号：US20160233383A1
公开(公告)日：2016-08-11
申请号：US15041017
申请日：2016-02-10
申请人： iBeam Materials, Inc.
发明人： Vladimir Matias , Christopher Yung
IPC分类号： H01L33/32 , H01L33/18
CPC分类号： H01L33/32 , H01L21/02458 , H01L21/02483 , H01L21/02488 , H01L21/02502 , H01L21/02516 , H01L21/0254 , H01L27/15 , H01L27/32 , H01L33/02 , H01L33/16
摘要： A multilayer structure including a hexagonal epitaxial layer, such as GaN or other group III-nitride (III-N) semiconductors, a oriented textured layer, and a non-single crystal substrate, and methods for making the same. The textured layer has a crystalline alignment preferably formed by the ion-beam assisted deposition (IBAD) texturing process and can be biaxially aligned. The in-plane crystalline texture of the textured layer is sufficiently low to allow growth of high quality hexagonal material, but can still be significantly greater than the required in-plane crystalline texture of the hexagonal material. The IBAD process enables low-cost, large-area, flexible metal foil substrates to be used as potential alternatives to single-crystal sapphire and silicon for manufacture of electronic devices, enabling scaled-up roll-to-roll, sheet-to-sheet, or similar fabrication processes to be used. The user is able to choose a substrate for its mechanical and thermal properties, such as how well its coefficient of thermal expansion matches that of the hexagonal epitaxial layer, while choosing a textured layer that more closely lattice matches that layer.
摘要翻译：包括诸如GaN或其它III族氮化物（III-N）半导体的六边形外延层，<111>取向纹理层和非单晶衬底的多层结构及其制造方法。纹理层具有优选通过离子束辅助沉积（IBAD）纹理化方法形成的结晶取向并且可以双轴对准。纹理层的平面内晶体结构足够低以允许高质量六边形材料的生长，但是仍然可以显着地大于六边形材料所需的面内晶体结构。 IBAD工艺使低成本，大面积的柔性金属箔基板可用作单晶蓝宝石和硅的电子设备的替代品，用于制造电子设备，可实现按比例放大的卷对卷，片对单，或类似的制造工艺。使用者能够选择其机械和热性质的基材，例如其热膨胀系数与六边形外延层的热膨胀系数相匹配，同时选择更接近格子匹配该层的纹理层。

22. 发明授权

US09368640B2 Transistor with stacked oxide semiconductor films 有权
标题翻译：具有堆叠氧化物半导体膜的晶体管
公开(公告)号：US09368640B2
公开(公告)日：2016-06-14
申请号：US14217988
申请日：2014-03-18
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki
IPC分类号： H01L29/10 , H01L21/00 , H01L29/786 , H01L33/30 , H01L27/12 , H01L21/02 , H01L29/04 , H01L29/66 , H01L29/24
CPC分类号： H01L29/78693 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/02634 , H01L21/02667 , H01L27/1225 , H01L29/045 , H01L29/247 , H01L29/66666 , H01L29/66969 , H01L29/78642 , H01L29/7869 , H01L33/305
摘要： Objects are to provide a semiconductor device for high power application in which a novel semiconductor material having high productivity is used and to provide a semiconductor device having a novel structure in which a novel semiconductor material is used. The present invention is a vertical transistor and a vertical diode each of which has a stacked body of an oxide semiconductor in which a first oxide semiconductor film having crystallinity and a second oxide semiconductor film having crystallinity are stacked. An impurity serving as an electron donor (donor) which is contained in the stacked body of an oxide semiconductor is removed in a step of crystal growth; therefore, the stacked body of an oxide semiconductor is highly purified and is an intrinsic semiconductor or a substantially intrinsic semiconductor whose carrier density is low. The stacked body of an oxide semiconductor has a wider band gap than a silicon semiconductor.
摘要翻译：目的是提供一种用于高功率应用的半导体器件，其中使用具有高生产率的新型半导体材料，并提供具有其中使用新型半导体材料的新颖结构的半导体器件。本发明是一种垂直晶体管和一个垂直二极管，它们都具有堆叠具有结晶度的第一氧化物半导体膜和具有结晶性的第二氧化物半导体膜的氧化物半导体层叠体。在晶体生长的步骤中除去用作氧化物半导体层叠体中的电子给体（供体）的杂质; 因此，氧化物半导体的堆叠体被高度纯化，并且是载流子密度低的本征半导体或本质上的半导体。氧化物半导体的层叠体具有比硅半导体更宽的带隙。

23. 发明授权

US09349875B2 Semiconductor device and electronic device including the semiconductor device 有权
标题翻译：包括半导体器件的半导体器件和电子器件
公开(公告)号：US09349875B2
公开(公告)日：2016-05-24
申请号：US14733081
申请日：2015-06-08
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Masashi Tsubuku , Toshihiko Takeuchi , Yasumasa Yamane , Masashi Oota
IPC分类号： H01L27/14 , H01L29/786 , H01L29/66 , H01L29/04 , H01L29/10 , H01L21/02 , H01L21/477
CPC分类号： H01L29/7869 , H01L21/02483 , H01L21/02488 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/477 , H01L21/84 , H01L27/1207 , H01L27/1225 , H01L27/1248 , H01L29/045 , H01L29/1033 , H01L29/41733 , H01L29/42384 , H01L29/66969 , H01L29/78618 , H01L29/78621 , H01L29/78696
摘要： A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
摘要翻译：半导体器件包括第一氧化物半导体膜，第一氧化物半导体膜上的第二氧化物半导体膜，与第二氧化物半导体膜接触的源极，与第二氧化物半导体膜接触的漏电极，金属氧化物膜在第二氧化物半导体膜，源电极和漏极上，在金属氧化物膜上方的栅极绝缘膜，以及栅极绝缘膜上的栅电极。金属氧化物膜含有M（M表示Ti，Ga，Y，Zr，La，Ce，Nd或Hf）和Zn。当靶的原子比为M:Zn = x:y时，金属氧化物膜包括x /（x + y）大于0.67且小于或等于0.99的部分。

24. 发明授权

US09263531B2 Oxide semiconductor film, film formation method thereof, and semiconductor device 有权
标题翻译：氧化物半导体膜，其成膜方法和半导体器件
公开(公告)号：US09263531B2
公开(公告)日：2016-02-16
申请号：US14089190
申请日：2013-11-25
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki
IPC分类号： H01L29/12 , H01L29/22 , H01L21/02 , H01L29/786
CPC分类号： H01L21/02565 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02595 , H01L21/02631 , H01L29/22 , H01L29/24 , H01L29/7869
摘要： An oxide semiconductor film with high crystallinity is formed. An oxide semiconductor film having a single crystal region, which is formed by a sputtering method using a sputtering target including a polycrystalline oxide containing a plurality of crystal grains, is provided. The plurality of crystal grains contained in the sputtering target has a plane that is cleaved or is likely to be cleaved because of a weak crystal bond; therefore, the cleavage planes in the plurality of crystal grains are cleaved when an ion collides with the sputtering target, whereby flat plate-like sputtered particles can be obtained. The obtained flat plate-like sputtered particles are deposited on a deposition surface; accordingly, an oxide semiconductor film is formed. The flat plate-like sputtered particle is formed by separation of part of the crystal grain and therefore the oxide semiconductor film can have high crystallinity.
摘要翻译：形成具有高结晶度的氧化物半导体膜。提供具有单晶区域的氧化物半导体膜，其通过使用包括含有多个晶粒的多晶氧化物的溅射靶的溅射法形成。包含在溅射靶中的多个晶粒具有由于结晶结合弱而被切割或可能被切割的平面; 因此，当离子与溅射靶碰撞时，多个晶粒中的解理面被切割，从而可以获得平板状的溅射粒子。获得的平板状溅射颗粒沉积在沉积表面上; 因此，形成氧化物半导体膜。通过分离部分晶粒形成平板状溅射粒子，因此氧化物半导体膜可具有高结晶度。

25. 发明授权

US09257524B2 Layered film including heteroepitaxial PN junction oxide thin film 有权
标题翻译：分层膜包括异质外延PN结氧化物薄膜
公开(公告)号：US09257524B2
公开(公告)日：2016-02-09
申请号：US13790398
申请日：2013-03-08
申请人： TDK CORPORATION
发明人： Kazuya Maekawa , Kunihiro Ueda
IPC分类号： H01L29/66 , H01L21/02 , H01L29/861 , H01L29/12
CPC分类号： H01L29/66136 , H01L21/02381 , H01L21/02483 , H01L21/02488 , H01L21/02491 , H01L21/02505 , H01L21/02565 , H01L21/02576 , H01L21/02579 , H01L21/02581 , H01L21/02631 , H01L29/12 , H01L29/861
摘要： Semiconductors of different types are formed by a crystal growth technique and joined at the interface at which rapid atomic-layer-level compositional changes occur while maintaining high crystallinity of the semiconductor layers so as to form a heterogeneous PN junction. A layered film that includes a PN junction oxide thin film is formed on a single crystal substrate. The PN junction oxide thin film is constituted by an N-type semiconductor oxide thin film and a P-type semiconductor oxide thin film that are epitaxially grown to have c-axis orientation represented by (00k).
摘要翻译：不同类型的半导体通过晶体生长技术形成，并且在保持高半导体层的高结晶度的同时发生快速原子层组成变化的界面处接合，从而形成异质PN结。在单晶衬底上形成包含PN结氧化物薄膜的层状膜。 PN结氧化物薄膜由外延生长为具有由（00k）表示的c轴取向的N型半导体氧化物薄膜和P型半导体氧化物薄膜构成。

26. 发明授权

US09181437B2 Bath deposition solution for the wet-chemical deposition of a metal sulfide layer and related production method 有权
标题翻译：用于金属硫化物层的湿化学沉积的沉积溶液和相关的制备方法
公开(公告)号：US09181437B2
公开(公告)日：2015-11-10
申请号：US13575670
申请日：2011-01-27
申请人： Linda Buerkert , Dimitrios Hariskos , Torsten Kolb , Bettina Fuchs
发明人： Linda Buerkert , Dimitrios Hariskos , Torsten Kolb , Bettina Fuchs
IPC分类号： C23C18/12 , C09D1/00 , H01L21/02 , H01L31/0749
CPC分类号： C09D1/00 , C23C18/1204 , H01L21/02472 , H01L21/02474 , H01L21/02483 , H01L21/02557 , H01L21/02568 , H01L21/02628 , H01L31/0749 , Y02E10/541 , Y02P70/521
摘要： A bath deposition solution for the chemical bath deposition of a metal sulfide layer, a process for the production of such a bath deposition solution, and a process for producing a metal sulfide layer on a substrate using such a bath deposition solution are provided. The bath deposition solution contains a metal salt, an organosulfide, a chelating agent which with metal ions of the metal salt forms a chelate complex and ammonium hydroxide.
摘要翻译：提供了用于金属硫化物层的化学浴沉积的浴沉积溶液，用于制造这种浴沉积溶液的方法，以及使用这种浴沉积溶液在基板上制备金属硫化物层的方法。浴沉积溶液含有金属盐，有机硫化物，与金属盐的金属离子形成螯合络合物和氢氧化铵的螯合剂。

27. 发明授权

US09139934B2 REN semiconductor layer epitaxially grown on REAIN/REO buffer on Si substrate 有权
标题翻译：在Si衬底上在REAIN / REO缓冲液上外延生长的REN半导体层
公开(公告)号：US09139934B2
公开(公告)日：2015-09-22
申请号：US14161925
申请日：2014-01-23
申请人： Rytis Dargis , Robin Smith , Andrew Clark
发明人： Rytis Dargis , Robin Smith , Andrew Clark
IPC分类号： H01L31/0256 , H01L21/00 , H01L21/84 , H01L21/20 , H01L21/36 , C30B29/22 , C30B25/18 , C30B29/40 , C30B29/38 , H01L29/20 , H01L21/02
CPC分类号： C30B29/22 , C30B25/183 , C30B29/16 , C30B29/38 , C30B29/403 , C30B29/406 , H01L21/02293 , H01L21/02381 , H01L21/02433 , H01L21/02439 , H01L21/02483 , H01L21/02502 , H01L21/02505 , H01L21/02521 , H01L21/0254 , H01L29/24 , H01L33/26
摘要： Rare earth semiconductor and ferromagnetic material epitaxially grown on a silicon substrate includes a buffer of single crystal epitaxial rare earth/aluminum nitride positioned on a single crystal silicon substrate and a single crystal epitaxial rare earth oxide positioned on the single crystal epitaxial aluminum nitride. A layer of single crystal epitaxial semiconductor and ferromagnetic rare earth nitride is positioned on the buffer. A layer of III-V semiconductive material may be optionally positioned on the rare earth nitride layer.
摘要翻译：外延生长在硅衬底上的稀土半导体和铁磁材料包括位于单晶硅衬底上的单晶外延稀土/氮化铝的缓冲器和位于单晶外延氮化铝上的单晶外延稀土氧化物。一层单晶外延半导体和铁磁稀土氮化物位于缓冲器上。 III-V族半导体材料层可以任选地位于稀土氮化物层上。

28. 发明申请

US20150263141A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20150263141A1
公开(公告)日：2015-09-17
申请号：US14645781
申请日：2015-03-12
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei YAMAZAKI , Masami JINTYOU , Yukinori SHIMA
IPC分类号： H01L29/66 , H01L21/385 , H01L21/441 , H01L21/02 , H01L29/24 , H01L29/49 , H01L21/4757 , H01L29/786 , H01L21/477
CPC分类号： H01L29/66969 , H01L21/02326 , H01L21/0234 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02565 , H01L21/02573 , H01L21/0262 , H01L29/42384 , H01L29/4908 , H01L29/4966 , H01L29/78621 , H01L29/7869
摘要： Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.
摘要翻译：本发明提供一种半导体装置的制造方法，其防止电特性变化，提高其可靠性。在该方法中，在氧化物半导体膜上形成绝缘膜，在绝缘膜上形成缓冲膜，向缓冲膜和绝缘膜添加氧，在氧气的缓冲膜上形成导电膜并且使用导电膜作为掩模将杂质元素添加到氧化物半导体膜。可以在将杂质元素添加到氧化物半导体膜之后形成含有氢并与氧化物半导体膜重叠的绝缘膜。

29. 发明授权

US09054134B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09054134B2
公开(公告)日：2015-06-09
申请号：US14202670
申请日：2014-03-10
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Takuya Hirohashi , Masahiro Takahashi , Takashi Shimazu
IPC分类号： H01L21/00 , H01L21/336 , H01L27/108 , H01L29/66 , H01L21/02 , H01L27/12 , H01L29/786
CPC分类号： H01L29/66742 , H01L21/02422 , H01L21/02472 , H01L21/02483 , H01L21/02502 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/02667 , H01L27/1225 , H01L29/66969 , H01L29/7869
摘要： A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
摘要翻译：可以使用较大的衬底，并且可以通过形成具有高结晶度的氧化物半导体层来制造具有期望的高场敏性迁移率的晶体管，由此大尺寸显示装置，高性能半导体器件，等可以投入实际使用。在衬底上形成第一多组分氧化物半导体层，并在其上形成单组分氧化物半导体层; 然后通过在500℃至1000℃（包括端值）进行热处理从表面向内部进行晶体生长，优选550℃至750℃，从而使第一多组分氧化物半导体层包括单晶区域和形成包括单晶区域的单组分氧化物半导体层; 并且包括单晶区域的第二多分量氧化物半导体层堆叠在包括单晶区域的单组分氧化物半导体层上。

30. 发明申请

US20150053966A1 METHOD FOR PRODUCING HIGH-PERFORMING AND ELECTRICALLY STABLE SEMI-CONDUCTIVE METAL OXIDE LAYERS, LAYERS PRODUCED ACCORDING TO THE METHOD AND USE THEREOF 有权
标题翻译：用于生产高性能和电可稳定的半导体金属氧化物层的方法，根据该方法生产的层及其用途
公开(公告)号：US20150053966A1
公开(公告)日：2015-02-26
申请号：US14348948
申请日：2012-09-12
申请人： Juergen Steiger , Duy Vu Pham , Anita Neumann , Alexey Merkulov , Arne Hoppe
发明人： Juergen Steiger , Duy Vu Pham , Anita Neumann , Alexey Merkulov , Arne Hoppe
IPC分类号： H01L29/786 , H01L21/02 , H01L29/66 , H01L29/24
CPC分类号： H01L29/78696 , C23C18/1208 , C23C18/1225 , C23C18/1279 , C23C18/14 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02565 , H01L21/02614 , H01L21/02628 , H01L21/02664 , H01L29/24 , H01L29/66969 , H01L29/7869
摘要： The present invention relates to a method for producing a semi-conductor laminate comprising a first and a second metal oxide layer as well as a dielectric layer, wherein the first metal oxide layer is arranged between the second metal oxide layer and the dielectric layer. The first and second metal oxide layers are formed accordingly from a first and a second liquid phase. The present invention also relates to a semi-conductor laminate that can be obtained from such a method, and to electronic components comprising such a semi-conductor laminate.
摘要翻译：本发明涉及一种包括第一和第二金属氧化物层以及电介质层的半导体层压体的制造方法，其中第一金属氧化物层被布置在第二金属氧化物层和电介质层之间。第一和第二金属氧化物层相应地由第一和第二液相形成。本发明还涉及可以从这种方法获得的半导体层压体以及包含这种半导体层压体的电子部件。

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