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21. 发明授权

US07563144B2 Cartridge for contact terminals and semiconductor device socket provided with the same 有权
公开(公告)号：US07563144B2
公开(公告)日：2009-07-21
申请号：US12004049
申请日：2007-12-20
申请人： Shuuji Kunioka , Katsumi Suzuki , Eiichi Murakoshi
发明人： Shuuji Kunioka , Katsumi Suzuki , Eiichi Murakoshi
IPC分类号： H01R13/24
CPC分类号： G01R1/0433 , H01R12/7047 , H01R12/714 , H01R13/24 , H01R2201/20
摘要： A probe pin cartridge includes a first substrate disposed opposite to a positioning member, a second substrate laid beneath the first substrate, having the same contour as that of the first substrate and a plurality of probe pins held by the first and second substrates.

22. 发明授权

US07540745B2 Burn-in socket having pick-up arrangement for quickly pick-up IC package after IC package is tested 失效
标题翻译：老化插座具有接收装置，可在IC封装测试后快速接收IC封装
公开(公告)号：US07540745B2
公开(公告)日：2009-06-02
申请号：US12156072
申请日：2008-05-28
申请人： Wei-Chih Lin
发明人： Wei-Chih Lin
IPC分类号： H01R13/44
CPC分类号： G01R31/2863 , G01R1/0433 , Y10S439/94
摘要： A burn-in socket for receiving an IC package (2) is provided. The burn-in socket includes a socket body with a plurality of contacts (7) disposed therein and a cover (6) rotatablely coupled to the socket body. The socket body defines a receiving space (500) for receiving the IC package (2) to be tested therein. The cover (6) has a pushing portion (611) capable of pressing on the IC package (2) toward the socket body when the cover (6) is turned to a closed position. At least one pair of pick-up arrangements (8) are provided around the pushing portion (611) for automatic pick-up of the IC package (2).
摘要翻译：提供用于接收IC封装（2）的老化插座。老化插座包括具有设置在其中的多个触头（7）的插座主体和可旋转地联接到插座主体的盖（6）。插座主体限定用于接收要在其中测试的IC封装（2）的接收空间（500）。当盖（6）转到关闭位置时，盖（6）具有能够朝向插座主体按压IC封装（2）的推动部分（611）。至少一对拾取装置（8）围绕推动部分（611）设置，用于IC封装（2）的自动拾取。

23. 发明申请

US20080315900A1 HIGH TEMPERATURE CERAMIC SOCKET CONFIGURED TO TEST PACKAGED SEMICONDUCTOR DEVICES 有权
标题翻译：配置到测试包装半导体器件的高温陶瓷插座
公开(公告)号：US20080315900A1
公开(公告)日：2008-12-25
申请号：US11766938
申请日：2007-06-22
申请人： Jose Ysaguirre , Jens Ullmann , Adalberto M. Ramirez , Robert J. Sylvia
发明人： Jose Ysaguirre , Jens Ullmann , Adalberto M. Ramirez , Robert J. Sylvia
IPC分类号： G01R1/073 , G01R31/02
CPC分类号： G01R1/0433
摘要： A test socket assembly is for use in testing integrated circuits. A single piece socket is formed substantially of an insulating material and having a plurality of holes formed therein configured to receive a plurality of electrically conductive springs. Each hole of the single piece socket has therein a separate one of the electrically conductive springs. A test socket includes a plurality of pins configured to receive leads of an integrated circuit, the pins of the test socket extending into the plurality of holes of the single piece socket with each pin engaging a spring, wherein the single piece socket is positioned on a circuit board with the plurality of holes being in alignment with electrical contacts on the circuit board such that the plurality of springs are electrically interconnecting the contacts and the plurality of pins. The single -piece socket is comprised substantially of a high-temperature insulating material, such as ceramic.
摘要翻译：测试插座组件用于测试集成电路。单件插座基本上由绝缘材料形成，并且具有形成在其中的多个孔，构造成容纳多个导电弹簧。单件插座的每个孔都具有单独的一个导电弹簧。测试插座包括被配置为接收集成电路的引线的多个引脚，测试插座的引脚延伸到单个插座的多个孔中，每个引脚与弹簧接合，其中单个插座位于所述多个孔与所述电路板上的电触点对齐，使得所述多个弹簧将所述触点和所述多个销电连接。单件插座基本上由诸如陶瓷的高温绝缘材料构成。

24. 发明授权

US07330039B2 Method for making a socket to perform testing on integrated circuits 失效
标题翻译：一种套接字在集成电路上进行测试的方法
公开(公告)号：US07330039B2
公开(公告)日：2008-02-12
申请号：US11090614
申请日：2005-03-25
申请人： Igor Y. Khandros , Gaetan L. Mathieu , Carl V. Reynolds
发明人： Igor Y. Khandros , Gaetan L. Mathieu , Carl V. Reynolds
IPC分类号： G01R31/02
CPC分类号： G01R3/00 , G01R1/0433 , G01R1/0483 , G01R1/07378 , G01R31/2863 , H01L24/13 , H01L2224/131 , H01L2924/01046 , H01L2924/01055 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , Y10T29/49117 , Y10T29/4913 , Y10T29/49144 , Y10T29/49149 , Y10T29/49169 , Y10T29/49179 , Y10T29/49197 , Y10T29/49204 , Y10T29/4921 , Y10T29/49211 , Y10T29/49224 , Y10T29/53217 , Y10T29/53265 , H01L2924/014
摘要： A interconnect structure is inexpensively manufactured and easily insertable into a socket. The interconnect structure is manufactured by forming a sacrificial substrate with cavities that is covered by a masking material having openings corresponding to the cavities. A first plating process is performed by depositing conductive material, followed by coupling wires within the openings and performing another plating process by depositing more conductive material. The interconnect structure is completed by first removing the masking material and sacrificial substrate. Ends of the wires are coupled opposite now-formed contact structures to a board. To complete the socket, a support device is coupled to the board to hold a tested integrated circuit.
摘要翻译：互连结构廉价地制造并且容易地插入到插座中。通过形成具有由具有与空腔对应的开口的掩模材料覆盖的空腔的牺牲衬底来制造互连结构。通过沉积导电材料，然后在开口内连接线并通过沉积更多导电材料进行另一电镀工艺来执行第一电镀工艺。通过首先去除掩模材料和牺牲衬底来完成互连结构。电线的端部与现在形成的接触结构相对联接到电路板。要完成插座，支持设备耦合到电路板以保持测试的集成电路。

25. 发明申请

US20080032529A1 ELECTRICAL CONTACT AND SOCKET FOR ELECTRICAL PARTS 有权
标题翻译：电气部件电气接点和插座
公开(公告)号：US20080032529A1
公开(公告)日：2008-02-07
申请号：US11830007
申请日：2007-07-30
申请人： Hideo SHIMADA
发明人： Hideo SHIMADA
IPC分类号： H01R13/44
CPC分类号： H01R12/57 , G01R1/0433 , G01R1/06722 , H01R12/714 , H01R13/2421 , H01R43/16
摘要： The present invention is to provide an electrical contact and a socket for electrical parts which can be produced easily, at low cost and is light in weight. The contact pin 15 comprises a first contact member 26 having a first contact portion 26d to be contacted with an IC package 12, wherein the first contact member 26 is formed into a cylindrical shape by curling an electroconductive plate, a blocking piece 26e is formed at a middle portion of the cylindrical shape by making a cut in the middle portion, and the blocking piece 26e is bent toward an inside of the cylindrical shape in such a manner that the blocking piece, in a plan view, blocks a through hole that runs vertically through the inside of the cylindrical shape.
摘要翻译：本发明提供一种能够以低成本容易地制造并且重量轻的电气部件的电接点和插座。接触销15包括具有与IC封装12接触的第一接触部分26d的第一接触构件26，其中通过卷曲导电板将第一接触构件26形成为圆柱形，阻挡件26e 通过在中间部分形成切口而形成在圆筒形的中间部分，并且阻挡片26e朝向圆柱形的内侧弯曲，使得阻挡件在平面图中阻挡通孔通过圆柱形内部垂直延伸的孔。

26. 发明申请

US20070126456A1 Test socket 有权
标题翻译：测试插座
公开(公告)号：US20070126456A1
公开(公告)日：2007-06-07
申请号：US11601609
申请日：2006-11-17
申请人： Chye Toh , Boon Chew
发明人： Chye Toh , Boon Chew
IPC分类号： G01R31/26
CPC分类号： G01R1/0466 , G01R1/0433 , G01R1/0483
摘要： There is provided a test socket for an integrated circuit. The test socket comprises a first plurality of test points for making electrical contact with contacts of a laminate package and a second plurality of test points for making electrical contact with contacts of a lead frame package. The test socket is suitable for testing, at one time, a laminate package, or a lead frame package, or both a laminate package and a lead frame package.
摘要翻译：为集成电路提供了一个测试插座。测试插座包括用于与叠层封装的触点进行电接触的第一多个测试点和用于与引线框架封装的触点电接触的第二多个测试点。测试插座适用于一次测试层压封装或引线框架封装，或层叠封装和引线框架封装两者。

27. 发明授权

US07217580B2 Method for processing an integrated circuit 有权
标题翻译：集成电路处理方法
公开(公告)号：US07217580B2
公开(公告)日：2007-05-15
申请号：US10973704
申请日：2004-10-26
申请人： Douglas S. Ondricek , David V. Pedersen
发明人： Douglas S. Ondricek , David V. Pedersen
IPC分类号： G01R31/66 , H01L21/66 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： G01R1/0466 , G01R1/0408 , G01R1/0433 , G01R31/01 , G01R31/2863 , G01R31/2867 , G01R31/2893 , H01L21/67294 , H01L23/04 , H01L23/13 , H01L23/32 , H01L23/5385 , H01L24/72 , H01L2223/54473 , H01L2224/16 , H01L2224/73251 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01027 , H01L2924/01033 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/16152 , H05K3/325 , H05K2201/09472 , H01L2924/00 , H01L2224/72
摘要： Methods for processing at least one die which comprises an integrated circuit. In one example of a method of the invention, an identification code is applied to a carrier. A singulated die is deposited into the carrier which holds the singulated die. The singulated die comprises an integrated circuit. The identification code may be applied to the carrier before or after depositing the singulated die into the carrier. The carrier may be used in testing the singulated die and may include a plurality of singulated die or just one singulated die. In another example of a method of the invention, an identification code is applied to a die. The die is deposited into a carrier which holds the die. The die comprises an integrated circuit, and the carrier holds the die in singulated form. Typically the die is placed in the carrier without any packaging which may protect the die. The identification code may be applied to the die before or after it is deposited into the carrier.
摘要翻译：用于处理包括集成电路的至少一个管芯的方法。在本发明的方法的一个示例中，将识别码应用于载体。单片模具沉积在保持单模模具的载体中。单片模具包括集成电路。可以在将分割的裸片沉积到载体中之前或之后将识别码应用于载体。载体可以用于测试单个模具，并且可以包括多个单个模具或仅一个单模模具。在本发明方法的另一个例子中，将识别码应用于管芯。模具沉积在保持模具的载体中。芯片包括集成电路，并且载体以单模形式保持模具。通常，模具被放置在载体中而没有任何可保护模具的包装。识别码可以在将其沉积到载体中之前或之后施加于该芯片。

28. 发明授权

US07129721B2 Method and apparatus for processing semiconductor devices in a singulated form 失效
标题翻译：以单数形式处理半导体器件的方法和装置
公开(公告)号：US07129721B2
公开(公告)日：2006-10-31
申请号：US10919667
申请日：2004-08-16
申请人： Steven L. Hamren , Daniel P. Cram
发明人： Steven L. Hamren , Daniel P. Cram
IPC分类号： G01R31/302
CPC分类号： G01R1/0408 , G01R1/0433 , H01L24/13 , H01L24/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2924/00013 , H01L2924/00014 , H01L2924/01079 , H01L2924/01087 , H01L2924/09701 , H01L2924/14 , H01L2924/16195 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H05K3/321 , H01L2224/29099 , H01L2224/05599
摘要： Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.
摘要翻译：为半导体器件的处理和测试提供了改进的方法和设备。一个实施例包括用于一个或多个具有非常细间距的电I / O（输入/输出）元件的半导体管芯的管芯载体。半导体裸片以单一形式临时附接到模具载体，以便能够用常规接触技术测试骰子。模具载体可以包括柔性电路基底基板和刚性支撑框架。另外的实施例包括用于将半导体管芯附接到管芯载体并用于在测试期间提供与半导体管芯的临时电连接的材料和方法。用于提供临时电连接的示例性材料可以包括导电膜或带，导电或导体填充的环氧树脂或基于RTV粘合剂的材料，浸渍有导电填料或非回流焊膏的水溶性材料。

29. 发明授权

US07108535B1 Integrated circuit test socket 有权
标题翻译：集成电路测试插座
公开(公告)号：US07108535B1
公开(公告)日：2006-09-19
申请号：US11180943
申请日：2005-07-12
申请人： Somboon Mingviriya
发明人： Somboon Mingviriya
IPC分类号： H01R13/62
CPC分类号： G01R1/0433 , G01R1/0466 , H01R12/88 , H01R2201/20
摘要： A test socket is provided for use in testing integrated circuits, especially integrated circuits in BGA packages. The test socket comprises a base member and a cover member configured to move vertically between an upper position and a lower position with respect to the base member. Springs are positioned between the base member and the cover member and configured to bias the cover member in the upper position. A lever is coupled to the base member and to the cover member and is configured to pivot to an open position when the cover member is in the lower position and to pivot to a closed position to confine an integrated circuit within the base member when the cover member is in the upper position.
摘要翻译：提供测试插座用于测试集成电路，特别是BGA封装中的集成电路。测试插座包括基座构件和盖构件，该构件构造成相对于基座构件在上部位置和下部位置之间垂直移动。弹簧定位在基部构件和盖构件之间，并且构造成将盖构件偏置在上部位置。杠杆联接到基座构件和盖构件并且构造成当盖构件处于下部位置时枢转到打开位置并且枢转到关闭位置以将集成电路限制在基座构件内，当盖会员处于上位。

30. 发明授权

US07021954B2 Test connector with metallic stiffener 失效
标题翻译：带金属加强筋的测试连接器
公开(公告)号：US07021954B2
公开(公告)日：2006-04-04
申请号：US10826213
申请日：2004-04-16
申请人： Andrew D. Gattuso , Hsiu-Yuan Hsu
发明人： Andrew D. Gattuso , Hsiu-Yuan Hsu
IPC分类号： H01R4/50
CPC分类号： G01R1/0433
摘要： A test connector (1) includes a base (10), a cover (20), a metallic stiffener (70), two operating members (60), and a lid (30). An opening (703) is defined in the stiffener for receiving the cover therein. Two spaced projections (704) are formed on one end of the stiffener. Two receiving grooves (705) are defined in bottoms of the projections respectively. Each operating member comprises a first operating lever (601) engaged with the receiving grooves via a first shaft (603), and a second operating lever (602) engaged with the base. The lid is engaged with the operating members for pivotably moving the first and second operating levers so that the operating members actuate the stiffener and the cover to move. When the cover moves to make the terminals connect a CPU during applying an unduly force on the lid, the metallic stiffener can protect the plastic cover from damage.
摘要翻译：测试连接器（1）包括基座（10），盖（20），金属加强件（70），两个操作构件（60）和盖（30）。在加强件中限定开口（703），用于在其中容纳盖。两个间隔开的凸起（704）形成在加强件的一端上。在凸起的底部分别限定了两个接收槽（705）。每个操作构件包括经由第一轴（603）与接收槽接合的第一操作杆（601）和与基座接合的第二操作杆（602）。盖与操作构件接合，用于可枢转地移动第一操作杆和第二操作杆，使得操作构件致动加强件和盖移动。当盖子移动以使端子在盖上施加不适当的力量时连接CPU，金属加强件可以保护塑料盖免受损坏。

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