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21. 发明授权

US06882513B2 Integrated overvoltage and reverse voltage protection circuit 有权
标题翻译：集成过压和反向电压保护电路
公开(公告)号：US06882513B2
公开(公告)日：2005-04-19
申请号：US10243749
申请日：2002-09-13
申请人： J. Marcos Laraia
发明人： J. Marcos Laraia
IPC分类号： H01L27/02 , H02H3/00
CPC分类号： H01L27/0285
摘要： An integrated overvoltage and reverse voltage protection circuit. The protection circuit includes a field-effect transistor having a source terminal coupled to an input terminal of the protection circuit, and a drain terminal coupled to an output terminal of the protection circuit. A resistor is coupled between the source terminal and the body terminal of the field-effect transistor to inhibit reverse current flow during a reverse voltage condition. A voltage-current dependent circuit is coupled between the gate terminal and the source terminal of the field-effect transistor, and is configured to apply a voltage between the gate terminal and the source terminal that is dependent on the current passing through the voltage-current dependent circuit. A current application circuit is coupled to the voltage-current dependent circuit and is configured to apply a current that limits or even altogether stops an applied overvoltage condition from reaching a load circuit.
摘要翻译：集成过压和反向电压保护电路。保护电路包括具有耦合到保护电路的输入端的源极端子和耦合到保护电路的输出端子的漏极端子的场效应晶体管。电阻器耦合在源极端子和场效应晶体管的主体端子之间，以在反向电压条件期间抑制反向电流流动。电压电流相关电路耦合在场效应晶体管的栅极端子和源极端子之间，并且被配置为在栅极端子和源极端子之间施加电压，该电压取决于通过电压 - 电流的电流依赖电路。当前的应用电路耦合到与电压 - 电流相关的电路，并且被配置为施加限制或甚至总共停止所施加的过电压状况的电流到达负载电路。

22. 发明授权

US06844781B1 Dual differential-input amplifier having wide input range 有权
标题翻译：双差分输入放大器具有宽输入范围
公开(公告)号：US06844781B1
公开(公告)日：2005-01-18
申请号：US10615440
申请日：2003-07-07
申请人： Joseph Walsh , Stan Latimer
发明人： Joseph Walsh , Stan Latimer
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/3066 , H03F3/3022 , H03F3/45085 , H03F3/45094 , H03F3/45183 , H03F3/45192 , H03F2203/45028 , H03F2203/45664
摘要： A dual differential-input operational amplifier that includes six PMOSFETs having their source terminals coupled to a high voltage. A seventh and eighth PMOSFET have their source terminals coupled to a current source. Four NMOSFETs have their source terminals coupled to a low voltage. A fifth and sixth NMOSFET have their source terminals coupled to a current sink. The various PMOSFETs and NMOSFETs are coupled together such that the gate terminals of the fifth NMOSFET and eighth PMOSFET receive a first input of the differential input, and such that the gate terminals of the sixth NMOSFET and the seventh PMOSFET receive a second input of the differential input. The operational amplifier may be vertically inverted, or implemented by bipolar transistors, with cascoding devices, and with a second stage in the form of an inverter.
摘要翻译：双差分输入运算放大器，其包括六个PMOSFET，其源极端子耦合到高电压。第七和第八PMOSFET的源极端子耦合到电流源。四个NMOSFET的源极端子耦合到低电压。第五和第六NMOSFET的源极端子耦合到电流吸收器。各种PMOSFET和NMOSFET耦合在一起，使得第五NMOSFET和第八PMOSFET的栅极端子接收差分输入的第一输入，并且使得第六NMOSFET和第七PMOSFET的栅极端子接收差分的第二输入输入。运算放大器可以垂直倒置或由双极型晶体管用级联装置实现，并且具有逆变器形式的第二级。

23. 发明授权

US07672462B2 Method and system for acoustic shock protection 有权
标题翻译：防震保护方法和系统
公开(公告)号：US07672462B2
公开(公告)日：2010-03-02
申请号：US10815891
申请日：2004-03-31
申请人： Todd Schneider , Robert L. Brennan , David Hermann , Tina Soltani
发明人： Todd Schneider , Robert L. Brennan , David Hermann , Tina Soltani
IPC分类号： H03G11/00 , H03G9/00 , H03G7/00 , H03G3/00 , H04R29/00 , H04B15/00
CPC分类号： H03G7/002 , A61F2011/145 , H04R3/02 , H04R25/453
摘要： An acoustic shock protection method and device are provided. A pattern analysis-based approach is taken to an input signal to perform feature extraction. A parameter space is identified, which is corresponding to the signal space of the input signal. A rule-based decision approach is taken to the parameter space to detect an acoustic shock event. The device may be advantageously implemented using a weighted overlap-add approach to provide low group delay, high-fidelity and a high degree of protection from acoustic shock events.
摘要翻译：提供了一种声学防震方法和装置。对输入信号进行基于模式分析的方法来执行特征提取。识别参数空间，其对应于输入信号的信号空间。对参数空间进行基于规则的决策方法来检测声学冲击事件。该装置可以有利地使用加权重叠方法来实现，以提供低组延迟，高保真度和高度的防止声学冲击事件的保护。

24. 发明申请

US20080186241A1 BODY RADIATION AND CONDUCTIVITY IN RF COMMUNICATION 有权
标题翻译：射频通信中的身体辐射和电导率
公开(公告)号：US20080186241A1
公开(公告)日：2008-08-07
申请号：US12023187
申请日：2008-01-31
申请人： Craig L. Christensen
发明人： Craig L. Christensen
IPC分类号： H01Q1/12
CPC分类号： H04B13/005 , A61B5/0028 , A61N1/36036 , A61N1/37217 , H04R25/554 , H04R2225/51
摘要： Method and System for wireless communications is provided. The system includes an RF module, and a coupler. The coupler is coupled with the RF module. The coupler includes a member for conductive coupling with the user's body such that RF energy is coupled into and/or out of the user's body.
摘要翻译：提供了无线通信的方法和系统。该系统包括RF模块和耦合器。耦合器与RF模块耦合。耦合器包括用于与用户身体导电耦合的部件，使得RF能量耦合到用户身体和/或从用户身体外部。

25. 发明授权

US07342985B1 Delay locked loop with fixed angle de-skew, quick start and low jitter 有权
标题翻译：延迟锁定环，具有固定角度去偏移，快速启动和低抖动
公开(公告)号：US07342985B1
公开(公告)日：2008-03-11
申请号：US10602195
申请日：2003-06-24
申请人： Melvin W. Stene
发明人： Melvin W. Stene
IPC分类号： H03D3/24
CPC分类号： H03L7/0812 , H03L7/0814 , H03L7/095 , H03L7/10
摘要： Digital delay locked loops which generate fixed angle delayed (e.g., quadrature) clock signals based on a reference clock signal and that accounts for clock signal delay. The number of quadrature delay elements is calculated based on the number of delay elements needed to provide one or more cycles of delay, and adjusted to reflect system clock delay. The digital delay locked loop also acquires a locked state quickly by sampling more frequently before acquiring the lock than after. Furthermore, jitter is reduced by introducing hysteresis into the sampling process, and by disabling the delay element adjustment process during jitter sensitive times. Lock stability is improved by introducing hysteresis into the lock detection process.
摘要翻译：数字延迟锁定环，其基于参考时钟信号产生固定角度延迟（例如，正交）时钟信号，并且考虑到时钟信号延迟。基于提供一个或多个延迟周期所需的延迟元件的数量来计算正交延迟元件的数量，并且被调整以反映系统时钟延迟。数字延迟锁定环还在获取锁定之前更频繁地采集锁定状态。此外，通过在采样过程中引入迟滞，以及通过在抖动敏感时间期间禁用延迟元件调整过程来减小抖动。通过在锁定检测过程中引入滞后来改善锁定稳定性。

26. 发明申请

US20080027667A1 SENSOR CALIBRATION USING SELECTIVELY DISCONNECTED TEMPERATURE 有权
标题翻译：传感器校准使用选择性的断开温度
公开(公告)号：US20080027667A1
公开(公告)日：2008-01-31
申请号：US11460951
申请日：2006-07-28
申请人： Larry Petersen , Jose Taveira
发明人： Larry Petersen , Jose Taveira
IPC分类号： G06F19/00 , G01D18/00 , G06F17/40
CPC分类号： G01D3/0365 , G01D3/022 , G01D18/008
摘要： Calibration of a sensor circuit that includes a sensor, a temperature measurement circuit and a signal processing path. The sensor senses a physical parameter to be measured and generates an electrical sensor output signal representing the physical parameter. The temperature measurement circuit outputs a measured temperature. The signal processing path is coupled to the sensor so as to receive the electrical sensor output signal and use the measured temperature to compensate for temperature variations in the electrical sensor output signal. During calibration, the output voltage of the signal processing path is measured at multiple temperatures, and at multiple values of the physical parameter being measured at each temperature while the signal processing path is disconnected from using the measured temperature of the temperature measurement circuit.
摘要翻译：包括传感器，温度测量电路和信号处理路径的传感器电路的校准。传感器检测要测量的物理参数，并产生表示物理参数的电传感器输出信号。温度测量电路输出测量温度。信号处理路径耦合到传感器，以便接收电传感器输出信号并使用测量的温度来补偿电传感器输出信号中的温度变化。在校准期间，在多个温度下测量信号处理路径的输出电压，并且在将信号处理路径与使用温度测量电路的测量温度断开的同时，在每个温度下测量物理参数的多个值。

27. 发明授权

US07215156B1 Differential signal driver having complimentary and current-aided pre-emphasis 有权
标题翻译：差分信号驱动器具有互补和电流辅助预加重
公开(公告)号：US07215156B1
公开(公告)日：2007-05-08
申请号：US11157403
申请日：2005-06-20
申请人： Zhongmin Li
发明人： Zhongmin Li
IPC分类号： H03K19/094
CPC分类号： H04L25/0282 , H04L25/0276
摘要： A differential voltage signal (LVDS) driver circuit and/or a Current Mode Logic (CML) driver circuit. The circuit includes two current switches, each coupled to a corresponding input node. In a complementary manner, when a differential signal is applied across the input nodes, one current switch is open, while the other current switch is closed, and vice versa. A current allocation component allocates current between the two input current switches such that, when the first current switch is closed and the second current switch is open, increasing current is allocated through the first current switch and the intervening current path between the current allocation component and the first current switch, and vice versa. The circuit includes complementary pre-emphasis and/or current-aided pre-emphasis mechanisms that boost differential output transmission edges.
摘要翻译：差分电压信号（LVDS）驱动电路和/或电流模式逻辑（CML）驱动电路。电路包括两个电流开关，每个开关耦合到相应的输入节点。以互补的方式，当跨输入节点施加差分信号时，一个电流开关断开，而另一个电流开关闭合，反之亦然。当前分配组件在两个输入电流开关之间分配电流，使得当第一电流开关闭合并且第二电流开关断开时，增加的电流通过第一电流开关分配，并且当前分配组件和第一个电流开关，反之亦然。该电路包括增强差分输出传输边缘的互补预加重和/或电流辅助预加重机制。

28. 发明授权

US07113760B1 Direct conversion receiver for amplitude modulated signals using linear/log filtering 有权
标题翻译：使用线性/对数滤波的幅度调制信号的直接转换接收机
公开(公告)号：US07113760B1
公开(公告)日：2006-09-26
申请号：US10426383
申请日：2003-04-29
申请人： Andrei R. Petrov , Shane A. Blanchard
发明人： Andrei R. Petrov , Shane A. Blanchard
IPC分类号： H04B1/26
CPC分类号： H03D1/2245 , H04B1/30
摘要： A receiver circuit that includes a direct conversion receiver that receives a modulated signal, and generates an in-phase differential signal and a quadrature-phase differential signal. The receiver circuit includes an in-phase branch that processes the in-phase differential signal, and a quadrature-phase branch that processes the quadrature-phase differential signal. Each branch includes an amplifier and a summer. The amplifier is configured to receive and amplify the respective in-phase or quadrature-phase differential signal. The summer receives the resulting amplified differential signal and sums the signals to generate a single signal. A log amplifier receives the summed in-phase and quadrature-phase signal, and generates an RSSI signal that is proportional to the log of the difference between the two summed signals. The data may then be extracted based on the amplitude of the RSSI signal.
摘要翻译：一种接收机电路，包括接收调制信号的直接转换接收机，并产生同相差分信号和正交相位差分信号。接收器电路包括处理同相差分信号的同相分支和处理正交相差分信号的正交相分支。每个分支包括一个放大器和一个夏天。放大器被配置为接收和放大相应的同相或正交相差分信号。夏天接收所得到的放大的差分信号，并且对信号求和以产生单个信号。对数放大器接收相加和相位相加的信号，并产生与两个求和信号之差的对数成正比的RSSI信号。然后可以基于RSSI信号的幅度来提取数据。

29. 发明授权

US07102188B1 High reliability electrically erasable and programmable read-only memory (EEPROM) 有权
标题翻译：高可靠性电可擦除和可编程只读存储器（EEPROM）
公开(公告)号：US07102188B1
公开(公告)日：2006-09-05
申请号：US11098940
申请日：2005-04-05
申请人： Thierry Coffi Hervé Yao , Greg Scott , Pierre André Claude Gassot , Philip John Cacharelis
发明人： Thierry Coffi Hervé Yao , Greg Scott , Pierre André Claude Gassot , Philip John Cacharelis
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： G11C16/0433 , H01L27/11558 , H01L29/66825 , H01L29/7883
摘要： An EEPROM cell that combines a FET transistor and a capacitor. The transistor has a well that is shared by potentially all of the EEPROM cells in the array thereby reducing size. A gate terminal is formed over the well. Source and drain terminals are formed in the well. The well is isolated from the gate terminal using a dielectric layer. A first terminal of the capacitor is connected to the gate terminal using a dielectric layer. A first terminal of the capacitor is connected to the gate terminal, and may be oppositely doped from the gate terminal to improve retention. The second terminal is formed by a second well that is underneath the first terminal and isolated from the first terminal. The capacitance may be increased without area increase by forming a metal layer over the first terminal and separated from the first terminal by a thick dielectric layer, and connected to the second well via a conductive via.
摘要翻译：组合FET晶体管和电容器的EEPROM单元。晶体管具有由阵列中潜在的所有EEPROM单元共享的阱，从而减小尺寸。在井上形成栅极端子。源极和漏极端子形成在阱中。使用电介质层将阱与栅极端子隔离。电容器的第一端子使用电介质层连接到栅极端子。电容器的第一端子连接到栅极端子，并且可以与栅极端子相反地掺杂以改善保持。第二端子由位于第一端子下方并与第一端子隔离的第二阱形成。可以通过在第一端子上形成金属层并且通过厚的电介质层与第一端子分离，并且经由导电通孔连接到第二阱，可以增加电容量而不增加面积。

30. 发明授权

US07006809B2 Adaptive diversity receiver architecture 有权
标题翻译：自适应分集接收机架构
公开(公告)号：US07006809B2
公开(公告)日：2006-02-28
申请号：US10430455
申请日：2003-05-06
申请人： Andrei R. Petrov , Craig L. Christensen
发明人： Andrei R. Petrov , Craig L. Christensen
IPC分类号： H04B1/06
CPC分类号： H04B7/0874 , H04B7/0817 , H04B7/084 , H04B7/0871
摘要： A diversity receiver circuit that adaptively selects a variable number of one or more antennas for use in improving signal quality. Each antenna is provided its own receiver that each generates a representation of a received signal. This adaptive selection offers high dynamic adaptability in using the appropriate antennas and receivers at the appropriate time to thereby improving signal-to-noise ratio. The receivers may be direct conversion receivers that implement up-conversion of the baseband signal to reduce DC offset and 1/f noise characteristic of direct conversion architectures.
摘要翻译：一种分集接收机电路，其自适应地选择可变数量的一个或多个天线以用于改善信号质量。为每个天线提供其自己的接收机，每个接收机产生接收信号的表示。这种自适应选择在适当的时间提供了使用适当的天线和接收机的高动态适应性，从而提高了信噪比。接收机可以是实现基带信号的上转换以减少DC偏移和直接转换架构的1 / f噪声特性的直接转换接收器。

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