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    • 23. 发明申请
    • POWER SUPPLY CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME
    • 电源电路和包括其的显示装置
    • US20100245327A1
    • 2010-09-30
    • US12733813
    • 2008-07-24
    • Sachio TsujinoShuji NishiYuhichiroh MurakamiYasushi SasakiSeijirou Gyouten
    • Sachio TsujinoShuji NishiYuhichiroh MurakamiYasushi SasakiSeijirou Gyouten
    • G09G5/00G05F3/02
    • H02M3/073
    • An object of the present invention is to provide a power supply circuit including a charge-pumping booster section which uses switching elements provided only by N-channel transistors yet does not have a problem of voltage drop by threshold value. In a booster section (11a), capacitors (C1) and (C2) have their respective first terminals connected with transistors (Q1, Q3) and (Q2, Q4) respectively. Each transistor has its gate terminal supplied with control signals generated in a driver section (11b). The driver section (11b) includes capacitors (C3, C4) connected with input terminals (Ti3, Ti4) for respective supply of clock signals DCK2, DCK2B each having a voltage alternating between −VDD and VDD (VDD represents an input supply voltage from outside), as level-shifted signals of clock signals DCK1, DCK1B which are supplied to second terminals of the capacitors (C1, C2) respectively. In this arrangement, the driver section 11b generates signals each having a voltage alternating between VDD and 3VDD, as the control signals.
    • 本发明的目的是提供一种电源电路,其包括使用仅由N沟道晶体管提供的开关元件的电荷泵浦升压器部分,但不具有通过阈值的电压降的问题。 在升压部(11a)中,电容器(C1)和(C2)分别具有与晶体管(Q1,Q3)和(Q2,Q4)相连的各自的第一端子。 每个晶体管的栅极端子提供有在驱动器部分(11b)中产生的控制信号。 驱动器部分(11b)包括与输入端子(Ti3,Ti4)连接的电容器(C3,C4),用于各自提供时钟信号DCK2,DCK2B,每个时钟信号具有在-VDD和VDD之间交替的电压(VDD表示来自外部的输入电源电压 )作为分别提供给电容器(C1,C2)的第二端子的时钟信号DCK1,DCK1B的电平移位信号。 在这种布置中,驱动器部分11b产生各自具有在VDD和3VDD之间交替的电压的信号作为控制信号。
    • 26. 发明授权
    • Power supply circuit and display device including the same
    • 电源电路和显示装置包括它们
    • US08665255B2
    • 2014-03-04
    • US12733813
    • 2008-07-24
    • Sachio TsujinoShuji NishiYuhichiroh MurakamiYasushi SasakiSeijirou Gyouten
    • Sachio TsujinoShuji NishiYuhichiroh MurakamiYasushi SasakiSeijirou Gyouten
    • G09G5/00
    • H02M3/073
    • An object of the present invention is to provide a power supply circuit including a charge-pumping booster section which uses switching elements provided only by N-channel transistors yet does not have a problem of voltage drop by threshold value. In a booster section (11a), capacitors (C1) and (C2) have their respective first terminals connected with transistors (Q1, Q3) and (Q2, Q4) respectively. Each transistor has its gate terminal supplied with control signals generated in a driver section (11b). The driver section (11b) includes capacitors (C3, C4) connected with input terminals (Ti3, Ti4) for respective supply of clock signals DCK2, DCK2B each having a voltage alternating between −VDD and VDD (VDD represents an input supply voltage from outside), as level-shifted signals of clock signals DCK1, DCK1B which are supplied to second terminals of the capacitors (C1, C2) respectively. In this arrangement, the driver section 11b generates signals each having a voltage alternating between VDD and 3VDD, as the control signals.
    • 本发明的目的是提供一种电源电路,其包括使用仅由N沟道晶体管提供的开关元件的电荷泵浦升压器部分,但不具有通过阈值的电压降的问题。 在升压部(11a)中,电容器(C1)和(C2)分别具有与晶体管(Q1,Q3)和(Q2,Q4)相连的各自的第一端子。 每个晶体管的栅极端子提供有在驱动器部分(11b)中产生的控制信号。 驱动器部分(11b)包括与输入端子(Ti3,Ti4)连接的电容器(C3,C4),用于各自提供时钟信号DCK2,DCK2B各自具有在-VDD和VDD之间交替的电压(VDD表示来自外部的输入电源电压 )作为分别提供给电容器(C1,C2)的第二端子的时钟信号DCK1,DCK1B的电平移位信号。 在这种布置中,驱动器部分11b产生各自具有在VDD和3VDD之间交替的电压的信号作为控制信号。
    • 27. 发明授权
    • Power supply circuit and display device including the same
    • 电源电路和显示装置包括它们
    • US08314648B2
    • 2012-11-20
    • US12734394
    • 2008-09-01
    • Shuji NishiSachio TsujinoYuhichiroh MurakamiYasushi SasakiSeijirou Gyouten
    • Shuji NishiSachio TsujinoYuhichiroh MurakamiYasushi SasakiSeijirou Gyouten
    • G05F1/10
    • H02M3/073H02M2003/077
    • An embodiment of the present invention provides a power supply circuit including a charge-pumping booster section which uses switching elements provided only by N-channel transistors yet does not have a problem of voltage drop by threshold value. When a boosted voltage is obtained at a first terminal of a first capacitor in a booster section, a booster control section supplies this boosted voltage to a third capacitor, to boost the voltage further thereby turning ON a first transistor. When a boosted voltage is obtained at a first terminal of a second capacitor in the booster section, the booster control section supplies this boosted voltage to a fourth capacitor, to boost the voltage further thereby turning ON a second transistor. This arrangement eliminates a problem of voltage drop by threshold value in the first and the second transistors which serve as output-side switching elements.
    • 本发明的一个实施例提供一种电源电路,其包括使用仅由N沟道晶体管提供的开关元件的电荷泵浦升压器部分,但不具有通过阈值的电压降的问题。 当在升压部中的第一电容器的第一端获得升压电压时,升压控制部将该升压电压提供给第三电容器,进一步升高电压,从而导通第一晶体管。 当在升压部中的第二电容器的第一端获得升压电压时,升压控制部将该升压电压提供给第四电容器,进一步升压电压,从而导通第二晶体管。 这种布置消除了用作输出侧开关元件的第一和第二晶体管中的阈值电压下降的问题。