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21. 发明授权

US09918970B2 Pharmaceutical composition comprising solifenacin 有权
公开(公告)号：US09918970B2
公开(公告)日：2018-03-20
申请号：US13110295
申请日：2011-05-18
申请人： Tatsunobu Yoshioka , Makoto Murai , Hiroaki Tasaki
发明人： Tatsunobu Yoshioka , Makoto Murai , Hiroaki Tasaki
IPC分类号： A61K31/435 , A61K47/32 , A61K31/439 , A61K47/48
CPC分类号： A61K31/439 , A61K47/32 , A61K47/58 , A61K47/585
摘要： Disclosed is a pharmaceutical composition comprising a complex between solifenacin or a pharmaceutically acceptable salt thereof and an ion exchange resin, and an acrylic based polymer.

22. 发明授权

US07538867B2 Mura defect inspection mask, apparatus and method of inspecting the mura defect, and method of producing a photomask 失效
标题翻译： Mura缺陷检查掩模，检查mura缺陷的装置和方法以及制造光掩模的方法
公开(公告)号：US07538867B2
公开(公告)日：2009-05-26
申请号：US11139970
申请日：2005-05-31
申请人： Makoto Murai
发明人： Makoto Murai
IPC分类号： G01N21/00
CPC分类号： G01N21/956
摘要： Plural repetitive patterns 61 are formed on a transparent substrate 62 in the unit of a chip 65. Each of the repetitive patterns has plural pseudo mura defects 66 to which intensities of mura defects occurring in a predetermined repetitive pattern are allocated with being stepwise changed, for respective kinds of the mura defects.The mura defects are a CD Mura based on an abnormality in critical dimension of unit patterns 63 in the repetitive patterns, a Pitch Mura based on an abnormality in interval of the repetitive patterns, a Butting Mura based on a positional displacement of the repetitive patterns, and a Defect mura based on a pattern defect of unit patterns in the repetitive patterns.
摘要翻译：多个重复图案61以芯片65为单位形成在透明基板62上。每个重复图案具有多个伪色调缺陷66，以预定的重复图案分配发生的mura缺陷的强度逐步改变，为各种mura缺陷。基于重复图案中的单元图案63的临界尺寸的异常，基于重复图案的间隔异常的间隔Mura，基于重复图案的位置偏移的对接Mura，基于Mura缺陷，和基于重复模式中单位模式的模式缺陷的缺陷缺陷。

23. 发明申请

US20070199733A1 CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：电路板及其制造方法
公开(公告)号：US20070199733A1
公开(公告)日：2007-08-30
申请号：US11678321
申请日：2007-02-23
申请人： Makoto Murai , Ryosuke Usui
发明人： Makoto Murai , Ryosuke Usui
IPC分类号： H05K1/00
CPC分类号： H05K3/0032 , H05K1/0366 , H05K3/0035 , H05K3/421 , H05K2201/029 , H05K2203/065 , Y10T29/49155 , Y10T29/49204
摘要： Provided is a circuit board which suppresses abnormal formation of plated layer inside a via, caused by core materials of glass fibers or the like projected from a side wall of the via and which helps to improve the connection reliability of the via. An insulating layer, which is formed of thermoset resin and embedded with glass fibers, is provided between a first wiring layer and a second wiring layer. The glass fibers projected into a via hole side from a side wall of the via hole in different positions are embedded into a via conductor in such a state that the glass fibers are jointed with each other.
摘要翻译：提供一种电路板，其抑制由通孔的侧壁突出的玻璃纤维等的芯材引起的通孔内的镀层的异常形成，有助于提高通孔的连接可靠性。在第一布线层和第二布线层之间设置由热固性树脂形成并嵌入玻璃纤维的绝缘层。玻璃纤维在玻璃纤维彼此接合的状态下嵌入到通孔导体中，从通孔的侧壁在不同位置投影到通孔侧的玻璃纤维。

24. 发明申请

US20070164766A1 Circuit device 失效
标题翻译：电路设备
公开(公告)号：US20070164766A1
公开(公告)日：2007-07-19
申请号：US11526875
申请日：2006-09-26
申请人： Makoto Murai , Ryosuke Usui , Yasuhiro Kohara
发明人： Makoto Murai , Ryosuke Usui , Yasuhiro Kohara
IPC分类号： G01R31/02
CPC分类号： H05K1/0206 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01019 , H01L2924/01078 , H01L2924/14 , H01L2924/19105 , H05K1/056 , H05K3/0052 , H05K3/0061 , H05K3/383 , H05K3/385 , H05K3/4652 , H05K2201/068 , H05K2201/09054 , H05K2201/2072 , H05K2203/0315 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A circuit device having superior mechanical strength at the interface between a circuit board and heat sink and superior efficiency for radiating heat from a circuit element to the heat sink through the circuit board. The circuit device includes the metal-based insulation board for installing the circuit element, and the heat sink, over which the insulation board is installed with a paste arranged therebetween. The insulation board has a projection arranged on the surface facing the heat sink along a peripheral portion. At least part of the projection contacts the heat sink through the paste layer.
摘要翻译：电路装置在电路板和散热器之间的界面处具有优良的机械强度，并且具有优异的效率，用于通过电路板从电路元件散热至散热片。电路装置包括用于安装电路元件的金属基绝缘板和安装有绝缘板的绝热板的散热器。绝缘板具有沿着周边部分布置在面向散热器的表面上的突起。突起的至少一部分通过膏层与散热片接触。

25. 发明申请

US20060193108A1 Circuit device and manufacturing method thereof 审中-公开
标题翻译：电路装置及其制造方法
公开(公告)号：US20060193108A1
公开(公告)日：2006-08-31
申请号：US11359429
申请日：2006-02-23
申请人： Ryosuke Usui , Hideki Mizuhara , Yasunori Inoue , Makoto Murai
发明人： Ryosuke Usui , Hideki Mizuhara , Yasunori Inoue , Makoto Murai
IPC分类号： H02B1/00
CPC分类号： H01L23/5389 , H01L21/6835 , H01L21/6836 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/82 , H01L24/83 , H01L25/0652 , H01L25/16 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/12105 , H01L2224/16 , H01L2224/16235 , H01L2224/24145 , H01L2224/24195 , H01L2224/274 , H01L2224/2919 , H01L2224/29399 , H01L2224/32145 , H01L2224/73267 , H01L2224/83191 , H01L2224/83192 , H01L2224/838 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10158 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H05K1/185 , H05K3/323 , H05K3/4652 , H05K2201/10515 , H01L2924/00
摘要： A thin circuit device that can operate at a high speed is provided. The circuit device includes a first circuit element and a circuit element portion formed on a substrate. The first circuit element and the circuit element portion are arranged in such a manner that element surfaces thereof are opposed to each other. A terminal formed on the element surface of the first circuit element and a terminal formed on the element surface of the circuit element portion are electrically connected to each other via conductive particles in a binder forming an anisotropic conductive film and a via. The anisotropic conductive film and a third insulating resin film are bonded by thermocompression bonding in the same step, thereby simplifying manufacturing steps of the circuit device.
摘要翻译：提供可以高速运行的薄电路器件。电路装置包括第一电路元件和形成在基板上的电路元件部分。第一电路元件和电路元件部分以其元件表面彼此相对的方式布置。形成在第一电路元件的元件表面上的端子和形成在电路元件部分的元件表面上的端子通过形成各向异性导电膜和通孔的粘合剂中的导电颗粒彼此电连接。各向异性导电膜和第三绝缘树脂膜在同一步骤中通过热压接合，从而简化了电路器件的制造步骤。

26. 发明授权

US06479174B1 Silicon carbide body 失效
标题翻译：碳化硅体
公开(公告)号：US06479174B1
公开(公告)日：2002-11-12
申请号：US09543931
申请日：2000-04-06
申请人： Hirotake Yamada , Makoto Murai , Hiroshi Furukubo , Tsuneaki Ohashi
发明人： Hirotake Yamada , Makoto Murai , Hiroshi Furukubo , Tsuneaki Ohashi
IPC分类号： C25D32100
CPC分类号： C04B41/009 , C04B35/565 , C04B41/5059 , C04B41/87 , C04B2111/92 , C23C16/325 , Y10T428/25 , Y10T428/26 , Y10T428/30 , C04B41/4531 , C04B35/522
摘要： A silicon carbide body includes polycrystals of silicon carbide, and has a purity of silicon carbide of not less than 99.9999 wt %, a relative density of not less than 99% and a ratio of silicon of not less than 70.12 wt %.
摘要翻译：碳化硅体包括碳化硅的多晶体，并且具有不小于99.9999重量％的碳化硅的纯度，相对密度不小于99％，硅的比例不小于70.12重量％。

27. 发明授权

US5239679A Radio telecommunication apparatus capable of storing received messages and erasing the messages at programmable intervals 失效
标题翻译：能够存储接收到的消息并以可编程间隔擦除消息的无线电通信设备
公开(公告)号：US5239679A
公开(公告)日：1993-08-24
申请号：US606157
申请日：1990-10-31
申请人： Makoto Murai
发明人： Makoto Murai
IPC分类号： H04Q7/16 , G08B3/10 , G08B5/22 , H04B1/16 , H04B1/40
CPC分类号： G08B3/105 , G08B5/229 , H04B1/16 , H04B1/401
摘要： A radio telecommunication apparatus comprising a memory circuit for storing a message received, a timer circuit, an input section, and a message-erasing circuit. The input section is operated to set a timing of erasing the message stored in the memory circuit. When the time measured by the timer circuit becomes identical to the message-erasing timing set by operating the input section, the message-erasing circuit automatically erases the message stored in said memory circuit.
摘要翻译：一种无线电通信设备，包括用于存储所接收的消息的存储电路，定时器电路，输入部分和消息消除电路。操作输入部分来设置擦除存储在存储器电路中的消息的定时。当由定时器电路测量的时间与通过操作输入部分设置的消息消除时序相同时，消息消除电路自动擦除存储在所述存储器电路中的消息。

28. 发明授权

US07822302B2 Circuit board and method for manufacturing the same 失效
标题翻译：电路板及其制造方法
公开(公告)号：US07822302B2
公开(公告)日：2010-10-26
申请号：US12578952
申请日：2009-10-14
申请人： Makoto Murai , Ryosuke Usui
发明人： Makoto Murai , Ryosuke Usui
IPC分类号： G02B6/12 , H01L23/48 , H01L23/52 , H01L29/40 , H05K1/00 , H05K1/18 , H05K7/00 , H01R9/00
CPC分类号： H05K3/0032 , H05K1/0366 , H05K3/0035 , H05K3/421 , H05K2201/029 , H05K2203/065 , Y10T29/49155 , Y10T29/49204
摘要： Provided is a circuit board which suppresses abnormal formation of plated layer inside a via, caused by core materials of glass fibers or the like projected from a side wall of the via and which helps to improve the connection reliability of the via. An insulating layer, which is formed of thermoset resin and embedded with glass fibers, is provided between a first wiring layer and a second wiring layer. The glass fibers projected into a via hole side from a side wall of the via hole in different positions are embedded into a via conductor in such a state that the glass fibers are jointed with each other.
摘要翻译：提供一种电路板，其抑制由通孔的侧壁突出的玻璃纤维等的芯材引起的通孔内的镀层的异常形成，有助于提高通孔的连接可靠性。在第一布线层和第二布线层之间设置由热固性树脂形成并嵌入玻璃纤维的绝缘层。玻璃纤维在玻璃纤维彼此接合的状态下嵌入到通孔导体中，从通孔的侧壁在不同位置投影到通孔侧的玻璃纤维。

29. 发明授权

US07796845B2 Circuit board and method for manufacturing the same 失效
公开(公告)号：US07796845B2
公开(公告)日：2010-09-14
申请号：US11678321
申请日：2007-02-23
申请人： Makoto Murai , Ryosuke Usui
发明人： Makoto Murai , Ryosuke Usui
IPC分类号： G02B6/12 , H01L23/52 , H01L23/40 , H01L23/48 , H05K1/18 , H05K1/00 , H01R12/04 , H01L21/4763
CPC分类号： H05K3/0032 , H05K1/0366 , H05K3/0035 , H05K3/421 , H05K2201/029 , H05K2203/065 , Y10T29/49155 , Y10T29/49204
摘要： Provided is a circuit board which suppresses abnormal formation of plated layer inside a via, caused by core materials of glass fibers or the like projected from a side wall of the via and which helps to improve the connection reliability of the via. An insulating layer, which is formed of thermoset resin and embedded with glass fibers, is provided between a first wiring layer and a second wiring layer. The glass fibers projected into a via hole side from a side wall of the via hole in different positions are embedded into a via conductor in such a state that the glass fibers are jointed with each other.

30. 发明申请

US20100088887A1 CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：电路板及其制造方法
公开(公告)号：US20100088887A1
公开(公告)日：2010-04-15
申请号：US12578952
申请日：2009-10-14
申请人： Makoto Murai , Ryosuke Usui
发明人： Makoto Murai , Ryosuke Usui
IPC分类号： H05K3/10
CPC分类号： H05K3/0032 , H05K1/0366 , H05K3/0035 , H05K3/421 , H05K2201/029 , H05K2203/065 , Y10T29/49155 , Y10T29/49204
摘要： Provided is a circuit board which suppresses abnormal formation of plated layer inside a via, caused by core materials of glass fibers or the like projected from a side wall of the via and which helps to improve the connection reliability of the via. An insulating layer, which is formed of thermoset resin and embedded with glass fibers, is provided between a first wiring layer and a second wiring layer. The glass fibers projected into a via hole side from a side wall of the via hole in different positions are embedded into a via conductor in such a state that the glass fibers are jointed with each other.
摘要翻译：提供一种电路板，其抑制由通孔的侧壁突出的玻璃纤维等的芯材引起的通孔内的镀层的异常形成，有助于提高通孔的连接可靠性。在第一布线层和第二布线层之间设置由热固性树脂形成并嵌入玻璃纤维的绝缘层。玻璃纤维在玻璃纤维彼此接合的状态下嵌入到通孔导体中，从通孔的侧壁在不同位置投影到通孔侧的玻璃纤维。

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