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    • 22. 发明授权
    • Multi-quantum well infrared photo-detector
    • 多量子阱红外光电探测器
    • US06504222B1
    • 2003-01-07
    • US09473156
    • 1999-12-28
    • Yoshihiro MiyamotoHironori NishinoYusuke MatsukuraToshio Fujii
    • Yoshihiro MiyamotoHironori NishinoYusuke MatsukuraToshio Fujii
    • H01L3100
    • B82Y20/00H01L31/035236H01L31/101
    • A multi-quantum well infrared photo-detector, in which a plurality of multi-quantum well layers having respective sensitivities for different wavelength ranges of infrared are layered via a common contact layer. The infrared photo-detector includes a switch where one end is connected to the above common contact layer, and a current integration unit which is connected to the other end of the above switch. First and second voltages are applied to first and second contact layers at the opposite side of first and second multi-quantum well layer respectively. The above switch is conducted for a predetermined time so that either voltage between the above common contact layer and the first contact layer or voltage between the above common contact layer and the second contact layer becomes higher than the other, and the above current integration unit is charged or discharged by the current which flows in the above multi-quantum well layers.
    • 一种多量子阱红外光电检测器,其中通过公共接触层层叠具有用于红外线的不同波长范围的各自灵敏度的多个多量子阱层。 红外光检测器包括一端连接到上述公共接触层的开关,以及连接到上述开关的另一端的电流积分单元。 第一和第二电压分别施加到第一和第二多量子阱层的相反侧的第一和第二接触层。 上述开关进行预定时间,使得上述公共接触层和第一接触层之间的电压或上述公共接触层和第二接触层之间的电压变得高于另一个,并且上述电流积分单元是 由在上述多量子阱层中流动的电流充电或放电。
    • 24. 发明授权
    • Analog to digital converter using remainder feedback loop
    • 使用余数反馈回路的模数转换器
    • US06333709B2
    • 2001-12-25
    • US09741197
    • 2000-12-21
    • Yoshihiro Miyamoto
    • Yoshihiro Miyamoto
    • H03M112
    • G06F7/5013G06F2207/482H03K19/0813H03K19/23H03M1/129H03M1/144H03M1/145H03M1/403H03M1/42H03M1/46H03M1/60H03M1/667H03M1/68
    • According to the present invention, various logic circuits, AD converters, DA converters and counter circuits can be constituted with a small number of transistors by employing a capacitive coupling circuit. An analog/digital converter comprises: an input terminal, for which analog input is provided; an output terminal of N (N is a plural number) bits, for which binary output is provided; and N unit circuits arranged in parallel, each including an input capacitor having one electrode connected to the input terminal, a first inverter connected to the other electrode of the input capacitor, and a second inverter connected to the first inverter, wherein outputs of the second inverters of the unit circuits are respectively provided for the output terminals, wherein inverted outputs of the outputs for the unit circuits are fed back via feedback capacitors to respective input terminals of the first inverters of the unit circuits corresponding to lower bits, and wherein a capacitance of the feedback capacitor, which corresponds to the inverted output of the M-th (M is an integer) unit circuit from the most significant bit, is ½M times a capacitance of the input capacitor of the unit circuit that is fed back.
    • 根据本发明,通过采用电容耦合电路,各种逻辑电路,AD转换器,DA转换器和计数器电路可以由少量晶体管构成。 一种模拟/数字转换器,包括:输入端,为其提供模拟输入; N(N是多个)位的输出端,提供二进制输出; 和N个单位电路,每个均包括一个输入电容器,该输入电容器具有连接到输入端子的一个电极,连接到输入电容器的另一个电极的第一反相器和连接到第一反相器的第二反相器,其中第二个 单元电路的逆变器分别设置用于输出端子,其中用于单位电路的输出的反相输出通过反馈电容器反馈到对应于低位的单元电路的第一反相器的相应输入端子,并且其中电容 对应于来自最高有效位的第M(M为整数)单位电路的反相输出的反馈电容是反馈的单位电路的输入电容器的电容的1/2倍。
    • 25. 发明授权
    • Logic circuit utilizing capacitive coupling, an AD converter and a DA
converter
    • 使用电容耦合的逻辑电路,AD转换器和DA转换器
    • US6043675A
    • 2000-03-28
    • US888900
    • 1997-07-07
    • Yoshihiro Miyamoto
    • Yoshihiro Miyamoto
    • H03M1/44G06F7/50H03K5/08H03K19/08H03K19/23H03M1/12H03M1/14H03M1/40H03M1/42H03M1/46H03M1/60H03M1/66H03M1/68H03M1/74H03K19/20
    • G06F7/5013H03K19/0813H03K19/23H03M1/129H03M1/144H03M1/145H03M1/403H03M1/42H03M1/46H03M1/60H03M1/667H03M1/68G06F2207/482
    • According to the present invention, various logic circuits, AD converters, DA converters and counter circuits can be constituted with a small number of transistors by employing a capacitive coupling circuit. An analog/digital converter comprises: an input terminal, for which analog input is provided; an output terminal of N (N is a plural number) bits, for which binary output is provided; and N unit circuits arranged in parallel, each including an input capacitor having one electrode connected to the input terminal, a first inverter connected to the other electrode of the input capacitor, and a second inverter connected to the first inverter, wherein outputs of the second inverters of the unit circuits are respectively provided for the output terminals, wherein inverted outputs of the outputs for the unit circuits are fed back via feedback capacitors to respective input terminals of the first inverters of the unit circuits corresponding to lower bits, and wherein a capacitance of the feedback capacitor, which corresponds to the inverted output of the M-th (M is an integer) unit circuit from the most significant bit, is 1/2.sup.M times a capacitance of the input capacitor of the unit circuit that is fed back.
    • 根据本发明,通过采用电容耦合电路,各种逻辑电路,AD转换器,DA转换器和计数器电路可以由少量晶体管构成。 一种模拟/数字转换器,包括:输入端,为其提供模拟输入; N(N是多个)位的输出端,提供二进制输出; 和N个单位电路,每个均包括一个输入电容器,该输入电容器具有连接到输入端子的一个电极,连接到输入电容器的另一个电极的第一反相器和连接到第一反相器的第二反相器,其中第二个 单元电路的逆变器分别设置用于输出端子,其中用于单位电路的输出的反相输出通过反馈电容器反馈到对应于低位的单元电路的第一反相器的相应输入端子,并且其中电容 对应于来自最高有效位的第M(M为整数)单位电路的反相输出的反馈电容为+ E,fra 1/2 + EE M倍, 反馈的单元电路。