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21. 发明申请

US20140035549A1 MULTI-STANDARD, AUTOMATIC IMPEDANCE CONTROLLED DRIVER WITH SUPPLY REGULATION 有权
标题翻译：多标准，自动阻抗控制驱动器供电调节
公开(公告)号：US20140035549A1
公开(公告)日：2014-02-06
申请号：US13564150
申请日：2012-08-01
申请人： Madjid Hafizi , Jie Xu , Xiaohua Kong , Nam V. Dang
发明人： Madjid Hafizi , Jie Xu , Xiaohua Kong , Nam V. Dang
IPC分类号： G05F3/08
CPC分类号： G05F3/08 , H03F2200/03 , H04L25/0278 , H04L25/028
摘要： A pre-driver circuit generates a driver bias signal based on a swing command, a driver impedance characteristic, and an input signal. A driver receives the driver bias signal and generates, in response, a driver signal having a swing and having an output impedance corresponding to the bias signal. Optionally, the driver receives power from a switchable one of multiple supply rails, according to the swing. Optionally, the driver has voltage controlled resistor elements and the driver bias signal is generated based on the swing command and a replica of the driver voltage controlled resistor elements.
摘要翻译：预驱动器电路基于摆动指令，驱动器阻抗特性和输入信号产生驱动器偏置信号。驱动器接收驱动器偏置信号，并作为响应产生具有摆幅并具有对应于偏置信号的输出阻抗的驱动器信号。可选地，根据摆动，驾驶员从多个供应轨道中的可切换的一个接收功率。可选地，驱动器具有电压控制的电阻元件，并且基于摆动命令和驱动器电压控制的电阻器元件的副本产生驱动器偏置信号。

22. 发明授权

US08618832B2 Balanced single-ended impedance control 有权
标题翻译：平衡单端阻抗控制
公开(公告)号：US08618832B2
公开(公告)日：2013-12-31
申请号：US13197128
申请日：2011-08-03
申请人： Miao Li , Nam V. Dang , Xiaohua Kong
发明人： Miao Li , Nam V. Dang , Xiaohua Kong
IPC分类号： H03K19/003 , H03K19/0175
CPC分类号： H03K19/018557 , H04L25/0278
摘要： A balanced single-end impedance control system is disclosed. In a particular embodiment, the circuit includes a first transistor coupled to a first output terminal and a second transistor coupled to a second output terminal. The circuit also includes a third transistor and a fourth transistor, where device characteristics of the third transistor substantially match device characteristics of the first transistor and device characteristics of the fourth transistor substantially match device characteristics of the second transistor. The circuit further includes a first control path and a second control path. The first path is coupled to the third transistor and provides a first rail voltage to control a first gate control voltage of the first transistor. The second control path is coupled to the fourth transistor and provides a second rail voltage to control a second gate control voltage of the second transistor. The impedances of the first and second transistors may be controlled by the first gate control voltage and the second gate control voltage respectively.
摘要翻译：公开了一种平衡的单端阻抗控制系统。在特定实施例中，电路包括耦合到第一输出端的第一晶体管和耦合到第二输出端的第二晶体管。电路还包括第三晶体管和第四晶体管，其中第三晶体管的器件特性基本上与第一晶体管的器件特性匹配，并且第四晶体管的器件特性基本上与第二晶体管的器件特性相匹配。电路还包括第一控制路径和第二控制路径。第一路径耦合到第三晶体管，并提供第一轨电压以控制第一晶体管的第一栅控制电压。第二控制路径耦合到第四晶体管，并提供第二导轨电压以控制第二晶体管的第二栅极控制电压。第一和第二晶体管的阻抗可以分别由第一栅极控制电压和第二栅极控制电压控制。

23. 发明授权

US08581667B2 Tuning voltage range extension circuit and method 有权
标题翻译：调谐电压范围扩展电路及方法
公开(公告)号：US08581667B2
公开(公告)日：2013-11-12
申请号：US13294902
申请日：2011-11-11
申请人： Swarna L. Navubothu , Cheng Zhong , Nam V. Dang , Xiaohua Kong
发明人： Swarna L. Navubothu , Cheng Zhong , Nam V. Dang , Xiaohua Kong
IPC分类号： H03K3/03 , H03L7/10
CPC分类号： H03L7/0995 , H03K3/0315
摘要： A circuit includes a first path including a first transistor and a first current source. The first transistor is responsive to a tuning voltage. The circuit also includes a tuning voltage range extension circuit responsive to the tuning voltage. The tuning voltage range extension circuit is configured to selectively change current supplied by the first path as the tuning voltage exceeds a capacity threshold of the first transistor.
摘要翻译：电路包括包括第一晶体管和第一电流源的第一路径。第一晶体管响应调谐电压。电路还包括响应于调谐电压的调谐电压范围扩展电路。调谐电压范围扩展电路被配置为当调谐电压超过第一晶体管的容量阈值时选择性地改变由第一路径提供的电流。

24. 发明授权

US08581647B2 System and method of stabilizing charge pump node voltage levels 有权
标题翻译：稳定电荷泵节点电压电平的系统和方法
公开(公告)号：US08581647B2
公开(公告)日：2013-11-12
申请号：US13293731
申请日：2011-11-10
申请人： Cheng Zhong , Swarna L. Navubothu , Nam V. Dang , Xiaohua Kong
发明人： Cheng Zhong , Swarna L. Navubothu , Nam V. Dang , Xiaohua Kong
IPC分类号： H03L7/06
CPC分类号： H03L7/0893
摘要： A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.
摘要翻译：一种方法包括在耦合到电荷泵的第一电源的第一漏极节点的第一电路处跟踪调谐电压。该方法还包括在耦合到电荷泵的第二电源的第二漏极节点的第二电路处跟踪调谐电压。该方法还包括响应于调谐电压稳定第一漏极节点的第一电压和第二漏极节点的第二电压。

25. 发明申请

US20130120040A1 SYSTEM AND METHOD OF STABILIZING CHARGE PUMP NODE VOLTAGE LEVELS 有权
标题翻译：充电泵节电压水平稳定系统及方法
公开(公告)号：US20130120040A1
公开(公告)日：2013-05-16
申请号：US13293731
申请日：2011-11-10
申请人： Cheng Zhong , Swarna L. Navubothu , Nam V. Dang , Xiaohua Kong
发明人： Cheng Zhong , Swarna L. Navubothu , Nam V. Dang , Xiaohua Kong
IPC分类号： H03L7/06
CPC分类号： H03L7/0893
摘要： A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.
摘要翻译：一种方法包括在耦合到电荷泵的第一电源的第一漏极节点的第一电路处跟踪调谐电压。该方法还包括在耦合到电荷泵的第二电源的第二漏极节点的第二电路处跟踪调谐电压。该方法还包括响应于调谐电压稳定第一漏极节点的第一电压和第二漏极节点的第二电压。

26. 发明申请

US20130120020A1 ADAPTIVE OUTPUT SWING DRIVER 审中-公开
标题翻译：自适应输出开关驱动器
公开(公告)号：US20130120020A1
公开(公告)日：2013-05-16
申请号：US13294482
申请日：2011-11-11
申请人： Miao Li , Behnam Amelifard , Xiaohua Kong , Nam V. Dang
发明人： Miao Li , Behnam Amelifard , Xiaohua Kong , Nam V. Dang
IPC分类号： H03K19/003
CPC分类号： H03K19/018564 , H03K19/01855 , H04L25/0264
摘要： An adjustable gain line driver receives an input signal and a gain control signal and outputs a signal with a swing, and the swing is measured to generate a swing measurement signal. A target swing signal is generated having a target swing, and the target swing signal is measured to generate a target swing reference signal. The swing measurement signal is compared to the target swing reference control signal and a counter generating the gain control signal is incremented until the measurement signal meets the target swing reference signal. Optionally a reset signal resets the counter, and the gain control signal, at predetermined events.
摘要翻译：可调增益线驱动器接收输入信号和增益控制信号并输出具有摆幅的信号，并且测量摆动以产生摆动测量信号。产生具有目标摆动的目标摆动信号，并且测量目标摆动信号以产生目标摆动参考信号。将摆动测量信号与目标摆动参考控制信号进行比较，生成增益控制信号的计数器递增，直到测量信号满足目标摆动参考信号为止。可选地，复位信号在预定事件时复位计数器和增益控制信号。

27. 发明授权

US08890601B2 Method, system, and circuit with a driver output interface having a common mode connection coupled to a transistor bulk connection 有权
标题翻译：具有驱动器输出接口的方法，系统和电路具有耦合到晶体管体连接的共模连接
公开(公告)号：US08890601B2
公开(公告)日：2014-11-18
申请号：US13294928
申请日：2011-11-11
申请人： Miao Li , Xiaohua Kong , Nam V. Dang
发明人： Miao Li , Xiaohua Kong , Nam V. Dang
IPC分类号： H03B1/00 , H03F3/24 , H03F3/45 , H03F1/22 , H03F3/195
CPC分类号： H03F1/223 , H03F3/195 , H03F3/245 , H03F3/45085 , H03F3/45659 , H03F2203/45418 , H03F2203/45696 , H03F2203/45702 , H03F2203/45726
摘要： A multi-terminal output with a common mode connection includes an output having a first terminal and a second terminal and having a common mode connection between the first terminal and the second terminal. A bulk connection of a transistor is coupled to the common mode connection. A first set of control signals and a second set of control signals are generated. Each of the first set of control signals has a first rail voltage level associated with a first power domain. The second set of control signals is generated from the first set of control signals. Each of the second set of control signals has a second rail voltage level that is associated with a second power domain. The second power domain is associated with a common mode voltage of outputs of an output driver.
摘要翻译：具有共模连接的多端子输出包括具有第一端子和第二端子的输出端，并且在第一端子和第二端子之间具有共模连接。晶体管的体连接耦合到共模连接。产生第一组控制信号和第二组控制信号。第一组控制信号中的每一个具有与第一功率域相关联的第一导轨电压电平。第二组控制信号是从第一组控制信号产生的。第二组控制信号中的每一个具有与第二功率域相关联的第二轨电压电平。第二功率域与输出驱动器的输出的共模电压相关联。

28. 发明授权

US08674679B2 Power saving during a connection detection 有权
标题翻译：连接检测期间省电
公开(公告)号：US08674679B2
公开(公告)日：2014-03-18
申请号：US12575498
申请日：2009-10-08
申请人： Cheng Zhong , Nam V. Dang , Hung Q. Vuong , Xiaohua Kong
发明人： Cheng Zhong , Nam V. Dang , Hung Q. Vuong , Xiaohua Kong
IPC分类号： G01R19/00
CPC分类号： G06F1/3278 , G06F1/1632 , G06F1/266 , G06F1/3203 , G06F1/3206 , G06F1/3281 , G06F11/2289 , G06F11/3041 , G06F11/3048 , G06F11/3051 , G06F11/3089 , G06F13/4022 , G06F13/4081 , Y02D10/151 , Y10T307/76
摘要： Power saving for hot plug detect (HPD) is disclosed. In a particular embodiment, a method includes detecting, at a source device that is connectable to a sink device, a connection of the source device to the sink device via a connector. The source device includes a DC voltage source and the connection is detected without consuming power from the DC voltage source.
摘要翻译：公开了热插拔检测（HPD）的省电功能。在特定实施例中，一种方法包括在可连接到宿设备的源设备处经由连接器检测源设备到宿设备的连接。源装置包括直流电压源，并且在不消耗直流电压源的电力的情况下检测连接。

29. 发明申请

US20130187717A1 RECEIVER EQUALIZATION CIRCUIT 审中-公开
标题翻译：接收器均衡电路
公开(公告)号：US20130187717A1
公开(公告)日：2013-07-25
申请号：US13405468
申请日：2012-02-27
申请人： Glenn A. Murphy , Nam V. Dang , Tirdad Sowlati , Xiaohua Kong
发明人： Glenn A. Murphy , Nam V. Dang , Tirdad Sowlati , Xiaohua Kong
IPC分类号： H03F3/16
CPC分类号： H03F3/3022 , H03F1/483
摘要： A receiver equalization circuit includes a first output transistor having a gate coupled to an input signal. The receiver equalization circuit may also include a second output transistor having a drain coupled to a drain of the first output transistor. The receiver equalization circuit may also include a resistor coupled between a gate and a drain of the second output transistor to provide a direct current (DC) bias to the gate of the second output transistor. The receiver equalization circuit may further include a feed-through capacitor coupled between the gate of the second output transistor and an input signal source. The feed-through capacitor feeds the input signal to the gate of the second output transistor when a frequency of the input signal is above a predetermined threshold. The feed-through capacitor and the resistor define a signal gain amplification point.
摘要翻译：接收机均衡电路包括具有耦合到输入信号的栅极的第一输出晶体管。接收机均衡电路还可以包括具有耦合到第一输出晶体管的漏极的漏极的第二输出晶体管。接收机均衡电路还可以包括耦合在第二输出晶体管的栅极和漏极之间的电阻器，以向第二输出晶体管的栅极提供直流（DC）偏置。接收机均衡电路还可以包括耦合在第二输出晶体管的栅极和输入信号源之间的馈通电容器。当输入信号的频率高于预定阈值时，馈通电容器将输入信号馈送到第二输出晶体管的栅极。馈通电容和电阻定义了信号增益放大点。

30. 发明申请

US20130033287A1 Balanced Single-Ended Impedance Control 有权
标题翻译：平衡单端阻抗控制
公开(公告)号：US20130033287A1
公开(公告)日：2013-02-07
申请号：US13197128
申请日：2011-08-03
申请人： Miao Li , Nam V. Dang , Xiaohua Kong
发明人： Miao Li , Nam V. Dang , Xiaohua Kong
IPC分类号： H03K19/003 , G06F17/50
CPC分类号： H03K19/018557 , H04L25/0278
摘要： A balanced single-end impedance control system is disclosed. In a particular embodiment, the circuit includes a first transistor coupled to a first output terminal and a second transistor coupled to a second output terminal. The circuit also includes a third transistor and a fourth transistor, where device characteristics of the third transistor substantially match device characteristics of the first transistor and device characteristics of the fourth transistor substantially match device characteristics of the second transistor. The circuit further includes a first control path and a second control path. The first path is coupled to the third transistor and provides a first rail voltage to control a first gate control voltage of the first transistor. The second control path is coupled to the fourth transistor and provides a second rail voltage to control a second gate control voltage of the second transistor. The impedances of the first and second transistors may be controlled by the first gate control voltage and the second gate control voltage respectively.
摘要翻译：公开了一种平衡的单端阻抗控制系统。在特定实施例中，电路包括耦合到第一输出端的第一晶体管和耦合到第二输出端的第二晶体管。电路还包括第三晶体管和第四晶体管，其中第三晶体管的器件特性基本上与第一晶体管的器件特性匹配，并且第四晶体管的器件特性基本上与第二晶体管的器件特性相匹配。电路还包括第一控制路径和第二控制路径。第一路径耦合到第三晶体管，并提供第一轨电压以控制第一晶体管的第一栅控制电压。第二控制路径耦合到第四晶体管，并提供第二导轨电压以控制第二晶体管的第二栅极控制电压。第一和第二晶体管的阻抗可以分别由第一栅极控制电压和第二栅极控制电压控制。

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