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21. 发明申请

US20090055496A1 ADVANCED PROCESSOR WITH CREDIT BASED SCHEME FOR OPTIMAL PACKET FLOW IN A MULTI-PROCESSOR SYSTEM ON A CHIP 失效
标题翻译：具有信用流程的先进处理器，用于芯片上的多处理器系统中的最佳分组流
公开(公告)号：US20090055496A1
公开(公告)日：2009-02-26
申请号：US12261808
申请日：2008-10-30
申请人： Gaurav Garg , David T. Hass
发明人： Gaurav Garg , David T. Hass
IPC分类号： G06F15/16
CPC分类号： H04L47/10 , G06F12/0813 , H04L47/39
摘要： A system, method, and computer program product are provided for optimal packet flow in a multi-processor system on a chip. In operation, a credit is allocated for each of a plurality of agents coupled to a messaging network, the allocating including reserving one or more entries in a receive queue of at least one of the plurality of agents. Additionally, a first credit is decremented in response to a first agent sending a message to a second agent, the plurality of agents including the first and second agents. Furthermore, one of the first credit or a second credit is incremented in response to a signal from the second agent.
摘要翻译：提供了一种系统，方法和计算机程序产品，用于在芯片上的多处理器系统中实现最佳分组流。在操作中，为耦合到消息收发网络的多个代理中的每个代理分配信贷，分配包括在多个代理中的至少一个代理的接收队列中保留一个或多个条目。另外，响应于第一代理向第二代理发送消息而减少第一信用，所述多个代理包括第一和第二代理。此外，响应于来自第二代理的信号，第一信用或第二抵免额中的一个被递增。

22. 发明授权

US07046829B2 Fingerprint verification 有权
标题翻译：指纹验证
公开(公告)号：US07046829B2
公开(公告)日：2006-05-16
申请号：US09872423
申请日：2001-05-30
申请人： Raghavendra U Udupa , Gaurav Garg , Pramod Kumar Sharma
发明人： Raghavendra U Udupa , Gaurav Garg , Pramod Kumar Sharma
IPC分类号： G06K9/00
CPC分类号： G06K9/00087
摘要： Fingerprint verification matching a claimant fingerprint with one of a number of recorded enrollee fingerprints uses various adaptations of model alignment techniques involving affine transformation to provide an algorithm providing relatively fast and accurate verification suitable for realtime applications. These techniques involve sampling minutiae into subsets based on geometrical proximity to a particular index minutiae for each subset, eliminating minutiae which are near the fingerprint boundary, ordering the minutiae of each subset in a predetermined manner, classifying each subset in bins which discriminate on the properties of the subsets, checking transformations proposed as matches between fingerprints for consistency with each other, and checking the topological as well as the geometrical correspondence of potentially matching fingerprints. In a preferred form, a score indicative of the correlation between fingerprints is used to ultimately decide whether the fingerprints match.
摘要翻译：将索赔指纹与许多记录的登记指纹之一相匹配的指纹验证使用涉及仿射变换的模型对准技术的各种适应性来提供一种提供适合于实时应用的相对快速且准确的验证的算法。这些技术包括基于每个子集的特定索引细节的几何接近度将细节抽样到子集中，消除靠近指纹边界的细节，以预定方式对每个子集的细节进行排序，对每个子集进行分类，区分特征的子集，检查提取的指纹之间的匹配以便彼此一致，以及检查潜在匹配指纹的拓扑以及几何对应关系。在优选形式中，使用指示指纹之间的相关性的分数来最终确定指纹是否匹配。

23. 发明授权

US11521525B2 Method and system of mobile projection system for implementing vehicle window displays 有权
公开(公告)号：US11521525B2
公开(公告)日：2022-12-06
申请号：US17026309
申请日：2020-09-21
申请人： Gaurav Garg
发明人： Gaurav Garg
IPC分类号： G09F21/04 , G03B21/62 , G03B21/14 , G09F9/30 , B60R11/02 , B60J3/00 , B60R11/00
摘要： In one aspect, a method includes the step of A mobile projection system; the system comprising: a hermetically sealed base unit configured to be releasably attached to an automobile; a microprocessor configured to receive a plurality of projectable images from a remote server over a wireless network; and a remote server configured to store a plurality of selected images over a period of time; a projection means configured to project a selected image through a translucent lens.

24. 发明授权

US08949522B1 Performance of a stride-based prefetcher on an out-of-order processing unit (CPU) 有权
标题翻译：基于步幅的预取器在无序中央处理单元（CPU）上的性能
公开(公告)号：US08949522B1
公开(公告)日：2015-02-03
申请号：US13165736
申请日：2011-06-21
申请人： Gaurav Garg , David T. Hass
发明人： Gaurav Garg , David T. Hass
IPC分类号： G06F13/00
CPC分类号： G06F13/385
摘要： Systems, apparatusses, and methods are disclosed for improving performance of a stride-based prefetcher on an out-of-order central processing unit (CPU). The present disclosure teaches a processor system that employs out-of-order stride prefetch units. The out-of-order stride prefetch units are utilized for issuing prefetches for out-of-order stride access patterns. In one or more embodiments, the out-of-order stride prefetch units examine the offsets between past virtual address (VA) accesses and the directions of the past VA accesses in order to generate an estimate of the underlying VA access stride of the executed program code (PC). In at least one embodiment, the out-of-order stride prefetch units use the estimate of the VA access stride in order to generate a prediction of future VA accesses. In some embodiments, after the out-of-order stride prefetch units have generated the prediction of future VA accesses, the out-of-order stride prefetch units prefetch the predicted future VA accesses.
摘要翻译：公开了用于改善无序中央处理单元（CPU）上的基于步长的预取器的性能的系统，装置和方法。本公开教导了采用无序步长预取单元的处理器系统。无序步幅预取单元用于发出无序步进访问模式的预取。在一个或多个实施例中，无序步长预取单元检查过去虚拟地址（VA）访问与过去VA访问的方向之间的偏移量，以便生成执行程序的基本VA访问步幅的估计代码（PC）。在至少一个实施例中，无序步长预取单元使用VA访问步幅的估计，以便生成将来VA访问的预测。在一些实施例中，在无序步幅预取单元已经产生未来VA访问的预测之后，无序步幅预取单元预取预测的未来VA访问。

25. 发明授权

US08910296B2 Data privacy for smart services 有权
标题翻译：智能服务的数据隐私
公开(公告)号：US08910296B2
公开(公告)日：2014-12-09
申请号：US13286177
申请日：2011-10-31
申请人： Ammar Rayes , Subrata Dasgupta , Gaurav Garg , Mark Whitteker
发明人： Ammar Rayes , Subrata Dasgupta , Gaurav Garg , Mark Whitteker
IPC分类号： G06F21/00 , H04L12/26 , H04L29/06 , H04L12/24
CPC分类号： H04L63/0414 , H04L41/0213 , H04L41/28 , H04L43/04
摘要： Techniques are disclosed for hiding sensitive information from a provider of support services. In one embodiment, a first network device determines that network device information includes non-sensitive data and sensitive data. In response to the determining, the first network device generates mapping data that maps dummy information to the sensitive data. The first network device generates output data that comprises the non-sensitive data and the dummy data and sends the output data to a second network device. In other embodiments, the user may select the network parameters that are sensitive. The first network device may also receive first report data from the second network device that identifies a network problem and includes the dummy data and generate second report data by using the mapping data to replace the dummy information with the sensitive data.
摘要翻译：公开了隐藏来自支持服务提供商的敏感信息的技术。在一个实施例中，第一网络设备确定网络设备信息包括非敏感数据和敏感数据。响应于确定，第一网络设备生成将虚拟信息映射到敏感数据的映射数据。第一网络设备生成包括非敏感数据和伪数据的输出数据，并将输出数据发送到第二网络设备。在其他实施例中，用户可以选择敏感的网络参数。第一网络设备还可以从第二网络设备接收识别网络问题的第一报告数据，并且包括虚拟数据，并且通过使用映射数据生成第二报告数据以用敏感数据替换虚拟信息。

26. 发明授权

US08671220B1 Network-on-chip system, method, and computer program product for transmitting messages utilizing a centralized on-chip shared memory switch 有权
标题翻译：片上系统，方法和计算机程序产品，用于使用集中式片上共享存储器交换机传输消息
公开(公告)号：US08671220B1
公开(公告)日：2014-03-11
申请号：US12325050
申请日：2008-11-28
申请人： Gaurav Garg , David T. Hass , Kaushik Kuila , Gaurav Singh
发明人： Gaurav Garg , David T. Hass , Kaushik Kuila , Gaurav Singh
IPC分类号： G06F15/167 , G06F15/173
CPC分类号： H04L47/10 , H04L49/103 , H04L49/109
摘要： A network-on-chip system, method, and computer program product are provided for transmitting messages utilizing a centralized on-chip shared memory switch. In operation, a message is sent from one of a plurality of agents connected on a messaging network. The message is received at a central shared memory switch, the central shared memory switch being in communication with each of the plurality of agents. Further, the message is transmitted from the central shared memory switch to a destination agent, the destination agent being one of the plurality of agents.
摘要翻译：提供了片上系统，方法和计算机程序产品，用于使用集中的片上共享存储器交换机来发送消息。在操作中，从连接在消息收发网络上的多个代理之一发送消息。消息在中央共享存储交换机处被接收，中央共享存储器交换机与多个代理中的每一个进行通信。此外，消息从中央共享存储交换机发送到目的地代理，目的地代理是多个代理之一。

27. 发明授权

US08566533B1 System, method, and computer program product for conditionally sending a request for data to a node based on a determination 有权
标题翻译：用于基于确定有条件地向节点发送数据请求的系统，方法和计算机程序产品
公开(公告)号：US08566533B1
公开(公告)日：2013-10-22
申请号：US12571233
申请日：2009-09-30
申请人： Gaurav Garg , David T. Hass
发明人： Gaurav Garg , David T. Hass
IPC分类号： G06F12/00
CPC分类号： G06F12/0815 , G06F12/0831
摘要： In operation, a first request for data is sent to a cache of a first node. Additionally, it is determined whether the first request can be satisfied within the first node, where the determining includes at least one of determining a type of the first request and determining a state of the data in the cache. Furthermore, a second request for the data is conditionally sent to a second node, based on the determination.
摘要翻译：在操作中，向数据的第一请求发送到第一节点的高速缓存。此外，确定在第一节点内是否可以满足第一请求，其中确定包括确定第一请求的类型并确定高速缓存中的数据的状态中的至少一个。此外，基于该确定，有条件地将第二请求数据发送到第二节点。

28. 发明授权

US08478811B2 Advanced processor with credit based scheme for optimal packet flow in a multi-processor system on a chip 失效
标题翻译：高级处理器采用基于信用的方案，用于在芯片上的多处理器系统中实现最佳数据包流
公开(公告)号：US08478811B2
公开(公告)日：2013-07-02
申请号：US12261808
申请日：2008-10-30
申请人： Gaurav Garg , David T. Hass
发明人： Gaurav Garg , David T. Hass
IPC分类号： G06F15/16 , G06F15/177 , G06F15/173 , H04L12/28
CPC分类号： H04L47/10 , G06F12/0813 , H04L47/39
摘要： A system, method, and computer program product are provided for optimal packet flow in a multi-processor system on a chip. In operation, a credit is allocated for each of a plurality of agents coupled to a messaging network, the allocating including reserving one or more entries in a receive queue of at least one of the plurality of agents. Additionally, a first credit is decremented in response to a first agent sending a message to a second agent, the plurality of agents including the first and second agents. Furthermore, one of the first credit or a second credit is incremented in response to a signal from the second agent.
摘要翻译：提供了一种系统，方法和计算机程序产品，用于在芯片上的多处理器系统中实现最佳分组流。在操作中，为耦合到消息收发网络的多个代理中的每个代理分配信贷，分配包括在多个代理中的至少一个代理的接收队列中保留一个或多个条目。另外，响应于第一代理向第二代理发送消息而减少第一信用，所述多个代理包括第一和第二代理。此外，响应于来自第二代理的信号，第一信用或第二抵免额中的一个被递增。

29. 发明申请

US20050097487A1 Timing verification, automated multicycle generation and verification 有权
标题翻译：定时验证，自动多循环生成和验证
公开(公告)号：US20050097487A1
公开(公告)日：2005-05-05
申请号：US10702796
申请日：2003-11-05
申请人： Mogens Lauritzen , Gaurav Garg , Umesh Nair
发明人： Mogens Lauritzen , Gaurav Garg , Umesh Nair
IPC分类号： G06F9/45 , G06F17/50
CPC分类号： G06F17/5031
摘要： A method for generating consistent functional and timing definitions. The method includes providing a common source description, the common source description corresponding to multicycle paths in an integrated circuit chip design, transforming the common source description to a functional definition, monitoring a functional simulation of the integrated circuit chip design using the functional definition, transforming the common source description to a timing definition, and performing a timing analysis of the integrated circuit chip design using the timing definition.
摘要翻译：一种用于产生一致的功能和时序定义的方法。该方法包括提供公共源描述，在集成电路芯片设计中对应于多周期路径的公共源描述，将公共源描述转换为功能定义，使用功能定义监视集成电路芯片设计的功能仿真，转换对定时定义的公共源描述，以及使用定时定义执行集成电路芯片设计的时序分析。

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