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21. 发明授权

US07997815B2 Printer 有权
标题翻译：打印机
公开(公告)号：US07997815B2
公开(公告)日：2011-08-16
申请号：US12009705
申请日：2008-01-22
申请人： Akira Ito , Koshiro Yamaguchi , Norie Ito
发明人： Akira Ito , Koshiro Yamaguchi , Norie Ito
IPC分类号： B41J5/30 , B41J9/44 , G06F11/00
CPC分类号： B41J3/4075
摘要： A printer includes a feeding device that feeds a tape-like print medium along a length direction of the print medium and a printing device that prints a character on the print medium. The printer further includes a storage device that stores original data including unit data, line feed data, and line height data. The printer also includes a tape width detecting device that detects a tape width. Further, the printer includes a maximum number of lines calculating device that calculates a maximum number of lines that can be accommodated within the tape width when the height of the line is unchanged, and a print data generating device that generates print data corresponding to the maximum number of lines from the original data, and a printing control device that controls the printing device based on the print data.
摘要翻译：打印机包括沿着打印介质的长度方向馈送带状打印介质的进给装置和在打印介质上打印字符的打印装置。打印机还包括存储包括单元数据，换行数据和行高数据的原始数据的存储装置。打印机还包括检测带宽度的带宽检测装置。此外，打印机包括最大数量的行计算装置，其计算当线的高度不变时可以在带宽度内容纳的最大行数;以及打印数据生成装置，其生成对应于最大值的打印数据来自原始数据的行数，以及基于打印数据控制打印装置的打印控制装置。

22. 发明申请

US20110186934A1 Low mismatch semiconductor device and method for fabricating same 有权
标题翻译：低失配半导体器件及其制造方法
公开(公告)号：US20110186934A1
公开(公告)日：2011-08-04
申请号：US12657909
申请日：2010-01-29
申请人： Xiangdong Chen , Akira Ito
发明人： Xiangdong Chen , Akira Ito
IPC分类号： H01L27/092 , H01L29/78 , H01L21/28
CPC分类号： H01L21/28 , H01L27/092 , H01L29/78
摘要： Disclosed is a low mismatch semiconductor device that comprises a lightly doped channel region having a first conductivity type and a first dopant concentration in a semiconductor body, and a high-k metal gate stack including a gate metal layer formed over a high-k gate dielectric without having a dielectric cap on the high-k dielectric. The high-k metal gate stack being formed over the lightly doped channel region. The lightly doped channel region may be a P- or N-conductivity region, for example, and may be part of a corresponding P- or N-semiconductor substrate, or a P- or N-well formed in a substrate of the respectively opposite conductivity type. The disclosed semiconductor device, which may be an NMOS or PMOS analog device, for example, can be fabricated as part of an integrated circuit including one or more CMOS logic devices.
摘要翻译：公开了一种低失配半导体器件，其包括在半导体本体中具有第一导电类型和第一掺杂剂浓度的轻掺杂沟道区，以及包括形成在高k栅极电介质上的栅极金属层的高k金属栅堆叠在高k电介质上没有电介质盖。高k金属栅堆叠形成在轻掺杂沟道区上。轻掺杂沟道区可以是例如P型或N-导电性区，并且可以是相应的P-或N-半导体衬底的一部分，也可以是在相对的相对的衬底中形成的P-阱或N阱导电类型。所公开的半导体器件（其可以是例如NMOS或PMOS模拟器件）可以被制造为包括一个或多个CMOS逻辑器件的集成电路的一部分。

23. 发明申请

US20110186926A1 Semiconductor device having a lightly doped semiconductor gate and method for fabricating same 有权
标题翻译：具有轻掺杂半导体栅极的半导体器件及其制造方法
公开(公告)号：US20110186926A1
公开(公告)日：2011-08-04
申请号：US12657901
申请日：2010-01-29
申请人： Akira Ito , Xiangdong Chen
发明人： Akira Ito , Xiangdong Chen
IPC分类号： H01L27/092 , H01L29/78 , H01L21/8238 , H01L21/336
CPC分类号： H01L21/28008 , H01L21/28035 , H01L29/105 , H01L29/4916 , H01L29/517 , H01L29/78 , H01L29/7816 , H01L29/7835
摘要： According to one embodiment, a semiconductor device comprises a high-k gate dielectric overlying a well region having a first conductivity type formed in a semiconductor body, and a semiconductor gate formed on the high-k gate dielectric. The semiconductor gate is lightly doped so as to have a second conductivity type opposite the first conductivity type. The disclosed semiconductor device, which may be an NMOS or PMOS device, can further comprise an isolation region formed in the semiconductor body between the semiconductor gate and a drain of the second conductivity type, and a drain extension well of the second conductivity type surrounding the isolation region in the semiconductor body. In one embodiment, the disclosed semiconductor device is fabricated as part of an integrated circuit including one or more CMOS logic devices.
摘要翻译：根据一个实施例，半导体器件包括覆盖在半导体本体中形成的具有第一导电类型的阱区的高k栅极电介质和形成在高k栅极电介质上的半导体栅极。半导体栅极被轻掺杂，以具有与第一导电类型相反的第二导电类型。所公开的可以是NMOS或PMOS器件的半导体器件还可以包括形成在半导体本体中的半导体栅极和第二导电类型的漏极之间的隔离区域，以及包围第二导电类型的漏极延伸阱半导体体中的隔离区。在一个实施例中，所公开的半导体器件被制造为包括一个或多个CMOS逻辑器件的集成电路的一部分。

24. 发明申请

US20110169077A1 Semiconductor device having a modified shallow trench isolation (STI) region and a modified well region 有权
标题翻译：具有修改的浅沟槽隔离（STI）区域和修改的阱区域的半导体器件
公开(公告)号：US20110169077A1
公开(公告)日：2011-07-14
申请号：US12656054
申请日：2010-01-14
申请人： Akira Ito
发明人： Akira Ito
IPC分类号： H01L29/78
CPC分类号： H01L29/0847 , H01L29/0653 , H01L29/7835
摘要： An apparatus is disclosed to increase a breakdown voltage of a semiconductor device. The semiconductor device includes a modified breakdown shallow trench isolation (STI) region to effectively reduce a drain to source resistance when compared to a conventional semiconductor device, thereby increasing the breakdown voltage of the semiconductor device when compared to the conventional semiconductor device. The modified breakdown STI region allows more current to pass from a source region to a drain region of the semiconductor device, thereby further increasing the break down voltage of the semiconductor device from that of the conventional semiconductor device. The semiconductor device may include a modified well region to further reduce the drain to source resistance of the semiconductor device. The modified breakdown STI region allows even more current to pass from a source region to a drain region of the semiconductor device, thereby further increasing the break down voltage of the semiconductor device from that of the conventional semiconductor device.
摘要翻译：公开了一种用于增加半导体器件的击穿电压的装置。半导体器件包括修改的击穿浅沟槽隔离（STI）区域，以便与传统的半导体器件相比有效地降低漏极到源极的电阻，从而与传统的半导体器件相比增加了半导体器件的击穿电压。修改的击穿STI区域允许更多的电流从半导体器件的源极区域到漏极区域通过，从而进一步增加了半导体器件的分解电压与常规半导体器件的分解电压。半导体器件可以包括改进的阱区，以进一步减小半导体器件的漏极 - 源极电阻。修改的击穿STI区域允许更多的电流从半导体器件的源极区域到漏极区域通过，从而进一步增加了半导体器件的分解电压与常规半导体器件的分解电压。

25. 发明授权

US07938694B2 Connector terminal and connector with the connector terminal 有权
标题翻译：连接器端子和带连接器端子的连接器
公开(公告)号：US07938694B2
公开(公告)日：2011-05-10
申请号：US12449722
申请日：2008-03-26
申请人： Hiroomi Hiramitsu , Hosei Mizuno , Kouichi Matsumoto , Hiroki Hirai , Akira Ito
发明人： Hiroomi Hiramitsu , Hosei Mizuno , Kouichi Matsumoto , Hiroki Hirai , Akira Ito
IPC分类号： H01R11/22
CPC分类号： H01R13/11 , H01R4/203 , H01R13/111 , H01R13/113 , H01R13/114 , H01R13/4223
摘要： An object of the present invention is to provide a connector terminal which can be easily fitted to or separated from a partner terminal (partner connector) even if the space for fitting operation is limited in the fitting direction. The connector terminal has a terminal inserting portion to which the partner terminal is inserted, and a coupling portion intercoupling and electrically interconnecting the inserting portion and a wire connection portion of a coated wire. The terminal inserting portion and the wire connecting portion are juxtaposed such that the inserting direction of the partner terminal to be inserted into the terminal inserting portion and the axial center direction of the end of the coated wire to be connected to the wire connecting portion is parallel with or substantially parallel with each other, and are intercoupled via the coupling portion so as to overlap with each other in a direction perpendicular to or substantially perpendicular to both of the inserting direction of the partner terminal and the axial center direction of the end of the coated wire.
摘要翻译：本发明的目的是提供一种即使在装配方向上限制装配操作空间的情况下，也可以容易地将其安装到对方端子（对方连接器）上或与对方端子分离的连接器端子。连接器端子具有插入对方端子的端子插入部分和耦合部分相互耦合并将插入部分和涂覆线材的电线连接部分电气互连。端子插入部分和电线连接部分并置，使得插入端子插入部分的对方端子的插入方向和待连接到电线连接部分的涂覆线的端部的轴向中心方向是平行的彼此之间具有或基本上平行，并且经由联接部分相互耦合，以便在垂直于或基本上垂直于对方端子的插入方向和该端子的端部的轴向中心方向的方向上彼此重叠涂层线。

26. 发明申请

US20110094797A1 ELECTRIC WIRE WITH TERMINAL CONNECTOR AND METHOD OF MANUFACTURING ELECTRIC WIRE WITH TERMINAL CONNECTOR 审中-公开
标题翻译：带终端连接器的电线及制造电线与终端连接器的方法
公开(公告)号：US20110094797A1
公开(公告)日：2011-04-28
申请号：US13001488
申请日：2009-11-18
申请人： Takuji Otsuka , Hiroki Hirai , Junichi Ono , Tetsuji Tanaka , Hiroki Shimoda , Akira Ito , Hisashi Higuchi , Masahiro Hagi
发明人： Takuji Otsuka , Hiroki Hirai , Junichi Ono , Tetsuji Tanaka , Hiroki Shimoda , Akira Ito , Hisashi Higuchi , Masahiro Hagi
IPC分类号： H01R4/18 , H01R43/00
CPC分类号： H01R43/05 , H01R4/625 , H01R43/0207 , Y10T29/49174
摘要： An electric wire with terminal connector including an electric wire having a core wire including a plurality of wires and a female terminal connector including a wire barrel that is crimped onto the core wire exposed from the electric wire, the following steps are executed. The steps include a step of removing wire insulation covering an outer peripheral surface of the core wire to expose the core wire, a step of holding the exposed core wire with jigs provided in a pair and applying ultrasonic vibration to the core wire via the jigs, and a step of crimping the wire barrel so as to surround a part of the core wire to which the ultrasonic vibration is applied.
摘要翻译：一种具有端子连接器的电线，包括具有包括多根导线的芯线的电线和包括被卷绕在从电线露出的芯线上的线筒的母端子连接器，执行以下步骤。该步骤包括：去除覆盖芯线的外周面的电线绝缘以露出芯线的步骤，将一对设置的夹具保持在暴露的芯线上并通过夹具对芯线施加超声波振动的步骤，以及将所述线筒压接以围绕施加了超声波振动的芯线的一部分的步骤。

27. 发明申请

US20110021226A1 RADIO COMMUNICATION METHOD, TERMINAL APPARATUS, BASE STATION APPARATUS, AND RADIO COMMUNICATION SYSTEM 失效
公开(公告)号：US20110021226A1
公开(公告)日：2011-01-27
申请号：US12893186
申请日：2010-09-29
申请人： Akira Ito
发明人： Akira Ito
IPC分类号： H04B7/00
CPC分类号： H04W52/42 , H04L1/0025 , H04L5/0007 , H04L5/0023 , H04L27/0008 , H04L27/2614 , H04W52/288 , H04W52/367
摘要： A radio communication method in a radio communication system which performs radio communication between a terminal apparatus and a base station apparatus, the radio communication method including: selecting one of a first transmission method or a second transmission method on the basis of transmission power of transmission signal transmitted from the terminal apparatus, in the base station apparatus; and transmitting the transmission signal to the base station apparatus by the selected first or second transmission method, in the terminal apparatus.

28. 发明授权

US07841790B2 Tape printer and tape cassette with IC circuit part 失效
标题翻译：带打印机和带有IC电路部分的磁带盒
公开(公告)号：US07841790B2
公开(公告)日：2010-11-30
申请号：US11663686
申请日：2005-09-26
申请人： Koshiro Yamaguchi , Akira Ito , Yoshio Kunieda , Takahiro Miwa
发明人： Koshiro Yamaguchi , Akira Ito , Yoshio Kunieda , Takahiro Miwa
IPC分类号： B41J29/38 , B41J3/36
CPC分类号： B41J15/044 , B41J3/4075
摘要： The CPU 81 of the tape printer 1, when the tape printer 1 is turned on, reads the “model name” and the power supply type of “drive power supply” corresponding to each “model name” of the parameter table 131 from the wireless tag circuit element 25 provided in the tape cassette 21 via the R/W module 93, and next, displays on the LCD 7 a request for selecting the model name and the drive power supply of the tape printer and wait for a selection of the model name and the drive power supply. Then, the CPU 81 reads the print control parameters corresponding to the selected model name and the drive power supply from the wireless tag circuit element 25 via the R/W module 93. If the print control parameter read from the wireless tag circuit element 25 is not stored in the ROM 83 or the EEPROM 84, the CPU 81 stores the print control parameter and executes print control based on the print control parameter (S1 to S9).
摘要翻译：带式打印机1的CPU81在带式打印机1打开的同时从无线装置读取与参数表131的各“型号名称”对应的“型号名称”和“驱动电源”的电源类型标签电路元件25，经由R / W模块93设置在带盒21中，接下来，在LCD7上显示选择型号名称和带式打印机的驱动电源的请求，并等待该模型的选择名称和驱动电源。然后，CPU 81经由R / W模块93从无线标签电路元件25读取与所选型号名称对应的打印控制参数和驱动电源。如果从无线标签电路元件25读取的打印控制参数为不存储在ROM 83或EEPROM84中，CPU 81存储打印控制参数，并根据打印控制参数执行打印控制（S1至S9）。

29. 发明申请

US20100295125A1 Split gate oxides for a laterally diffused metal oxide semiconductor (LDMOS) 有权
标题翻译：用于横向扩散的金属氧化物半导体（LDMOS）的分离栅极氧化物
公开(公告)号：US20100295125A1
公开(公告)日：2010-11-25
申请号：US12457745
申请日：2009-06-19
申请人： Akira Ito
发明人： Akira Ito
IPC分类号： H01L29/78
CPC分类号： H01L29/0847 , H01L29/0653 , H01L29/42368 , H01L29/7835
摘要： An apparatus is disclosed to increase a breakdown voltage of a semiconductor device. The semiconductor device includes a first heavily doped region to represent a source region. A second heavily doped region represents a drain region of the semiconductor device. A third heavily doped region represents a gate region of the semiconductor device. The semiconductor device includes a gate oxide positioned between the source region and the drain region, below the gate region. The semiconductor device uses a split gate oxide architecture to form the gate oxide. The gate oxide includes a first gate oxide having a first thickness and a second gate oxide having a second thickness.
摘要翻译：公开了一种用于增加半导体器件的击穿电压的装置。半导体器件包括表示源极区的第一重掺杂区域。第二重掺杂区域表示半导体器件的漏极区域。第三重掺杂区域表示半导体器件的栅极区域。半导体器件包括位于源极区域和漏极区域之间的栅极氧化物，栅极区域下方。半导体器件使用分裂栅极氧化物结构形成栅极氧化物。栅极氧化物包括具有第一厚度的第一栅极氧化物和具有第二厚度的第二栅极氧化物。

30. 发明授权

US07823950B2 Seat device for vehicle 有权
标题翻译：车辆座椅装置
公开(公告)号：US07823950B2
公开(公告)日：2010-11-02
申请号：US11055121
申请日：2005-02-11
申请人： Minoru Toyota , Akira Ito , Kazue Sumida
发明人： Minoru Toyota , Akira Ito , Kazue Sumida
IPC分类号： B60N2/32
CPC分类号： B60N2/062 , B60N2/22 , B60N2/3002 , B60N2/3038 , B60N2/757 , B60N2205/35
摘要： There is provided a seat device for a vehicle comprising a pair of main seats disposed in the vehicle width direction including respectively a main seat cushion and main seat back, and a sub seat back disposed between the main seat backs, wherein the sub seat back is configured so as to be in an arranged position in which the sub seat back is located above the main seat cushion and before the main seat back, and the main seat backs are configured so as to be moved inward when the sub seat back is in the arranged position. Accordingly, the width of the seat can be adjusted variably, without improperly affecting spaces behind or before the seat, thereby attaining both the movement of seat and the improvement of space utility.
摘要翻译：提供了一种用于车辆的座椅装置，其包括沿车宽方向布置的一对主座椅，分别包括主座椅靠垫和主座椅靠背，以及设置在主座椅靠背之间的副座椅靠背，其中副座椅靠背为被构造成处于副座椅靠背位于主座垫上方并且在主座椅靠背之前的布置位置，并且主座椅靠背构造成当副座椅靠背处于排列位置。因此，可以可变地调节座椅的宽度，而不会不利地影响座椅后面或座椅之前的空间，从而实现座椅的移动和空间效用的改善。

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