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21. 发明授权

US07518440B1 Dual path chopper stabilized amplifier and method 有权
标题翻译：双路斩波稳压放大器及方法
公开(公告)号：US07518440B1
公开(公告)日：2009-04-14
申请号：US11986762
申请日：2007-11-26
申请人： Dimitar T. Trifonov
发明人： Dimitar T. Trifonov
IPC分类号： H03F1/02
CPC分类号： H03F3/005 , H03F1/08 , H03F3/387 , H03F3/45475 , H03F2200/168 , H03F2203/45138
摘要： A dual path chopper-stabilized amplifier (100) includes first (11) and second (11A) chopping/notch-filtering paths, each including an input chopper (9,9A), a transconductance amplifier (2,2A), and a notch filter (15,15A). Chopping and notch filtering in the first path are controlled by first (CHOPCLK) and second (FILTERCLK) clock signals, respectively. Chopping and notch filtering in the second path are controlled by the second (FILTERCLK) and first (CHOPCLK) clock signals, respectively. Outputs of the first (15) and second (15A) switched capacitor notch filters are combined to provide an amplifier output signal (23A,B) that updates a capacitance (C4) at 4 times the frequency of the filter clock signal, to thereby improve amplifier stability without increasing clock frequency.
摘要翻译：双路斩波稳定放大器（100）包括第一（11）和第二（11A）斩波/陷波滤波路径，每个包括输入斩波器（9,9A），跨导放大器（2,2A）和陷波过滤器（15,15A）。第一路径中的斩波和陷波滤波分别由第一（CHOPCLK）和第二（FILTERCLK）时钟信号控制。第二路径中的斩波和陷波滤波分别由第二（FILTERCLK）和第一（CHOPCLK）时钟信号控制。第一（15）和第二（15A）开关电容器陷波滤波器的输出被组合以提供以4倍于滤波器时钟信号的频率更新电容（C4）的放大器输出信号（23A，B），从而改善放大器稳定性，不增加时钟频率。

22. 发明申请

US20080246543A1 Common mode feedback for large output swing and low differential error 有权
标题翻译：大输出摆幅和低差分误差的共模反馈
公开(公告)号：US20080246543A1
公开(公告)日：2008-10-09
申请号：US11732357
申请日：2007-04-03
申请人： Dimitar T. Trifonov , Marco A. Gardner
发明人： Dimitar T. Trifonov , Marco A. Gardner
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F3/45632 , H03F2203/45082 , H03F2203/45101 , H03F2203/45292 , H03F2203/45681
摘要： A differential amplifier includes a differential input pair (2A) coupled to a folded cascode stage (2B) and a common mode feedback circuit (34) including a tracking circuit (30A) coupled to first (Vout−) and second (Vout+) outputs of the folded cascode stage (2B). The first and second outputs are coupled to first terminals of first (31A) and second (31B) tracking capacitors which have second terminals on which a first common mode output signal (VCM1) is produced and also are coupled to first terminals of third (32A) and fourth (32B) tracking capacitors, respectively, which have second terminals on which a second common mode output signal (VCM2) is produced. The first and third tracking capacitors are discharged by first (27A) and second (27B) switches that directly couple the first and second outputs to first and second inputs of a common mode feedback amplifier (4). A desired common mode output voltage (VCM-IN) is applied to a third input of the common mode feedback amplifier. The switches are opened to cause the first and second common mode output voltages to be generated, causing a common mode feedback control signal (VCMFB) to be generated for biasing the folded cascode stage.
摘要翻译：差分放大器包括耦合到折叠共源共栅级（2B）的差分输入对（2A）和包括耦合到第一（Vout）的跟踪电路（30A）的共模反馈电路（34） SUP>）和第二（Vout + SUP））输出。第一和第二输出耦合到具有第二端子的第一（31A）和第二（31B）跟踪电容器的第一端子，第二端子产生第一共模输出信号（V SUB CM1）也分别耦合到第三（32A）和第四（32B）个跟踪电容器的第一端子，它们具有产生第二共模输出信号（V SUB CM2）的第二端子。第一和第三跟踪电容器通过将第一和第二输出直接耦合到共模反馈放大器（4）的第一和第二输入的第一（27A）和第二（27B）开关放电。所需的共模输出电压（V SUB-IN IN）被施加到共模反馈放大器的第三输入端。打开开关以产生第一和第二共模输出电压，从而产生用于偏置折叠共源共栅级的共模反馈控制信号（V SUB CMBB）。

23. 发明授权

US07586368B2 Simultaneous filtering and compensation circuitry and method in chopping amplifier 有权
标题翻译：斩波放大器同时滤波和补偿电路及方法
公开(公告)号：US07586368B2
公开(公告)日：2009-09-08
申请号：US12001853
申请日：2007-12-13
申请人： Dimitar T. Trifonov
发明人： Dimitar T. Trifonov
IPC分类号： H03F1/02
CPC分类号： H03F3/393
摘要： A chopper-stabilized amplifier (1B) having a first output (25) includes an input chopper (9) for chopping an input signal and applying it to the input of a first amplifier (2) and an output chopper (10) for chopping an output signal of the first amplifier and applying it to the input of a switched capacitor notch filter (30-1). Notch filtering of the chopped output signal is performed by coupling a first compensation capacitor (C2) between a first output (25) of the chopper-stabilized amplifier and an output (14A) of the output chopper by means of a first switch (55) in response to a filter clock (FILTERCLK) and coupling a second compensation capacitor (C3) between the first output and an input (22A) of a second amplifier (3) by means of a second switch (58) in response to the filter clock, and coupling the first compensation capacitor between the first output and the input of the second amplifier by means of a third switch (56) in response to the complement of the filter clock and coupling the second compensation capacitor between the first output and the output (14A) of the output chopper circuit (40) by means of a fourth switch (57) in response to the complement.
摘要翻译：具有第一输出（25）的斩波稳定放大器（1B）包括用于斩波输入信号并将其施加到第一放大器（2）和输入斩波器（10）的输入的输入斩波器（9）输出信号并将其施加到开关电容器陷波滤波器（30-1）的输入端。通过借助于第一开关（55）将斩波稳定放大器的第一输出（25）和输出斩波器的输出（14A）耦合到第一补偿电容器（C2）来执行斩波输出信号的陷波滤波，响应于滤波器时钟（FILTERCLK）并且响应于滤波器时钟通过第二开关（58）在第一输出和第二放大器（3）的输入（22A）之间耦合第二补偿电容器（C3），并且响应于所述滤波器时钟的互补，借助于第三开关（56）在所述第一放大器的所述第一输出端和所述输入端之间耦合所述第一补偿电容器并将所述第二补偿电容器耦合在所述第一输出和所述输出之间响应于补码，通过第四开关（57）输出斩波电路（40）的输出。

24. 发明授权

US07375585B2 Circuit and method for switching active loads of operational amplifier input stage 有权
标题翻译：用于切换运算放大器输入级有源负载的电路和方法
公开(公告)号：US07375585B2
公开(公告)日：2008-05-20
申请号：US11120088
申请日：2005-05-02
申请人： Dimitar T. Trifonov , Joy Y. Zhang
发明人： Dimitar T. Trifonov , Joy Y. Zhang
IPC分类号： H03F3/45
CPC分类号： H03F3/45219 , H03F2203/45424 , H03F2203/45504
摘要： An operational amplifier having a wide input common mode voltage range includes first (2) and second (3) differential input transistor pairs coupled to first (14) and second (15) tail current transistors. At least one of the first and second tail current transistor pairs is controlled by a common mode control circuit (4). A gate of the first tail current transistor (14) is coupled to the common mode control circuit (4) to turn the first tail current transistor on and to turn the second tail current transistor off when the common mode input voltage is below a common mode threshold voltage (CMTHR). A folded cascode stage (5) is driven by the first and second differential input transistor pairs. Switched active load transistors are coupled to active load transistors of the folded cascode stage and are operable in response to the common mode control circuit to divert part of a current produced by one of the first and second differential input pairs from the folded cascode circuit, depending on whether the common mode input voltage is above or below the common mode threshold voltage.
摘要翻译：具有宽输入共模电压范围的运算放大器包括耦合到第一（14）和第二（15）尾电流晶体管的第一（2）和第二（3）差分输入晶体管对。第一和第二尾电流晶体管对中的至少一个由共模控制电路（4）控制。当共模输入电压低于公共模式时，第一尾电流晶体管（14）的栅极耦合到共模控制电路（4），以使第一尾电流晶体管导通并使第二尾电流晶体管截止，阈值电压（CMTHR）。折叠的共源共栅级（5）由第一和第二差分输入晶体管对驱动。开关有源负载晶体管耦合到折叠共源共栅级的有源负载晶体管，并且响应于共模控制电路可操作以将部分由第一和第二差分输入对之一产生的电流从折叠共源共栅电路转移，这取决于关于共模输入电压是否高于或低于共模阈值电压。

25. 发明授权

US09003096B2 Serial interface 有权
标题翻译：串行接口
公开(公告)号：US09003096B2
公开(公告)日：2015-04-07
申请号：US13049694
申请日：2011-03-16
申请人： Dimitar T. Trifonov , Marco A. Gardner , Joe G. Di Bartolomeo
发明人： Dimitar T. Trifonov , Marco A. Gardner , Joe G. Di Bartolomeo
IPC分类号： G06F13/14 , G06F13/42
CPC分类号： G06F13/4282
摘要： A method is provided. A communication is received by an input pin of an IC over a single-wire bus, where the communication includes a command byte. If the command byte is an initialization command byte, a self-addressing operation is performed to identify a bus address for the IC. Alternatively, if the command byte is a data movement command byte, a data movement operation is performed. When data movement operation is performed, the bus interface of the IC is set from the transparent mode to the operational mode if an operation address from the command byte matches the bus address so that a register identified in the command byte can be accessed and data movement with the register can be performed.
摘要翻译：提供了一种方法。通过单线总线的IC的输入引脚接收通信，其中通信包括命令字节。如果命令字节是初始化命令字节，则执行自寻址操作以识别IC的总线地址。或者，如果命令字节是数据移动命令字节，则执行数据移动操作。当执行数据移动操作时，如果来自命令字节的操作地址与总线地址匹配，则IC的总线接口从透明模式设置为操作模式，使得可以访问在命令字节中识别的寄存器和数据移动可以执行寄存器。

26. 发明授权

US08304851B2 Semiconductor thermocouple and sensor 有权
标题翻译：半导体热电偶和传感器
公开(公告)号：US08304851B2
公开(公告)日：2012-11-06
申请号：US12750408
申请日：2010-03-30
申请人： Dimitar T. Trifonov
发明人： Dimitar T. Trifonov
IPC分类号： H01L31/0232 , H01L31/058
CPC分类号： H01L23/38 , H01L27/16 , H01L2924/0002 , H01L2924/00
摘要： Conventional “on-chip” or monolithically integrated thermocouples are very mechanically sensitive and are expensive to manufacture. Here, however, thermocouples are provided that employ different thicknesses of thermal insulators to help create thermal differentials within an integrated circuit. By using these thermal insulators, standard manufacturing processes can be used to lower cost, and the mechanical sensitivity of the thermocouple is greatly decreased. Additionally, other features (which can be included through the use of standard manufacturing processes) to help trap and dissipate heat appropriately.
摘要翻译：传统的片上或单片集成热电偶非常机械敏感，制造成本高。然而，这里提供了使用不同厚度的绝热体来帮助在集成电路内产生热差的热电偶。通过使用这些热绝缘体，可以使用标准制造工艺来降低成本，并且热电偶的机械灵敏度大大降低。此外，其他功能（可以通过使用标准制造工艺包括在内），以帮助适当地捕获和散发热量。

27. 发明申请

US20090153241A1 Simultaneous filtering and compensation circuitry and method in chopping amplifier 有权
公开(公告)号：US20090153241A1
公开(公告)日：2009-06-18
申请号：US12001853
申请日：2007-12-13
申请人： Dimitar T. Trifonov
发明人： Dimitar T. Trifonov
IPC分类号： H03F1/02
CPC分类号： H03F3/393
摘要： A chopper-stabilized amplifier (1B) having a first output (25) includes an input chopper (9) for chopping an input signal and applying it to the input of a first amplifier (2) and an output chopper (10) for chopping an output signal of the first amplifier and applying it to the input of a switched capacitor notch filter (30-1). Notch filtering of the chopped output signal is performed by coupling a first compensation capacitor (C2) between a first output (25) of the chopper-stabilized amplifier and an output (14A) of the output chopper by means of a first switch (55) in response to a filter clock (FILTERCLK) and coupling a second compensation capacitor (C3) between the first output and an input (22A) of a second amplifier (3) by means of a second switch (58) in response to the filter clock, and coupling the first compensation capacitor between the first output and the input of the second amplifier by means of a third switch (56) in response to the complement of the filter clock and coupling the second compensation capacitor between the first output and the output (14A) of the output chopper circuit (40) by means of a fourth switch (57) in response to the complement.

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