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    • 21. 发明授权
    • Image capturing device
    • 图像捕捉设备
    • US07355640B2
    • 2008-04-08
    • US10648772
    • 2003-08-25
    • Tatsuya TakahashiTohru WatanabeOsamu Tabata
    • Tatsuya TakahashiTohru WatanabeOsamu Tabata
    • H04N9/64
    • H04N5/361H04N5/3655H04N5/3722
    • An image capturing device having a function of clamping an image signal. When the image capturing device is activated, a synchronous signal generating section begins creation of a horizontal synchronous signal, and a counter begins counting a pulse of the horizontal synchronous signal. When the counted value reaches a predetermined value, the clamping capability control section changes the level of a clamp mode signal to an H level. During a period from the start of power supply to the image capturing device to the raising of the level of a clamp mode signal to an H level, a clamp pulse generating section sets a longer width for a clamp pulse than in a normal operation so that a switch element of a clamping circuit remains in an on state in a longer period, whereby a smaller time constant for clamping is set. After elapse of a predetermined period, the switch element is controlled so as to remain in an ON state in a normal period, which is relatively short, whereby a larger time constant for clamping is set. With this arrangement, noise which would be caused with a small clamping time constant is suppressed.
    • 具有夹持图像信号的功能的图像捕获装置。 当图像拍摄装置被激活时,同步信号产生部分开始创建水平同步信号,并且计数器开始计数水平同步信号的脉冲。 当计数值达到预定值时,钳位能力控制部分将钳位模式信号的电平改变为H电平。 在从供电开始到图像捕获装置到将钳位模式信号的电平提高到H电平的期间中,钳位脉冲发生部分将钳位脉冲的宽度设置为比正常操作更长的宽度,使得 钳位电路的开关元件在较长时间内保持导通状态,由此设定较小的钳位时间常数。 在经过预定时间后,开关元件被控制成在相对较短的正常时段内保持在ON状态,由此设定较大的夹紧时间常数。 通过这种布置,可以抑制以小的夹紧时间常数引起的噪声。
    • 22. 发明授权
    • Deficient pixel detection method and image signal processor
    • 缺陷像素检测方法和图像信号处理器
    • US06768513B1
    • 2004-07-27
    • US09680705
    • 2000-10-06
    • Tohru WatanabeMasato Teratani
    • Tohru WatanabeMasato Teratani
    • H04N964
    • H04N5/367
    • An image signal processor detects deficient pixels, such as pixels having a white deficiency or a black deficiency, and corrects the image signal so that the pixel deficiency is not reproduced. A memory circuit holds a target pixel signal and peripheral signals, which correspond to the pixels adjacent to the target pixel. A deficiency detection circuit compares the level of the target pixel signal with the levels of the peripheral pixel signals to detect whether the target pixel is deficient. A deficiency correction circuit corrects the signal of a detected deficient pixel using information from nearby pixels.
    • 图像信号处理器检测诸如具有白色不足或黑色不足的像素的缺陷像素,并校正图像信号,使得不再现像素缺陷。 存储电路保持对象像素信号和对应于与目标像素相邻的像素的周边信号。 缺陷检测电路将目标像素信号的电平与周边像素信号的电平进行比较,以检测目标像素是否不足。 缺陷校正电路使用来自附近像素的信息校正检测到的缺陷像素的信号。
    • 23. 发明授权
    • Solid-state image pickup apparatus
    • 固态摄像装置
    • US06545713B1
    • 2003-04-08
    • US09014944
    • 1998-01-28
    • Tohru Watanabe
    • Tohru Watanabe
    • H04N314
    • H04N9/045H04N5/3452H04N5/347H04N5/3725
    • In an output section (11d) of an image sensor (11), information charges are discharged from a capacitance at a reset clock &phgr;r1, which is twice the period of a horizontal clock &phgr;h, and the information charges for two pixels are accumulated in the capacitance. In two steps, a sample-and-hold circuit (14) inputs an image signal Y0(t) that is output from the output section (11d) and outputs an image signal Y1(t) in which a period representing the information charge for one pixel and a period representing the information charges for two pixels alternately repeat. By taking the difference between the value of the period representing the information charges of two pixels and the value of the period representing the information charge of one pixel in the image signal Y1(t), the information charge of each pixel can be individually determined.
    • 在图像传感器(11)的输出部分(11d)中,信息电荷从水平时钟phih周期的两倍的复位时钟phir1处的电容放电,并且两个像素的信息电荷被累积在 电容。 在两个步骤中,采样和保持电路(14)输入从输出部分(11d)输出的图像信号Y0(t),并输出图像信号Y1(t),其中表示用于 一个像素和一个表示两个像素的信息费用的周期交替重复。 通过取代表示图像信号Y1(t)中的两个像素的信息电荷的周期的值与表示一个像素的信息电荷的周期的值之间的差,可以单独确定每个像素的信息电荷。
    • 24. 发明授权
    • Signal processor system with noise suppression
    • 具有噪声抑制功能的信号处理器系统
    • US06377199B1
    • 2002-04-23
    • US09320828
    • 1999-05-26
    • Tohru Watanabe
    • Tohru Watanabe
    • H03M112
    • H04N5/335G06J1/00H03M1/0845H03M1/12H04N5/217
    • A mixed signal processor includes an analog processor, a digital signal processor, an A/D converter connected between the two processors, a pair of output circuits, and a complementary data generating circuit connected between the output circuits and the digital signal processor. The complementary data generating circuit receives a digital data signal output from the processor and generates a delayed data signal and a complementary signal. The complementary or sub-data signal is generated by inverting the data signal when there is no change between corresponding consecutive bits of the digital signal and maintaining or not inverting the data signal when corresponding consecutive bits of the digital signal are different. The complementary data generating circuit causes a sum of the currents flowing to the respective output circuits to remain constant even when the data bits are changing, which suppresses noise generation which could adversely effect the operation of the analog signal processor.
    • 混合信号处理器包括模拟处理器,数字信号处理器,连接在两个处理器之间的A / D转换器,一对输出电路和连接在输出电路和数字信号处理器之间的互补数据产生电路。 互补数据产生电路接收从处理器输出的数字数据信号,并生成延迟数据信号和互补信号。 互补或子数据信号是通过在数字信号的相应的连续位之间没有变化时反转数据信号,并且当数字信号的相应连续位不同时保持或不反相数据信号而产生。 互补数据产生电路,即使在数据位发生变化时,流向各输出电路的电流的和也保持恒定,这抑制可能不利地影响模拟信号处理器的操作的噪声产生。