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    • 22. 发明授权
    • Microwave-excited plasma processing apparatus
    • 微波激发等离子体处理装置
    • US5162633A
    • 1992-11-10
    • US372716
    • 1989-06-27
    • Tadasi SonobeKazuo SuzukiTakuya FukudaMichio Ohue
    • Tadasi SonobeKazuo SuzukiTakuya FukudaMichio Ohue
    • C23C14/34C23C16/511C23F4/00H01J37/32H01L21/205H01L21/302H01L21/3065H01L21/31H05B6/80
    • H01J37/32678H01J37/32192H01J37/32238H01J37/32697H05B6/80
    • The present invention relates to a plasma treatment apparatus for making plasma surface processing of a specimen such as thin-film formation, etching, sputtering or plasma oxidation by use of plasma produced through microwave discharge. In a specimen chamber provided with a specimen table for holding at least one specimen thereon, a microwave is introduced from a direction intersecting a magnetic line of force so as to propagate in the longitudinal direction of an ECR region or in a direction along the plane of the ECR region. Since the microwave is introduced from the transverse direction of the specimen chamber, the provision of a microwave introducing window at an upper portion of the specimen chamber is not required and hence a counter electrode for applying an electric field to the specimen can be disposed at the upper portion of the specimen chamber, thereby making it possible to apply a uniform electric field to the specimen so that the specimen is subjected to a uniform treatment.
    • 本发明涉及一种等离子体处理装置,其用于通过使用通过微波放电产生的等离子体来进行诸如薄膜形成,蚀刻,溅射或等离子体氧化等试样的等离子体表面处理。 在设置有用于保持至少一个样本的样本台的样本室中,从与磁力线相交的方向引入微波,以沿ECR区域的纵向方向或沿着ECR区域的平面的方向传播微波 ECR地区。 由于微波从试样室的横向导入,因此不需要在试样室的上部设置微波导入窗,因此可以在试样室的上部设置用于向试样施加电场的对电极 从而能够对试样施加均匀的电场,使样品经受均匀的处理。
    • 24. 发明授权
    • Semiconductor device having a shielding conductor
    • 具有屏蔽导体的半导体器件
    • US06278148B1
    • 2001-08-21
    • US09040457
    • 1998-03-18
    • Takao WatanabeTakuya FukudaNorio Hasegawa
    • Takao WatanabeTakuya FukudaNorio Hasegawa
    • H01L27108
    • H01L27/10897G11C5/063G11C7/02G11C11/4097H01L23/5225H01L23/552H01L27/10805H01L27/10882H01L2924/0002H01L2924/00
    • The present invention relates to a semiconductor device that includes a dynamic memory and logic circuits that are integrated on a single chip and that can avoid noise problems and signal delay. The portion above the memory is shielded with a shielding conductor that is biased to an equipotential. Wirings between logical blocks and bonding pads or between logical blocks are passed over the conductive layer. Wiring for logic circuits can be done in the same metal wiring layer in which the shielding conductor is provided. The shielding conductor can have a mesh-like structure to improve its integrity and wirings can be passed over conductive portions of the shielding layer to be protected from noise. In addition to the dynamic memory, other memories and analog circuits can be used instead of or in combination with the dynamic memory.
    • 本发明涉及一种半导体器件,其包括集成在单个芯片上并且可以避免噪声问题和信号延迟的动态存储器和逻辑电路。 存储器上方的部分用被偏置到等电位的屏蔽导体屏蔽。 逻辑块和焊盘之间或逻辑块之间的布线通过导电层。 逻辑电路的布线可以在设置有屏蔽导体的同一金属布线层中完成。 屏蔽导体可以具有网状结构以改善其完整性,并且布线可以穿过屏蔽层的导电部分以防止噪声。 除了动态存储器之外,可以使用其他存储器和模拟电路来代替动态存储器或与动态存储器组合使用。
    • 25. 发明授权
    • Capacitor for semiconductor integrated circuit
    • 半导体集成电路电容器
    • US5745336A
    • 1998-04-28
    • US417839
    • 1995-04-06
    • Katsuaki SaitoMichio OhueTakuya FukudaJaiHo ChoiYukinobu Miyamoto
    • Katsuaki SaitoMichio OhueTakuya FukudaJaiHo ChoiYukinobu Miyamoto
    • H01G7/06H01L21/02H01L27/115H01G4/06
    • H01L27/11502H01G7/06H01L28/55
    • A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film and the top portion is removed. As a result, a fact that an oxide of each electrode, which deteriorates the relative permittivity, is formed on the interface between the electrode and the ferroelectric material is prevented, and a large capacity can be realized with respect to the area of the substrate because the ferroelectric thin film is formed into the columnar and elongated shape, resulting in that the capacitance of the capacitor is not reduced in which the electrodes and the oxide dielectric material having a high permittivity are, in series, connected to each other. The capacitor is formed into a DRAM or an FRAM memory cell so as to realize a semiconductor memory revealing a high degree of integration and a high processing speed.
    • 根据本发明的半导体集成电路装置具有电容器,其形成为在其基板上形成MOS晶体管之后形成铁电薄膜,由例如PbZrTiO 3或SrTiO 3制成的铁电薄膜 或类似物形成为柱状,以形成与所述柱状铁电薄膜的侧壁部分直接接触的电极,并且去除顶部部分。 结果,防止了在电极和铁电材料之间的界面上形成各种电极的氧化物,导致相对介电常数下降的事实,因此能够相对于基板的面积实现大容量,因为 铁电薄膜形成为柱状和细长形状,导致电容器的电容不降低,其中具有高介电常数的电极和氧化物介电材料串联连接。 电容器形成为DRAM或FRAM存储单元,以实现显示高集成度和高​​处理速度的半导体存储器。