专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明申请

US20070158306A1 METHOD OF FORMING A METAL LINE AND METHOD OF MANUFACTURING DISPLAY SUBSTRATE HAVING THE SAME 有权
标题翻译：形成金属线的方法和制造具有该金属线的显示基板的方法
公开(公告)号：US20070158306A1
公开(公告)日：2007-07-12
申请号：US11564308
申请日：2006-11-29
申请人： Sang-Gab KIM , Shi-Yul KIM , Min-Seok OH , Hong-Kee CHIN
发明人： Sang-Gab KIM , Shi-Yul KIM , Min-Seok OH , Hong-Kee CHIN
IPC分类号： C23F1/00 , H01L21/461 , B44C1/22 , H01L21/302 , C03C15/00
CPC分类号： C23F4/00 , C23F1/02 , C23F1/12 , H01L21/32136
摘要： A method of forming a metal line is provided. A first metal layer and a second metal layer protecting the first metal layer are formed on a base substrate. The first metal layer includes aluminum or aluminum alloy. A photoresist pattern having a linear shape is formed on the second metal layer. The first and second metal layers are dry-etched using etching gas and the photoresist pattern as an etching mask. An etching material is removed from the base substrate, to prevent corrosion of the dry-etched first metal layer. Therefore, the source metal pattern without corrosion may be formed through a dry-etching process so that a manufacturing cost is decreased.
摘要翻译：提供一种形成金属线的方法。在基底基板上形成保护第一金属层的第一金属层和第二金属层。第一金属层包括铝或铝合金。在第二金属层上形成具有直线形状的光致抗蚀剂图案。使用蚀刻气体和光致抗蚀剂图案作为蚀刻掩模对第一和第二金属层进行干蚀刻。从基底基板去除刻蚀材料，以防止干蚀刻的第一金属层的腐蚀。因此，可以通过干蚀刻工艺形成没有腐蚀的源极金属图案，从而降低了制造成本。

22. 发明申请

US20100203715A1 THIN FILM TRANSISTOR ARRAY PANEL AND FABRICATION 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US20100203715A1
公开(公告)日：2010-08-12
申请号：US12765698
申请日：2010-04-22
申请人： Sang-Gab KIM , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab KIM , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L21/28
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

23. 发明申请

US20080145980A1 CONTACT PORTION OF SEMICONDUCTOR DEVICE, AND THIN FILM TRANSISTOR ARRAY PANEL FOR DISPLAY DEVICE INCLUDING THE CONTACT PORTION 有权
标题翻译：半导体器件的接触部分和用于包括接触部分的显示器件的薄膜晶体管阵列面板
公开(公告)号：US20080145980A1
公开(公告)日：2008-06-19
申请号：US12030992
申请日：2008-02-14
申请人： Bo Sung KIM , Kwan-Wook JUNG , Wan-Shick HONG , Sang-Gab KIM , Mun-Pyo HONG
发明人： Bo Sung KIM , Kwan-Wook JUNG , Wan-Shick HONG , Sang-Gab KIM , Mun-Pyo HONG
IPC分类号： H01L21/336 , H01L21/4763
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/124 , H01L27/1244 , H01L27/1248 , H01L27/1288
摘要： A method for manufacturing a semiconductor device including forming a first wire on a substrate, forming a lower film on the first wire, forming a photosensitive pattern on the lower film using a photosensitive material, forming contact holes for exposing the first wire by etching the lower film using the photosensitive film as an etching mas, removing part of the photosensitive film pattern by an ashing process to expose a borderline of the lower film defining the contact holes and forming second wire connected to the firs wire via the contact holes.
摘要翻译：一种制造半导体器件的方法，包括在衬底上形成第一线，在第一线上形成下膜，使用感光材料在下膜上形成感光图案，形成用于通过蚀刻下部的第一线露出的接触孔使用感光膜作为蚀刻的膜，通过灰化处理去除部分感光膜图案以暴露限定接触孔的下膜的边界，并且形成通过接触孔连接到第一线的第二线。

24. 发明申请

US20080248617A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20080248617A1
公开(公告)日：2008-10-09
申请号：US12123858
申请日：2008-05-20
申请人： Chang-Oh JEONG , Hong-Sick PARK , Shi-Yul KIM , Sang-Gab KIM
发明人： Chang-Oh JEONG , Hong-Sick PARK , Shi-Yul KIM , Sang-Gab KIM
IPC分类号： H01L21/331
CPC分类号： G02F1/136286 , G02F2001/133397 , G02F2001/13629 , G02F2201/501 , H01L27/124 , H01L27/1288 , H01L29/42384
摘要： A display substrate includes a base substrate, a first metal pattern, a gate insulating layer, a second metal pattern, a channel layer and a pixel electrode. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode of a switching element. The gate insulating layer is formed on the base substrate including the first metal pattern. The second metal pattern is formed on the gate insulating layer, and includes a source electrode, a drain electrode and a source line. The channel layer is formed under the second metal pattern, and is patterned to have substantially a same side surface as a side surface of the second metal pattern. The pixel electrode is electrically connected to the drain electrode. Therefore, an afterimage on a display panel, thus improving display quality.
摘要翻译：显示基板包括基底基板，第一金属图案，栅极绝缘层，第二金属图案，沟道层和像素电极。第一金属图案形成在基底基板上，并且包括开关元件的栅极线和栅电极。栅极绝缘层形成在包括第一金属图案的基底基板上。第二金属图案形成在栅极绝缘层上，并且包括源电极，漏电极和源极线。沟道层形成在第二金属图案之下，并且被图案化以具有与第二金属图案的侧表面大致相同的侧表面。像素电极电连接到漏电极。因此，在显示面板上留下余像，从而提高显示质量。

25. 发明申请

US20080299712A1 MANUFACTURING METHOD OF A THIN FILM TRANSISTOR ARRAY PANEL 审中-公开
标题翻译：薄膜晶体管阵列的制造方法
公开(公告)号：US20080299712A1
公开(公告)日：2008-12-04
申请号：US12192531
申请日：2008-08-15
申请人： Woo-Geun LEE , Hye-Young RYU , Sang-Gab KIM , Jang-Soo KIM
发明人： Woo-Geun LEE , Hye-Young RYU , Sang-Gab KIM , Jang-Soo KIM
IPC分类号： H01L21/336
CPC分类号： H01L27/1288 , H01L21/32134 , H01L21/76838 , H01L27/1214 , H01L29/66765
摘要： A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion.
摘要翻译：制造薄膜晶体管阵列面板的方法包括：形成包括栅电极的栅极线，在栅极线上形成栅绝缘层，在栅绝缘层上形成半导体条; 在半导体条上形成欧姆接触，在欧姆接触上形成包括源电极和漏电极的数据线，在数据线和漏电极上沉积钝化层，并形成连接到漏电极的像素电极。数据线和漏电极，欧姆接触和半导体条纹的形成包括在栅绝缘层上沉积本征硅层，非本征硅层和导体层，形成光致抗蚀剂，其包括对应于源极电极和漏极电极之间的沟道区域，以及对应于数据线和漏极电极的导线区域的第一部分，其中第一部分比第二部分厚，蚀刻对应于剩余区域的导体层除了使用光致抗蚀剂作为蚀刻掩模的导线和沟道区域之外，去除第二部分以暴露沟道区域上的导体层，蚀刻剩余区域上的本征硅层和非本征硅层，蚀刻导体层和在通道区域上的非本征硅层，以及去除第一部分。

26. 发明申请

US20130180947A1 ETCHING COMPOSITION AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE SAME 审中-公开
标题翻译：蚀刻组合物和使用其制造显示基板的方法
公开(公告)号：US20130180947A1
公开(公告)日：2013-07-18
申请号：US13588825
申请日：2012-08-17
申请人： In-Bae KIM , Jae-Woo JEONG , Sang-Gab KIM , Ji-Young PARK , Jong-Hyun CHOUNG , Seon-il KIM , Yong-Sung SONG , Jong-Hyun OH
发明人： In-Bae KIM , Jae-Woo JEONG , Sang-Gab KIM , Ji-Young PARK , Jong-Hyun CHOUNG , Seon-il KIM , Yong-Sung SONG , Jong-Hyun OH
IPC分类号： C09K13/06 , H01B13/00 , C09K13/00
CPC分类号： C09K13/06 , H01L27/124 , H01L27/1259
摘要： An etching composition that includes, based on the total weight of the etching composition, from about 0.05% to about 15% by weight of a halogen-containing compound, from about 0.1% to about 20% by weight of a nitrate compound, from about 0.1% to about 10% by weight of an acetate compound, from about 0.1% to about 10% by weight of a cyclic amine compound, from about 0% to about 50% by weight of a polyhydric alcohol, and a remainder of water.
摘要翻译：一种蚀刻组合物，其基于蚀刻组合物的总重量计包含约0.05重量％至约15重量％的含卤素化合物，约0.1重量％至约20重量％的硝酸盐化合物，约为 0.1重量％至约10重量％的乙酸酯化合物，约0.1重量％至约10重量％的环胺化合物，约0重量％至约50重量％的多元醇，剩余的水。

27. 发明申请

US20080188042A1 METHOD OF MANUFACTURING THIN FILM TRANSISTOR PANEL 审中-公开
标题翻译：制造薄膜晶体管面板的方法
公开(公告)号：US20080188042A1
公开(公告)日：2008-08-07
申请号：US11777769
申请日：2007-07-13
申请人： Byeong-Jin LEE , Sang-Gab KIM , Hong-Sick PARK
发明人： Byeong-Jin LEE , Sang-Gab KIM , Hong-Sick PARK
IPC分类号： H01L21/84
CPC分类号： H01L27/1288 , H01L27/124 , H01L29/458 , H01L29/4908
摘要： Provided is a method of manufacturing a thin film transistor panel that may reduce manufacturing costs. The method includes forming gate wires including a gate line and a gate electrode on an insulating substrate and forming data wires including source and drain electrodes, the data wires being insulated from the gate wires. The method further includes forming a passivation layer covering the gate and data wires, forming contact holes exposing the drain electrodes by etching the passivation layer, and forming a pixel electrode by depositing an indium-free transparent conductive film on the exposed drain electrode and the passivation layer and then dry etching the transparent conductive film.
摘要翻译：提供了可以降低制造成本的薄膜晶体管面板的制造方法。该方法包括在绝缘衬底上形成包括栅极线和栅电极的栅极线，并形成包括源极和漏极的数据线，数据线与栅极线绝缘。该方法还包括形成覆盖栅极和数据线的钝化层，形成通过蚀刻钝化层而暴露出漏电极的接触孔，以及通过在暴露的漏电极和钝化层上沉积无铟透明导电膜来形成像素电极然后干燥蚀刻透明导电膜。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式