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21. 发明申请

US20050091578A1 Electronic sticky notes 审中-公开
标题翻译：电子粘笔记
公开(公告)号：US20050091578A1
公开(公告)日：2005-04-28
申请号：US10692017
申请日：2003-10-24
申请人： Vikram Madan , Gerhard Schobbe , Issa Khoury , Richard Swaney , Ryan Cukierman , Wei Zeng , Niels Van Dongen , Matt Lerner , Michael Williams , Joon Kim , Wayne Finlay
发明人： Vikram Madan , Gerhard Schobbe , Issa Khoury , Richard Swaney , Ryan Cukierman , Wei Zeng , Niels Van Dongen , Matt Lerner , Michael Williams , Joon Kim , Wayne Finlay
IPC分类号： G06F17/30 , G06F3/048 , G06F9/06 , G06F9/44 , G06F17/24 , G06F17/21
CPC分类号： G06F17/241
摘要： An electronic version of physical paper sticky notes is defined. The electronic sticky notes may be attached to or embedded in items such as files and folders. The icons representing the items may include indications as to whether an electronic sticky note is attached thereto. The electronic sticky notes may be seamlessly moved between various attachment states and between various locations on a computer screen.
摘要翻译：定义了电子版的物理纸粘滞便笺。电子粘滞便笺可以附加到或嵌入诸如文件和文件夹的项目中。代表项目的图标可以包括关于是否附有电子粘签的指示。电子粘滞便笺可以在各种附件状态之间以及计算机屏幕上的不同位置之间无缝地移动。

22. 发明授权

US6064133A Built-in stator of star-winding mechanism and method of producing the stator and BLDC motor using the same 失效
标题翻译：星形绕组机构的内置定子和使用该定子和BLDC电机的方法
公开(公告)号：US6064133A
公开(公告)日：2000-05-16
申请号：US24061
申请日：1998-02-17
申请人： Byungkyu Kim , Joon Kim
发明人： Byungkyu Kim , Joon Kim
IPC分类号： H02K29/00 , H02K3/12 , H02K3/28 , H02K15/00 , H02K21/24 , H02K29/08 , H02K1/12 , H02K1/22 , H02K11/00
CPC分类号： H02K3/12 , H02K29/08 , H02K21/24
摘要： A stator assembly operated in a 2-phase drive manner including first and second stator coils wound in a star shape with a plurality of projections and a plurality of grooves, and arranged with a predetermined phase difference; and an annular supporting body into which the first and second stator coils are inserted for supporting the coils, insulating them from each other. Each stator coil includes four projections and four grooves, and there is a phase difference .theta. between the first and second stator coils, the difference determined by the following equation: .theta.=360/2P.+-.360/P, wherein P denotes the number of a rotor's magnetic poles. A brushless direct-current motor operated in a 2-phase drive manner includes a stator having first and second stator coils wound in a star shape with a plurality of projections and a plurality of grooves, and arranged with a predetermined phase difference; a shaft rotatably supported on a case; at least one disk-shaped multi-pole rotor supported by the shaft with an air gap from the stator in an axial direction; first and second location sensors provided to the stator with the same phase difference as that of the first and second stator coils for detecting the rotor's magnetic pole; and a driving control circuit driving the first and second stator coils in response to the detection of the magnetic pole of the rotor by the first and second location sensors, wherein said phase difference is determined by the equation: .theta.=360/2P.+-.360/P (P=the number of a rotor's magnetic poles).
摘要翻译：一种以二相驱动方式操作的定子组件，包括以多个突起和多个槽缠绕成星形的第一和第二定子线圈，并以预定的相位差布置; 以及环形支撑体，第一和第二定子线圈插入该支撑体中以支撑线圈，使它们彼此绝缘。每个定子线圈包括四个突起和四个凹槽，并且在第一和第二定子线圈之间存在相位差θ，该差由以下等式确定：θ= 360 / 2P +/- 360 / P，其中P表示转子的磁极。以二相驱动方式工作的无刷直流电动机包括定子，该定子具有卷绕成星形的第一定子线圈和第二定子线圈，该定子线圈具有多个突起和多个槽，并以预定的相位差布置; 可旋转地支撑在壳体上的轴; 至少一个由所述轴支撑的盘形多极转子，其具有沿轴向方向的所述定子的气隙; 提供给定子的第一和第二位置传感器具有与用于检测转子磁极的第一和第二定子线圈相同的相位差; 以及驱动控制电路，其响应于由第一和第二位置传感器检测转子的磁极而驱动第一和第二定子线圈，其中所述相位差由以下等式确定：θ= 360 / 2P +/- 360 / P（P =转子磁极的数量）。

23. 发明授权

US5709945A Spherical heat storage capsule and process for the preparation thereof 失效
标题翻译：球形储热胶囊及其制备方法
公开(公告)号：US5709945A
公开(公告)日：1998-01-20
申请号：US320704
申请日：1994-10-07
申请人： Hyeon Kook Lee , Jung Hwan Park , Oh Ryong Kwon , Joon Kim , Huk Nyun Kim
发明人： Hyeon Kook Lee , Jung Hwan Park , Oh Ryong Kwon , Joon Kim , Huk Nyun Kim
IPC分类号： C09K5/00 , C09K5/06 , B32B1/00
CPC分类号： C09K5/06 , Y10T428/2991 , Y10T428/2998
摘要： A spherical heat storage capsule having improved thermal properties includes a spherical core of a latent heat storage material having a diameter ranging from 0.1 to 10 mm, at least one layer of a hydrophobic wax and one to three layers of polymeric materials.
摘要翻译：具有改进的热性能的球形储热胶囊包括直径范围为0.1-10mm的潜热储存材料的球形芯，至少一层疏水蜡和一至三层聚合材料。

24. 发明授权

US5591675A Interconnecting method for semiconductor device 失效
标题翻译：半导体器件的互连方法
公开(公告)号：US5591675A
公开(公告)日：1997-01-07
申请号：US361835
申请日：1994-12-22
申请人： Jae-woo Kim , Joon Kim , Jin-hong Kim
发明人： Jae-woo Kim , Joon Kim , Jin-hong Kim
IPC分类号： H01L21/28 , H01L21/302 , H01L21/3065 , H01L21/3205 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76804 , Y10S148/161
摘要： An interconnecting method for a semiconductor device is disclosed in which a conductive layer containing aluminum is formed on a lower structure formed on a substrate. An insulating layer is formed on the conductive layer. A photoresist pattern for defining a portion where an opening is to be made is formed on the insulating layer. Then, the insulating layer is isotropically etched by wet etching with the photoresist pattern as an etching mask. The insulating layer remaining after the isotropical etching is taper-etched by RIE to form the opening. To ensure that the conductive layer is exposed by the opening, the resultant structure is overetched by using a mixed gas of fluorocarbon-containing gas and oxygen. This resultant structure is RIE-sputtered using fluorocarbon-containing gas such that polymer or nonvolatile by-products generated when the opening such as a via hole is formed, are completely removed.
摘要翻译：公开了一种用于半导体器件的互连方法，其中在形成在衬底上的下部结构上形成含有铝的导电层。在导电层上形成绝缘层。在绝缘层上形成用于限定要形成开口的部分的光刻胶图形。然后，通过用蚀刻图案作为蚀刻掩模的湿蚀刻来各向同性蚀刻绝缘层。在等温蚀刻之后残留的绝缘层通过RIE进行锥蚀刻以形成开口。为了确保导电层被开口露出，通过使用含氟烃气体和氧气的混合气体对所得结构进行过蚀刻。这种结构的结构是使用含氟烃气体进行RIE溅射，使得形成诸如通孔的开口产生的聚合物或非挥发性副产物被完全去除。

25. 发明申请

US20160071946A1 ELECTRODE STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR DEVICE INCLUDING THE ELECTRODE STRUCTURE 审中-公开
标题翻译：电极结构，其制造方法以及包括电极结构的半导体器件
公开(公告)号：US20160071946A1
公开(公告)日：2016-03-10
申请号：US14940785
申请日：2015-11-13
申请人： Dong-Kak Lee , Joon Kim , Bong-hyun Kim , Han-Jin Lim
发明人： Dong-Kak Lee , Joon Kim , Bong-hyun Kim , Han-Jin Lim
IPC分类号： H01L29/49 , H01L27/108 , H01L29/423 , H01L27/092
CPC分类号： H01L27/092 , H01L21/28044 , H01L21/28061 , H01L21/823835 , H01L21/823842 , H01L27/10808 , H01L27/10823 , H01L27/10873 , H01L29/1037 , H01L29/4236 , H01L29/4238 , H01L29/4925 , H01L29/4933 , H01L29/4941 , H01L29/66575 , H01L29/78
摘要： An electrode structure is disclosed. The electrode structure includes a first polysilicon layer doped with resistance adjustment impurities; a second polysilicon layer for adjusting grains, formed in the first polysilicon layer and doped with grain adjustment impurities; an ohmic metal layer formed on the first and second polysilicon layers; a barrier metal layer formed on the ohmic metal layer; and a metal layer formed on the barrier metal layer.
摘要翻译：公开了电极结构。电极结构包括掺杂有电阻调节杂质的第一多晶硅层; 用于调节晶粒的第二多晶硅层，形成在第一多晶硅层中并掺杂有晶粒调节杂质; 在第一和第二多晶硅层上形成的欧姆金属层; 形成在欧姆金属层上的阻挡金属层; 以及形成在阻挡金属层上的金属层。

26. 发明授权

US07268029B2 Method of fabricating CMOS transistor that prevents gate thinning 有权
标题翻译：制造防止栅极薄化的CMOS晶体管的方法
公开(公告)号：US07268029B2
公开(公告)日：2007-09-11
申请号：US10994042
申请日：2004-11-19
申请人： Eun-kuk Chung , Joon Kim , Suk-Chul Bang , Jong-Sun Ahn , Sang-hoon Lee , Woo-soon Jang , Yung-jun Kim
发明人： Eun-kuk Chung , Joon Kim , Suk-Chul Bang , Jong-Sun Ahn , Sang-hoon Lee , Woo-soon Jang , Yung-jun Kim
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/31111 , H01L21/31144
摘要： Provided is a method of fabricating a CMOS transistor in which, after a polysilicon layer used as a gate is formed on a semiconductor substrate, a photoresist pattern that exposes an n-MOS transistor region is formed on the polysilicon layer. An impurity is implanted in the polysilicon layer of the n-MOS transistor region using the photoresist pattern as a mask, and the photoresist pattern is removed. If the polysilicon layer of the n-MOS transistor region is damaged by the implanting of the impurity, the polysilicon layer of the n-MOS transistor region is annealed, and a p-MOS transistor gate and an n-MOS transistor gate are formed by patterning the polysilicon layer. The semiconductor substrate, the p-MOS transistor gate and the n-MOS transistor gate is cleaned with a hydrofluoric acid (HF) solution, without causing a decrease in height of the n-MOS transistor gate.
摘要翻译：提供一种制造CMOS晶体管的方法，其中在半导体衬底上形成用作栅极的多晶硅层之后，在多晶硅层上形成曝光n-MOS晶体管区的光刻胶图案。使用光致抗蚀剂图案作为掩模，在n-MOS晶体管区域的多晶硅层中注入杂质，除去光致抗蚀剂图案。如果n-MOS晶体管区域的多晶硅层通过注入杂质而损坏，则n-MOS晶体管区域的多晶硅层退火，并且p-MOS晶体管栅极和n-MOS晶体管栅极由构图多晶硅层。用氢氟酸（HF）溶液清洗半导体衬底，p-MOS晶体管栅极和n-MOS晶体管栅极，而不会降低n-MOS晶体管栅极的高度。

27. 发明申请

US20070066143A1 Spring clip connector 有权
标题翻译：弹簧夹连接器
公开(公告)号：US20070066143A1
公开(公告)日：2007-03-22
申请号：US11228968
申请日：2005-09-16
申请人： Mike Lin , Joon Kim
发明人： Mike Lin , Joon Kim
IPC分类号： H01R24/04
CPC分类号： H01R4/4863 , H01R4/489
摘要： Electrical connectors are generally discussed herein with particular discussions on spring clip connectors for connecting wires to electronically link a first audio component to a second audio component. The connectors provided herein incorporate at least one push button, at least one cam, at least one conductor, and at least one biasing member inside a housing. The at least one push button is configured to translate when depressed to then rotate the at least one cam to open a receptacle for receiving a wire. The wire is then placed in contact with the at least one conductor when the at least one push button is released.
摘要翻译：这里通常讨论电连接器，具体讨论用于连接导线以将第一音频部件电连接到第二音频部件的弹簧夹连接器。本文提供的连接器包括至少一个按钮，至少一个凸轮，至少一个导体和至少一个偏置构件。所述至少一个按钮被配置成在被按压时平移，然后旋转所述至少一个凸轮以打开用于接收线的插座。然后当释放至少一个按钮时，将线放置成与至少一个导体接触。

28. 发明申请

US20070048964A1 Three dimensional scaffold and method of fabricating the same 有权
标题翻译：三维支架及其制造方法
公开(公告)号：US20070048964A1
公开(公告)日：2007-03-01
申请号：US11509368
申请日：2006-08-24
申请人： Chin Park , Joon Kim
发明人： Chin Park , Joon Kim
IPC分类号： H01L21/20
CPC分类号： H01L21/20 , B81B2201/058 , B81C1/00111 , C12N2535/10
摘要： A three dimensional scaffold having a three dimensional structure is easily fabricated by employing a lithography process used in a semiconductor manufacturing process. A method of fabricating the same is also disclosed have a conformational structure. In the method of fabricating a three dimensional scaffold having the conformational structure according to the present invention, a first pattern is first formed on a substrate by using a first photoresist through a lithography process, and a temporary photoresist is coated on a whole surface of the substrate. Next, a temporary pattern exposing the upper part of the first pattern to the surface is formed by using the lithography process, and a second photoresist contacting the first pattern via the temporary pattern is coated on the whole surface of the substrate. Subsequently, the temporary pattern is removed after exposing and developing the second photoresist, and then, a second pattern connected to the first pattern is formed with the second photoresist, to thereby obtain the three dimensional scaffold. Accordingly, the present invention can readily fabricate a three dimensional scaffold having a three dimensional structure through a lithography process using a photoresist.
摘要翻译：通过采用在半导体制造工艺中使用的光刻工艺，可以容易地制造具有三维结构的三维支架。还公开了一种制造该方法的方法，其具有构象结构。在制造根据本发明的构象结构的三维支架的方法中，首先通过使用通过光刻工艺的第一光致抗蚀剂在衬底上形成第一图案，并且在整个表面上涂覆临时光致抗蚀剂基质。接下来，通过使用光刻工艺形成将第一图案的上部暴露于表面的临时图案，并且经由临时图案与第一图案接触的第二光致抗蚀剂涂覆在基板的整个表面上。随后，在曝光和显影第二光致抗蚀剂之后去除临时图案，然后用第二光致抗蚀剂形成连接到第一图案的第二图案，从而获得三维支架。因此，本发明可以通过使用光致抗蚀剂的光刻工艺容易地制造具有三维结构的三维支架。

29. 发明申请

US20070007636A1 Parallel chip embedded printed circuit board and manufacturing method thereof 审中-公开
标题翻译：并联芯片嵌入式印刷电路板及其制造方法
公开(公告)号：US20070007636A1
公开(公告)日：2007-01-11
申请号：US11474974
申请日：2006-06-27
申请人： Jin-Yong Ahn , Chang Ryu , Suk-Hyeon Cho , Joon Kim , Han Cho
发明人： Jin-Yong Ahn , Chang Ryu , Suk-Hyeon Cho , Joon Kim , Han Cho
IPC分类号： H01L23/02 , H01L21/00
CPC分类号： H01L21/4857 , H01L23/49822 , H01L23/50 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/24137 , H01L2224/2518 , H01L2224/73267 , H01L2224/82039 , H01L2224/82047 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01078 , H01L2924/01082 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3512 , H05K1/185 , H05K1/186 , H05K3/321 , H05K3/4069 , H05K3/4602 , H05K3/4614 , H05K3/4652 , H05K2201/10522 , H05K2201/10636 , H05K2203/063 , H05K2203/1189 , Y02P70/611 , Y10T29/49128
摘要： A parallel chip embedded printed circuit board and manufacturing method thereof are disclosed. With a method of manufacturing a parallel chip embedded printed circuit board, comprising: (a) forming a parallel chip by connecting in parallel a plurality of unit chips having electrodes or electrically connected members formed on the upper and lower surfaces thereof, using at least one conductive member; (b) joining an electrode on one side of the parallel chip to a first board; and (c) joining an electrode on the other side of the parallel chip to a second board, chips may be embedded in a printed circuit board at a low cost, as a plurality of unit chips can be embedded at once, and a mechanical drill or router can be used instead of a laser drill in perforating the cavity or via holes.
摘要翻译：公开了一种并行芯片嵌入式印刷电路板及其制造方法。利用制造并联芯片嵌入式印刷电路板的方法，其特征在于包括：（a）通过使用至少一个电容器形成平行芯片来并联连接多个单元芯片，所述多个单元芯片具有形成在其上表面和下表面上的电极或电连接构件导电构件; （b）将平行芯片一侧的电极连接到第一板上; 和（c）将平行芯片的另一侧的电极连接到第二板，由于可以一次嵌入多个单元芯片，因此可以以低成本将芯片嵌入印刷电路板中，并且机械钻或者可以使用路由器代替激光钻孔来对空腔或通孔进行穿孔。

30. 发明申请

US20060187218A1 Electromagnetic interference prevention apparatus for flat panel display 有权
标题翻译：用于平板显示器的电磁干扰防止装置
公开(公告)号：US20060187218A1
公开(公告)日：2006-08-24
申请号：US11405434
申请日：2006-04-18
申请人： Sang Hwangbo , Joon Kim
发明人： Sang Hwangbo , Joon Kim
IPC分类号： G09G5/00
CPC分类号： G09G5/18 , G09G5/008 , G09G2330/06 , H05K9/00
摘要： An electromagnetic interference (EMI) prevention apparatus for a flat panel display which is capable of modulating the frequency of an input clock signal using a spread spectrum clocking method to increase the frequency of the clock signal and reduce the amplitude thereof so as to reduce EMI by a clock signal generated from a format converter of the flat panel display. The amount of electromagnetic energy radiated from a signal source of the flat panel display can be reduced to eradicate the root of an EMI problem, thus excluding the use of a conventional shielding plate device.
摘要翻译：一种用于平板显示器的电磁干扰（EMI）防止装置，其能够使用扩频时钟方法调制输入时钟信号的频率，以增加时钟信号的频率并降低其幅度，以便通过从平板显示器的格式转换器产生的时钟信号。可以减少从平板显示器的信号源辐射的电磁能量，以消除EMI问题的根源，从而排除使用传统的屏蔽板装置。

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