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21. 发明申请

US20170075629A1 PRESERVING READ LOOK AHEAD DATA IN AUXILIARY LATCHES 有权
标题翻译：保留阅读在辅助锁存器中的数据
公开(公告)号：US20170075629A1
公开(公告)日：2017-03-16
申请号：US14928188
申请日：2015-10-30
申请人： SanDisk Technologies Inc.
发明人： Abhijeet Manohar , Daniel E. Tuers , Noga Deshe , Vered Kelner , Gadi Vishne , Nurit Appel , Judah Gamliel Hahn
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0679 , G06F12/0246 , G06F12/0862 , G06F2212/7203
摘要： A storage device utilizing read look ahead (RLA) may utilize auxiliary or spare latches as a RLA cache for storing pre-fetch data. The RLA may predict the next commands and do a speculative read to the flash using the latches for RLA storage. The auxiliary/spare latches may be present on a plane or die of non-volatile memory and may be different from the transfer data latch (XDL) that transfers data from the memory and the host. When the XDL is backed up, sense commands may still be performed and the data is stored in the auxiliary latches before being transferred with the XDL.
摘要翻译：利用预读（RLA）的存储设备可以利用辅助或备用锁存器作为用于存储预取数据的RLA高速缓存。 RLA可以预测下一个命令，并使用RLA存储器的锁存器对闪存进行推测性读取。辅助/备用锁存器可以存在于非易失性存储器的平面或管芯上，并且可能不同于从存储器和主机传送数据的传输数据锁存器（XDL）。当XDL被备份时，仍然可以执行感测命令，并且在用XDL传送之前将数据存储在辅助锁存器中。

22. 发明授权

US09459881B2 Storage module and method for improving boot time during block binary searches 有权
标题翻译：存储模块和方法，用于在块二进制搜索期间提高引导时间
公开(公告)号：US09459881B2
公开(公告)日：2016-10-04
申请号：US14278782
申请日：2014-05-15
申请人： SanDisk Technologies Inc.
发明人： Daniel E. Tuers , Dana Lee , Abhijeet Manohar , Yosief Ataklti
IPC分类号： G06F13/10 , G06F9/44 , G06F3/06 , G06F12/02
CPC分类号： G06F9/4401 , G06F3/0601 , G06F12/0246 , G06F2212/1016 , G06F2212/7204 , G06F2212/7206
摘要： A storage controller is configured to find a last-written page in a block in a memory by sending a command to the memory to read a page of data, receiving at least some of the data from that page, and analyzing the at least some of the data from that page to determine if that page is a written page. In one embodiment, the storage controller instructs the memory to read the page of data using a sense time that is shorter than a sense time used to read a page of data in response to a read request from a host controller. Additionally or alternatively, the amount of the data received by the storage controller can be less than the amount of data received when reading a page of data in response to a read request from a host controller.
摘要翻译：存储控制器被配置为通过向存储器发送命令来读取数据页面，从该页面中接收至少一些数据并且分析至少一些数据，从而在存储器中的块中找到最后写入的页面该页面的数据确定该页面是否是一个书面页面。在一个实施例中，存储控制器使用响应于来自主机控制器的读取请求读取数据页面的读取时间短于读取时间来指示存储器读取数据页面。另外或替代地，存储控制器接收的数据量可以小于响应于来自主机控制器的读取请求读取数据页面时接收的数据量。

23. 发明授权

US09431120B1 Memory die and method for efficient use of data latches in serving mixed traffic loads 有权
标题翻译：用于有效利用数据锁存器服务混合流量负载的存储器管芯和方法
公开(公告)号：US09431120B1
公开(公告)日：2016-08-30
申请号：US14665920
申请日：2015-03-23
申请人： SanDisk Technologies Inc.
发明人： Daniel E. Tuers , Anne Pao-Ling Koh , Abhijeet Manohar
IPC分类号： G11C16/04 , G11C16/26 , G11C16/10 , G11C11/16 , G11C11/56
CPC分类号： G11C16/26 , G11C7/106 , G11C11/16 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C2029/0411
摘要： A memory die is provided comprising a non-volatile memory organized in physical pages, a transfer data latch in communication with the non-volatile memory, at least one auxiliary data latch in communication with the transfer data latch, and circuitry. The circuitry is configured to receive a plurality of sense commands, wherein each sense command indicates a physical page in the non-volatile memory to be sensed and a portion of the physical page to be stored in the at least one auxiliary data latch. For each sense command, the circuitry is configured to store data from the physical page sensed by the sense command in the transfer data latch and move data from the portion of the physical page indicated by the sense command to an available location in the at least one auxiliary data latch.
摘要翻译：提供了存储器管芯，其包括组织在物理页面中的非易失性存储器，与非易失性存储器通信的传输数据锁存器，与传送数据锁存器通信的至少一个辅助数据锁存器和电路。电路被配置为接收多个感测命令，其中每个感测命令指示要被感测的非易失性存储器中的物理页面和要存储在该至少一个辅助数据锁存器中的物理页面的一部分。对于每个感测命令，电路被配置为存储来自传感数据锁存器中感测命令感测的物理页面的数据，并将数据从由感测命令指示的物理页面的部分移动到至少一个中的可用位置辅助数据锁存。

24. 发明申请

US20160103732A1 Storage Module and Method for Datapath Bypass 有权
标题翻译：数据路径旁路存储模块和方法
公开(公告)号：US20160103732A1
公开(公告)日：2016-04-14
申请号：US14510892
申请日：2014-10-09
申请人： SanDisk Technologies Inc.
发明人： Daniel E. Tuers , Yoav Weinberg , Yuri Ryabinin
IPC分类号： G06F11/10 , G11C29/52
CPC分类号： G11C29/52 , G06F11/1048 , G11C2029/0411
摘要： A storage module and method for datapath bypass are disclosed. In one embodiment, a storage module begins to perform a read operation that reads a set of code words from the memory and attempts to perform an error detection and correction operation on one of the read code words. In response to determining that the code word has an uncorrectable error, the storage module reads the other code words in the set but bypasses the error detection and correction operation on those other code words. The code word that had the uncorrectable error and the other code words are re-read, wherein at least the code word with the uncorrectable error is re-read with a different read condition. The storage module then attempts to perform the error detection and correction operation on the re-read code words. Other embodiments are provided.
摘要翻译：公开了用于数据路径旁路的存储模块和方法。在一个实施例中，存储模块开始执行从存储器读取一组代码字的读取操作，并尝试对读取的代码字之一执行错误检测和校正操作。响应于确定代码字具有不可校正的错误，存储模块读取集合中的其他代码字，但绕过其他代码字的错误检测和校正操作。重新读取具有不可校正错误的代码字和其他代码字，其中至少具有不可校正错误的代码字以不同的读取条件被重新读取。然后，存储模块尝试对重新读取的代码字执行错误检测和校正操作。提供其他实施例。

25. 发明申请

US20160085464A1 Storage Module and Method for On-Chip Copy Gather 有权
标题翻译：存储模块和片上复制方法
公开(公告)号：US20160085464A1
公开(公告)日：2016-03-24
申请号：US14595939
申请日：2015-01-13
申请人： SanDisk Technologies Inc.
发明人： Daniel E. Tuers , Abhijeet Manohar , Sergei Gorobets
IPC分类号： G06F3/06 , G06F11/10 , G06F11/07
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/064 , G06F3/065 , G06F3/0673 , G06F11/073 , G06F11/076 , G06F11/079 , G06F11/1048 , G06F11/1076 , G11C7/1009 , G11C16/08 , G11C2029/0411 , G11C2207/2236
摘要： A storage module and method for on-chip copy gather are provided. In one embodiment, a storage module is provided with a memory comprising a plurality of word lines and a plurality of data latches. The memory copies data from a first word line into a first data latch and copies data from a second word line into a second data latch. The memory then copies only some of the data from the first data latch and only some of the data from the second data latch into a third data latch. After that, the memory copies the data from the third data latch to a third word line. In another embodiment, a storage module is provided comprising a memory and an on-chip copy gather module. Other embodiments are provided.
摘要翻译：提供了一种用于片上复制收集的存储模块和方法。在一个实施例中，存储模块设置有包括多个字线和多个数据锁存器的存储器。存储器将数据从第一字线复制到第一数据锁存器中，并将数据从第二字线复制到第二数据锁存器中。然后，存储器仅将来自第一数据锁存器的一些数据复制，并且仅将来自第二数据锁存器的一些数据复制到第三数据锁存器中。之后，存储器将数据从第三数据锁存器复制到第三字线。在另一个实施例中，提供了包括存储器和片上复制收集模块的存储模块。提供其他实施例。

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