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    • 23. 发明申请
    • PREDICTIVE ENCODING OF A MULTI CHANNEL SIGNAL
    • 多通道信号的预测编码
    • US20090281798A1
    • 2009-11-12
    • US11915004
    • 2006-05-09
    • Albertus Cornelis Den BrinkerArijit Biswas
    • Albertus Cornelis Den BrinkerArijit Biswas
    • G10L19/04
    • G10L19/008G10L19/06
    • A multi channel encoder (100) comprises a multi channel linear predictive analyzer (105) for linear predictive coding of a multi channel signal. A prediction controller (101) comprises a prediction parameter generator (301) which generates linear prediction coding parameter matrices for the multi channel signal which are then mapped to reflection matrices. The reflection matrices may specifically be normalized backward or forward reflection matrices. The reflection matrices are encoded by a reflection parameter encoder (305) and combined with other encoded data in a multiplexer (109) to generate encoded data for the multi channel signal. The reflection parameter encoder (305) may specifically decompose the reflection matrices using an Eigenvalue decomposition or a singular value decomposition and the resulting data may be quantized for transmission. A decoder (200) receives the encoded data and obtains the prediction parameters by performing the inverse operation.
    • 多通道编码器(100)包括用于多通道信号的线性预测编码的多通道线性预测分析器(105)。 预测控制器(101)包括预测参数生成器(301),该预测参数生成器生成多信道信号的线性预测编码参数矩阵,然后映射到反射矩阵。 反射矩阵可以具体地是归一化的反向或正向反射矩阵。 反射矩阵由反射参数编码器(305)编码并与多路复用器(109)中的其它编码数据组合以产生用于多通道信号的编码数据。 反射参数编码器(305)可以使用特征值分解或奇异值分解来具体地分解反射矩阵,并且可以量化所得到的数据以进行传输。 解码器(200)接收编码数据并通过执行逆运算来获得预测参数。
    • 28. 发明申请
    • DYNAMIC CACHE WRITE POLICY
    • 动态缓存写策略
    • US20140189252A1
    • 2014-07-03
    • US13732301
    • 2012-12-31
    • Arijit Biswas
    • Arijit Biswas
    • G06F12/08
    • G06F12/0884G06F12/0804G06F12/0811G06F12/0815G06F2212/1032
    • A system, processor and method to monitor specific cache events and behavior based on established principles of quantized architectural vulnerability factor (AVF) through the use of a dynamic cache write policy controller. The output of the controller is then used to set the write back or write through mode policy for any given cache. This method can be used to change cache modes dynamically and does not require the system to be rebooted. The dynamic nature of the controller provides the capability of intelligently switching from reliability to performance mode and back as needed. This method eliminates the residency time of dirty lines in a cache, which increases soft errors (SER) resiliency of protected caches in the system and reduces detectable unrecoverable errors (DUE), while keeping implementation cost of hardware at a minimum.
    • 通过使用动态缓存写策略控制器,基于量化架构漏洞因子(AVF)的已建立原则来监视特定缓存事件和行为的系统,处理器和方法。 然后,控制器的输出用于设置任何给定缓存的回写或写模式策略。 此方法可用于动态更改缓存模式,不需要重新启动系统。 控制器的动态特性提供了从可靠性到性能模式智能切换的能力,并根据需要返回。 该方法消除了缓存中脏线的驻留时间,这增加了系统中受保护高速缓存的软错误(SER)弹性,并降低了可检测的不可恢复错误(DUE),同时将硬件的实施成本降到最低。