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21. 发明授权

US4861729A Method of doping impurities into sidewall of trench by use of plasma source 失效
标题翻译：通过使用等离子体源将杂质掺杂到沟槽的侧壁中的方法
公开(公告)号：US4861729A
公开(公告)日：1989-08-29
申请号：US088216
申请日：1987-08-24
申请人： Genshu Fuse , Takashi Hirao , Takashi Ohzone
发明人： Genshu Fuse , Takashi Hirao , Takashi Ohzone
IPC分类号： H01L21/223
CPC分类号： H01L21/2236
摘要： A method in which in order to dope impurities, with excellent controllability, into a sidewall of a trench formed in a semiconductor substrate, plasma is generated in a gas including the impurities and the semiconductor substrate is disposed in or near the plasma, so that the impurities may be doped into the sidewall of the trench uniformly and at high precision of concentration control; wherein one of a duluted B.sub.2 H.sub.6 gas and diluted AsH.sub.3 gas is chosen as the gas of the plasma, whereby one of B and As as the impurities directly enters the sidewall of the trench without first passing through a film.
摘要翻译：为了将具有优异的可控性的杂质掺杂到在半导体衬底中形成的沟槽的侧壁中的方法中，在包括杂质的气体中产生等离子体，并且半导体衬底设置在等离子体中或其附近，使得杂质可以均匀地并且以高精度的浓度控制被掺杂到沟槽的侧壁中; 其中选择一个掺杂的B2H6气体和稀释的AsH3气体作为等离子体的气体，由此作为杂质的B和As中的一个直接进入沟槽的侧壁，而不首先通过膜。

22. 发明授权

US4800174A Method for producing an amorphous silicon semiconductor device using a multichamber PECVD apparatus 失效
标题翻译：使用多室PECVD装置制造非晶硅半导体器件的方法
公开(公告)号：US4800174A
公开(公告)日：1989-01-24
申请号：US50699
申请日：1987-05-18
申请人： Shinichiro Ishihara , Masatoshi Kitagawa , Takashi Hirao
发明人： Shinichiro Ishihara , Masatoshi Kitagawa , Takashi Hirao
IPC分类号： H01L21/205 , C23C16/24 , C23C16/54 , H01L31/04
CPC分类号： C23C16/54 , C23C16/24 , Y10S148/025 , Y10S148/045 , Y10S148/072 , Y10S438/908
摘要： A method of producing an amorphous silicon semiconductor device makes use of a capacitance-coupled high-frequency glow-discharge semiconductor production apparatus which is equipped with a plurality of glow-discharge chambers each having a high-frequency electrode and a substrate holder opposing each other and means for supplying material gases to the glow-discharge chambers. A reaction of a material gas is effected in a first glow-discharge chamber, so as to form a semiconductor layer having a first conductivity type on a substrate introduced into the first glow-discharge chamber, and, after moving the substrate into a second glow-discharge chamber, a reaction of a material gas different from the material gas used in the first glow-discharge chamber is effected, thereby forming a semiconductor layer having a second conductivity type on the semiconductor layer of the first conductivity type. The substrate with the semiconductor layer of the first conductivity formed thereon is moved from the first glow-discharge chamber to the second glow-discharge chamber after a predetermined gas atmosphere is formed in the first glow-discharge chamber. The distance between the electrode and the substrate holder is made smaller in one of the first and second glow-discharge chambers which is designed for forming the thicker one of the semiconductor layers of the first and second conductivity types than in the other of the first and second glow-discharge chambers. The temperature of the substrate is set higher in one of the first and second glow-discharge chambers which is designed for forming the thicker one of the semiconductor layers of the first and second conductivity types than in the other of the first and second glow-discharge chambers.
摘要翻译：一种非晶硅半导体器件的制造方法采用电容耦合高频辉光放电半导体制造装置，该装置配备有多个辉光放电室，每个辉光放电室具有彼此相对的高频电极和衬底保持器以及用于将材料气体供应到辉光放电室的装置。在第一辉光放电室中进行材料气体的反应，以便在引入第一辉光放电室的衬底上形成具有第一导电类型的半导体层，并且在将衬底移动到第二发光进行与第一辉光放电室中使用的材料气体不同的原料气体的反应，由此在第一导电型半导体层上形成具有第二导电类型的半导体层。在第一辉光放电室中形成规定的气体气氛之后，将形成有第一导电性的半导体层的基板从第一辉光放电室向第二辉光放电室移动。在第一和第二辉光放电室之一中，电极和衬底保持器之间的距离较小，被设计用于形成第一和第二导电类型的较厚的一个半导体层，而不是第一和第二导电类型中的另一个，第二个辉光放电室。第一和第二辉光放电室之一的衬底的温度被设定为高于在第一和第二辉光放电中的另一个中形成第一和第二导电类型的较厚的一个半导体层的第一和第二辉光放电室房间。

23. 发明授权

US09251055B2 Memory system and control method of memory system 有权
标题翻译：内存系统和内存系统的控制方法
公开(公告)号：US09251055B2
公开(公告)日：2016-02-02
申请号：US13599087
申请日：2012-08-30
申请人： Shinji Yonezawa , Takashi Hirao , Hirokuni Yano , Mitsunori Tadokoro , Hiroki Matsudaira , Akira Sawaoka
发明人： Shinji Yonezawa , Takashi Hirao , Hirokuni Yano , Mitsunori Tadokoro , Hiroki Matsudaira , Akira Sawaoka
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7205 , G06F2212/7209 , G11C2211/5641
摘要： A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied.
摘要翻译：实施例中的存储器系统包括存储用户数据的非易失性半导体存储器，正向查找地址转换表和反向查找地址转换表以及控制器。控制器被配置为基于这两个表来确定存储在非易失性半导体存储器中的用户数据有效或无效。控制器可以执行数据组织，选择确定有效的数据并在新的块中重写数据。控制器可以以预定的比例交替地对新的块执行写入处理和重写处理。当条件满足时，控制器可以基于写入请求中包括的地址和写入数据来确定是否满足预定条件，并且当条件不满足时将控制器写入SLC模式中的数据。

24. 发明授权

US07981734B2 Manufacturing method of thin film transistor including low resistance conductive thin films 有权
标题翻译：包括低电阻导电薄膜的薄膜晶体管的制造方法
公开(公告)号：US07981734B2
公开(公告)日：2011-07-19
申请号：US12499559
申请日：2009-07-08
申请人： Mamoru Furuta , Takashi Hirao , Hiroshi Furuta , Tokiyoshi Matsuda , Takahiro Hiramatsu , Hiromitsu Ishii , Hitoshi Hokari , Motohiko Yoshida
发明人： Mamoru Furuta , Takashi Hirao , Hiroshi Furuta , Tokiyoshi Matsuda , Takahiro Hiramatsu , Hiromitsu Ishii , Hitoshi Hokari , Motohiko Yoshida
IPC分类号： H01L21/302
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/42384 , H01L29/66969 , H01L29/78606 , H01L29/78618
摘要： A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.
摘要翻译：薄膜晶体管的制造方法包括在基板上形成一对源极/漏极，使得源极/漏极在其间限定间隙; 在源/漏电极上形成限定它们之间的间隙的低电阻导电薄膜; 以及在低电阻导电薄膜的上表面和限定在低电阻导电薄膜之间的间隙中形成氧化物半导体薄膜层，使得氧化物半导体薄膜层用作沟道。蚀刻低电阻导电薄膜和氧化物半导体薄膜层，使得电阻导电薄膜的侧表面和氧化物半导体薄膜层的相应侧表面在沟道的沟道宽度方向上彼此重合。栅电极安装在氧化物半导体薄膜层上。

25. 发明申请

US20080280304A1 METHOD FOR DETECTING TARGET PLANT GENUS 有权
标题翻译：检测目标植物基因的方法
公开(公告)号：US20080280304A1
公开(公告)日：2008-11-13
申请号：US12139701
申请日：2008-06-16
申请人： Takashi Hirao , Masayuki Hiramoto
发明人： Takashi Hirao , Masayuki Hiramoto
IPC分类号： C12Q1/68
CPC分类号： C12Q1/6895
摘要： A method for detecting species in a target plant genus comprises the steps of conducting PCR using at least one member selected from the group consisting of primers (A) and (B), which can hybridize under stringent conditions to a nucleic acid molecule having a common nucleotide sequence for all species in the target plant genus in 45S rRNA precursor gene sequence thereof, wherein 3′ end of primer (A) can complementarily bind to a base in ITS-1 sequence of the target plant genus when the primer hybridizes to the nucleic acid molecule while 3′ end of primer (B) can complementarily bind to a base in ITS-2 sequence of the target plant genus when the primer hybridizes to the nucleic acid molecule, and identifying the presence of the resulting amplification product from PCR containing at least a part of ITS-1 or ITS-2 sequence of the target plant genusThe method for detecting species in a target plant genus, particularly an allergenic plant genus such as the genus Fagopyrum, can make it possible to detect with high sensitivity, for example, about 1 ppm of the plant(s) in cases where the plant(s) is contained in a food ingredient or food product.
摘要翻译：一种用于检测目标植物属物种的方法，包括以下步骤：使用选自引物（A）和（B）中的至少一种成员进行PCR，其可在严格条件下与具有共同的核酸分子杂交在45S rRNA前体基因序列中的目标植物属中的所有物种的核苷酸序列，其中引物（A）的3'末端可以在引物与核酸杂交时与靶植物属的ITS-1序列中的碱基互补结合酸分子，而当引物与核酸分子杂交时，引物（B）的3'末端可以与靶植物属的ITS-2序列中的碱基互补结合，并且从PCR中鉴定所得扩增产物的存在，目标植物属的ITS-1或ITS-2序列的至少一部分目标植物属，特别是过敏原植物属如禾本科属的物种的检测方法可以使其成为pos 可以以高灵敏度检测，例如在植物包含在食物成分或食品中的情况下，约1ppm的植物。

26. 发明申请

US20070278490A1 Semiconductor device including active layer of zinc oxide with controlled crystal lattice spacing and manufacturing method thereof 失效
标题翻译：包括具有受控晶格间距的氧化锌的有源层的半导体器件及其制造方法
公开(公告)号：US20070278490A1
公开(公告)日：2007-12-06
申请号：US11809858
申请日：2007-06-01
申请人： Takashi Hirao , Takahiro Hiramatsu , Mamoru Furuta , Hiroshi Furuta , Tokiyoshi Matsuda
发明人： Takashi Hirao , Takahiro Hiramatsu , Mamoru Furuta , Hiroshi Furuta , Tokiyoshi Matsuda
IPC分类号： H01L29/04
CPC分类号： H01L29/7869 , H01L29/04 , H01L29/045 , H01L29/78618
摘要： A semiconductor device includes an oxide semiconductor thin film layer of zinc oxide. The (002) lattice planes of at least a part of the oxide semiconductor thin film layer have a preferred orientation along a direction perpendicular to a substrate of the semiconductor device and a lattice spacing d002 of at least 2.619 Å.
摘要翻译：半导体器件包括氧化锌的氧化物半导体薄膜层。氧化物半导体薄膜层的至少一部分的（002）晶格面沿着与半导体器件的衬底垂直的方向具有优选的取向，晶格间距d 002至少为2.619 一个。

27. 发明授权

US6123774A Apparatus and method of manufacturing semiconductor element 失效
标题翻译：半导体元件制造装置及其制造方法
公开(公告)号：US6123774A
公开(公告)日：2000-09-26
申请号：US867487
申请日：1997-06-02
申请人： Takashi Hirao , Akihisa Yoshida , Masatoshi Kitagawa
发明人： Takashi Hirao , Akihisa Yoshida , Masatoshi Kitagawa
IPC分类号： H01L21/00 , H01L21/205 , H01L21/223 , H01L21/265 , H01L21/28 , H01L21/336 , H01J37/00
CPC分类号： H01L21/2236 , H01L21/67213 , H01L29/66765
摘要： A large area semiconductor element can be manufactured with high productivity, which has low electric resistance at the boundary face of a metal and a semiconductor and has excellent characteristics and reliability. A manufacturing apparatus comprises an ion irradiation means for simultaneously irradiating hydrogen ions and ions containing an element serving as a dopant of a semiconductor to a semiconductor film or a substrate in an atmosphere under reduced pressure, and a film forming means which forms a thin film or a heat treatment means which conducts a heat treatment without exposing a sample to an air. When a sample having an a-Si:H thin film is brought into a sample preparation chamber by opening a gate valve, the chamber is exhausted to have the inside pressure of 10.sup.2 to 10.sup.-3 Pa. Then, the sample is forwarded to an ion irradiation chamber from the sample preparation chamber via an intermediate chamber of which the pressure is maintained in the range of 10.sup.-3 to 10.sup.-7 Pa, and ions such as phosphous are irradiated. After the ion irradiation, a gate valve is opened to transfer the sample to the intermediate chamber, and then a gate valve is opened to forward the sample to a deposition chamber. Subsequently, Ar gas is let in to the deposition chamber and a metal film of Al/Ti is deposited by a sputtering method. After the deposition, the sample is forwarded to a sample carry-out chamber via the intermediate chamber.
摘要翻译：可以以高生产率制造大面积半导体元件，其在金属和半导体的边界面处具有低电阻并且具有优异的特性和可靠性。一种制造装置包括：离子照射装置，用于在减压下的气氛中同时向半导体膜或基板中含有含有半导体的掺杂剂的氢离子和离子的离子和离子;以及成膜装置，其形成薄膜或进行热处理而不将样品暴露于空气的热处理装置。当通过打开闸阀将具有a-Si：H薄膜的样品送入样品制备室时，将室排出至内部压力为102至10 -3 Pa，然后将样品送至离子照射室从样品制备室经过其中压力保持在10 -3至10 -7 Pa的范围的中间室，并且照射诸如磷的离子。在离子照射之后，打开闸阀以将样品转移到中间室，然后打开闸阀以将样品转移到沉积室。随后，将Ar气体进入沉积室，通过溅射法沉积Al / Ti的金属膜。沉积后，样品通过中间室送到样品进样室。

28. 发明授权

US5976919A Apparatus and method of manufacturing semiconductor element 失效
公开(公告)号：US5976919A
公开(公告)日：1999-11-02
申请号：US905052
申请日：1997-08-01
申请人： Takashi Hirao , Akihisa Yoshida , Masatoshi Kitagawa
发明人： Takashi Hirao , Akihisa Yoshida , Masatoshi Kitagawa
IPC分类号： H01L21/00 , H01L21/223 , H01L21/336 , H01L21/265 , H01L21/786
CPC分类号： H01L21/67213 , H01L21/2236 , H01L29/66765
摘要： A large area semiconductor element can be manufactured with high productivity, which has low electric resistance at the boundary face of a metal and a semiconductor and has excellent characteristics and reliability. A manufacturing apparatus comprises an ion irradiation means for simultaneously irradiating hydrogen ions and ions containing an element serving as a dopant of a semiconductor to a semiconductor film or a substrate in an atmosphere under reduced pressure, and a film forming means which forms a thin film or a heat treatment means which conducts a heat treatment without exposing a sample to an air. When a sample having an a-Si:H thin film is brought into a sample preparation chamber by opening a gate valve, the chamber is exhausted to have the inside pressure of 10.sup.2 to 10.sup.-3 Pa. Then, the sample is forwarded to an ion irradiation chamber from the sample preparation chamber via an intermediate chamber of which the pressure is maintained in the range of 10.sup.-3 to 10.sup.-7 Pa, and ions such as phosphous are irradiated. After the ion irradiation, a gate valve is opened to transfer the sample to the intermediate chamber, and then a gate valve is opened to forward the sample to a deposition chamber. Subsequently, Ar gas is let in to the deposition chamber and a metal film of Al/Ti is deposited by a sputtering method. After the deposition, the sample is forwarded to a sample carry-out chamber via the intermediate chamber.

29. 发明授权

US5612536A Thin film sensor element and method of manufacturing the same 失效
标题翻译：薄膜传感器元件及其制造方法
公开(公告)号：US5612536A
公开(公告)日：1997-03-18
申请号：US374989
申请日：1995-01-19
申请人： Hideo Torii , Takeshi Kamada , Shigenori Hayashi , Ryoichi Takayama , Takashi Hirao , Masumi Hattori
发明人： Hideo Torii , Takeshi Kamada , Shigenori Hayashi , Ryoichi Takayama , Takashi Hirao , Masumi Hattori
IPC分类号： G01P15/08 , G01P15/09 , H01L41/29 , G01J5/10
CPC分类号： G01P15/0922 , G01P15/0802 , H01L41/0478 , H01L41/0815 , H01L41/313 , Y10T29/42 , Y10T29/4981
摘要： A thin film sensor element includes a sensor holding substrate having an opening part and a multilayer film adhered thereon at least consisting of an electrode film A, an electrode film B having (100) plane orientation, and a piezoelectic dielectric oxide film present between the electrode film A and the electrode film B. As a result, a thin film sensor element which is small, light, highly accurate, and inexpensive can be attained which can be used for an acceleration sensor element and a pyroelectric infrared sensor element. On the surface of a flat plate KBr substrate, a rock-salt crystal structure oxide of a conductive NiO is formed by a plasma MOCVD method whose vertical direction is crystal-oriented to direction against the substrate surface. By means of a sputtering method, a PZT film is formed by an epitaxial growth on that surface, and a Ni-Cr electrode film is formed thereon. Next, the multilayer film structure is reversed and adhered to a sensor substrate having an opening part with an adhesive. After a connection electrode is connected, the whole structure is washed with water, thereby removing the KBr substrate.
摘要翻译：薄膜传感器元件包括：具有开口部的传感器保持基板和附着在其上的多层膜，至少由电极膜A，具有（100）面取向的电极膜B和存在于电极之间的压电电介质氧化膜膜A和电极膜B.结果，可以获得可用于加速度传感器元件和热电型红外线传感器元件的小，轻，高精度和便宜的薄膜传感器元件。在平板KBr基板的表面上，通过等离子体MOCVD方法形成导电NiO的岩盐晶体结构氧化物，其垂直方向相对于衬底表面<100>晶体取向。通过溅射法，在该表面上通过外延生长形成PZT膜，在其上形成Ni-Cr电极膜。接下来，将多层膜结构反转并粘接到具有开口部的粘合剂的传感器基板。连接电极连接后，整个结构用水清洗，从而除去KBr基板。

30. 发明授权

US5470398A Dielectric thin film and method of manufacturing same 失效
标题翻译：介电薄膜及其制造方法
公开(公告)号：US5470398A
公开(公告)日：1995-11-28
申请号：US763674
申请日：1991-09-23
申请人： Munehiro Shibuya , Masatoshi Kitagawa , Takeshi Kamada , Takashi Hirao
发明人： Munehiro Shibuya , Masatoshi Kitagawa , Takeshi Kamada , Takashi Hirao
IPC分类号： C23C16/40 , H01L21/02 , H01L21/312
CPC分类号： H01L28/40 , C23C16/401
摘要： A dielectric film is provided which may be used as an insulating layer of a capacitor of a semiconductor DRAM. The dielectric film is comprised of three elements, namely, titanium, silicon and oxygen. The dielectric film has a high dielectric constant and a small leakage current. The film is manufactured from the raw materials of titanium chloride and silicon hydride, and at least one of O.sub.2, N.sub.2 O, and a mixture of O.sub.2 and N.sub.2 O by plasma-decomposing the raw materials with the application of a strong electric field.
摘要翻译：提供了可以用作半导体DRAM的电容器的绝缘层的电介质膜。电介质膜由三种元素组成，即钛，硅和氧。电介质膜具有高的介电常数和较小的漏电流。该薄膜由氯化钛和氢化硅的原料以及O 2，N 2 O以及O 2和N 2 O的混合物中的至少一种制成，通过施加强电场等离子体分解原料。

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