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    • 23. 发明授权
    • High speed semiconductor memory having a direct-bypass signal path
    • 具有直接旁路信号路径的高速半导体存储器
    • US5146427A
    • 1992-09-08
    • US825782
    • 1992-01-21
    • Katsuro SasakiNobuyuki MoriwakiShigeru HonjoHideaki Nakamura
    • Katsuro SasakiNobuyuki MoriwakiShigeru HonjoHideaki Nakamura
    • G11C7/10
    • G11C7/1006G11C7/1051
    • In a semiconductor memory, a latch circuit is arranged between the outputs of a sense amplifier and the inputs of a data output buffer. First pass-gates are arranged between the outputs of the sense amplifier and the latch circuit, while second pass-gates are arranged between the latch circuit and the inputs of the data output buffer. The outputs of the sense amplifier are transmitted to the inputs of the data output buffer through signal paths which bypass the first pass-gates, the latch circuit and the second pass-gates, whereby the data output buffer generates a data output quickly. Thereafter, the first pass-gates and the second pass-gates are controllably brought to a signal-through condition, whereby the output information items of the sense amplifier are stored in the latch circuit. The data output buffer holds the data output in conformity with the stored information items of the latch circuit. For a period of time for which the data output buffer holds the data output, the sense amplifier is held in a non-activated condition, so that the power consumption of the semiconductor memory is lowered.
    • 在半导体存储器中,锁存电路布置在读出放大器的输出端和数据输出缓冲器的输入端之间。 第一通过门被布置在读出放大器和锁存电路的输出之间,而第二通过门被布置在锁存电路和数据输出缓冲器的输入之间。 读出放大器的输出通过旁路第一通过门,锁存电路和第二传递门的信号路径被发送到数据输出缓冲器的输入,从而数据输出缓冲器快速产生数据输出。 此后,第一通过门和第二通过门被可控地带到信号通过状态,由此将读出放大器的输出信息项存储在锁存电路中。 数据输出缓冲器保存符合存储的锁存电路的信息项的数据输出。 在数据输出缓冲器保持数据输出的一段时间内,读出放大器保持在非激活状态,从而降低了半导体存储器的功耗。
    • 28. 发明申请
    • Sensor Chip and Sensor Chip Production Method
    • 传感器芯片和传感器芯片生产方法
    • US20090257917A1
    • 2009-10-15
    • US12083694
    • 2006-10-16
    • Hideaki NakamuraMasao GotohTomoko IshikawaIsao KarubeToshifumi HosoyaShingo KaimoriMoriyasu Ichino
    • Hideaki NakamuraMasao GotohTomoko IshikawaIsao KarubeToshifumi HosoyaShingo KaimoriMoriyasu Ichino
    • B01J19/00B32B37/00
    • G01N27/3271Y10T156/1051
    • It is intended to provide a sensor chip which has a small size and is easily produced and capable of determining quantities of at least two components of multiple samples rapidly, conveniently, and correctly as well as to provide a production method capable of producing the sensor chip easily and with high productivity.A sensor chip includes a substrate, a cover layer, a spacer layer sandwiched between the substrate and the cover layer, multiple reaction portions disposed between the substrate and the cover layer, multiple detection units exposed in the hollow reaction portions, and a sample inlet communicated with the hollow reaction portions and a method for producing the sensor chip.A sensor chip includes two substrates opposed to each other, a spacer layer sandwiched between the substrates, and multiple measurement units disposed between the substrates and including two or more hollow reaction portions that share one sample inlet opened on outer surfaces of the substrates and detection electrode units respectively exposed in the hollow reaction portions and a method for producing the sensor chip.
    • 本发明旨在提供一种具有体积小且容易制造且能够快速,方便和正确地确定多个样品的至少两个组分的量的传感器芯片,以及提供能够生产传感器芯片的制造方法 容易和高生产力。 传感器芯片包括衬底,覆盖层,夹在衬底和覆盖层之间的间隔层,设置在衬底和覆盖层之间的多个反应部分,暴露在中空反应部分中的多个检测单元和连通的样品入口 中空反应部分和传感器芯片的制造方法。 传感器芯片包括彼此相对的两个基板,夹在基板之间的间隔层和设置在基板之间的多个测量单元,并且包括两个或更多个中空反应部分,其共享在基板的外表面上开放的一个样品入口和检测电极 分别暴露在中空反应部分中的单元和传感器芯片的制造方法。