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21. 发明授权

US4935977A Leaf spring 失效
标题翻译：板簧
公开(公告)号：US4935977A
公开(公告)日：1990-06-26
申请号：US205678
申请日：1988-06-12
申请人： Junji Yamada
发明人： Junji Yamada
IPC分类号： A47C23/06
CPC分类号： A47C23/06
摘要： A leaf spring includes a plate having a thickness of between approximately 5 mm and 20 mm, a width of between approximately 20 mm and 200 mm, and a given length. The plate is arcuately deformed so that it includes a central portion with a height of between 20 mm and 40 mm. The plate exhibits a predetermined resiliency for maintaining the plate in a substantially horizontal position under a load of between 5 kg and 30 kg and for preventing the plate from breaking under a load of between 50 kg and 100 kg. Further, the plate includes first and second layers made of glass-fiber or carbon-fiber and a core member made of a polyurethane foam material positioned between the first and second layers.
摘要翻译：板簧包括厚度在约5mm和20mm之间的板，宽度在大约20mm与200mm之间的板和给定的长度。该板弧形变形，使其包括高度在20mm和40mm之间的中心部分。该板具有预定的弹性，用于在5kg和30kg之间的载荷下将板保持在基本上水平的位置，并且防止板在50kg和100kg之间的载荷下破裂。此外，该板包括由玻璃纤维或碳纤维制成的第一和第二层以及由位于第一和第二层之间的聚氨酯泡沫材料制成的芯构件。

22. 发明授权

US4880986A System for measuring radiation doses using fluorescent dosemeters 失效
标题翻译：使用荧光剂量计测量辐射剂量的系统
公开(公告)号：US4880986A
公开(公告)日：1989-11-14
申请号：US250245
申请日：1988-09-28
申请人： Junji Yamada , Yasushi Mawatari , Toru Ikegami , Koichi Nishio , Motoyuki Sato , Bertram Burgkhardt , Ernst Piesch , Siegfried Ugi
发明人： Junji Yamada , Yasushi Mawatari , Toru Ikegami , Koichi Nishio , Motoyuki Sato , Bertram Burgkhardt , Ernst Piesch , Siegfried Ugi
IPC分类号： G01T1/06 , G01T1/10 , G01T1/115 , G01T7/08
CPC分类号： G01T1/06 , G01T1/10 , G01T7/08
摘要： A radiation dose measuring system using fluorescent dosemeters comprises fluorescent dosemeters including fluorescent glass elements having a fluorescent detection surface, a magazine capable of holding a predetermined number of fluorescent dosemeters, a magazine conveying device for conveying a magazine of a plurality of magazines fed one by one such that is predetermined segment is located to a take-out position, a fluorescent dosemeter take-out device for taking the fluorescent dosemeter from the magazine located in a predetermined position, a fluorescent glass element setting device for moving the fluorescent glass element to a predetermined measuring position and a dose measuring device for subjecting the fluorescent glass element which is set to a measuring position to an ultraviolet ray and for measuring an intensity of fluorescent light which is emitted from an excited glass element.
摘要翻译：使用荧光剂量计的放射剂量测量系统包括荧光剂量计，包括具有荧光检测表面的荧光玻璃元件，能够保持预定数量的荧光剂量计的储器;用于输送一个接一个地供给的多个杂志的杂志的杂志传送装置使得预定片段位于取出位置，用于从位于预定位置的盒中取出荧光剂量计的荧光剂量计取出装置，用于将荧光玻璃元件移动到预定位置的荧光玻璃元件调节装置测量位置和剂量测量装置，用于对设置在测量位置的荧光玻璃元件进行紫外线测量并测量从激发的玻璃元件发射的荧光强度。

23. 发明授权

US07894293B2 Memory bank arrangement for stacked memory 有权
标题翻译：存储器堆栈堆叠存储器
公开(公告)号：US07894293B2
公开(公告)日：2011-02-22
申请号：US11560898
申请日：2006-11-17
申请人： Hiroaki Ikeda , Kayoko Shibata , Junji Yamada
发明人： Hiroaki Ikeda , Kayoko Shibata , Junji Yamada
IPC分类号： G11C8/00
CPC分类号： G11C5/025
摘要： In a three-dimensional stacked memory having through electrodes, no optimal layer arrangement, bank arrangement, control methods have been established, and thus optimal methods are desired to be established. A stacked memory includes memory core layers, an interposer, and an IF chip. By stacking memory core layers having the same arrangement, it is possible to cope with both of no-parity operation and parity operation. Further, bank designation irrespective of the number of stacks of the memory core layers can be achieved by assignment of a row address and a bank address. Further, the IF chip has refresh counters for performing a refresh control of the stacked memory. This arrangement provides a stacked memory including stacked memory core layers having through electrodes.
摘要翻译：在具有通过电极的三维堆叠存储器中，没有建立最优层布置，库布置，控制方法，因此希望建立最佳方法。堆叠存储器包括存储器核心层，插入器和IF芯片。通过堆叠具有相同配置的存储器核心层，可以处理无奇偶校验操作和奇偶校验操作两者。此外，可以通过分配行地址和银行地址来实现与存储器核心层的堆栈数无关的库指定。此外，IF芯片具有用于执行堆叠存储器的刷新控制的刷新计数器。这种布置提供了包括具有通过电极的堆叠的存储器芯层的堆叠存储器。

24. 发明授权

US07773236B2 Image forming processing circuit and image forming apparatus 失效
标题翻译：图像形成处理电路和图像形成装置
公开(公告)号：US07773236B2
公开(公告)日：2010-08-10
申请号：US11421735
申请日：2006-06-01
申请人： Junji Yamada
发明人： Junji Yamada
IPC分类号： G06F3/12 , G06K15/00
CPC分类号： H04N1/32561 , H04N1/00885 , H04N1/00896 , H04N1/32571 , H04N2201/0094
摘要： An image forming processing circuit and an image forming apparatus having a clock stop function of the invention perform, in an image forming processing process, supply of a clock for processing only in a period in which the clock is required and stop the supply of the clock for processing in a period in which the clock for processing is not required. An ASIC itself realizes a low power consumption function (a clock stop function) without requiring control from a CPU or the like as in the conventional sleep function. Thus, it is possible to effectively reduce power consumption of the ASIC compared with that in the past.
摘要翻译：具有本发明的时钟停止功能的图像形成处理电路和图像形成装置在图像形成处理处理中仅在需要时钟的时段中提供用于处理的时钟，并停止提供时钟用于在不需要处理时钟的时间段内进行处理。 ASIC本身实现了低功耗功能（时钟停止功能），而不需像常规睡眠功能那样从CPU等进行控制。因此，与以往相比，可以有效地降低ASIC的功耗。

25. 发明授权

US07483317B2 Laminated memory having autonomically and sequentially activating operation 失效
标题翻译：具有自主且依次激活操作的层压存储器
公开(公告)号：US07483317B2
公开(公告)日：2009-01-27
申请号：US11690032
申请日：2007-03-22
申请人： Hiroaki Ikeda , Junji Yamada
发明人： Hiroaki Ikeda , Junji Yamada
IPC分类号： G11C11/00
CPC分类号： G11C5/04 , G11C5/02 , G11C5/063 , G11C8/18 , H01L25/0657 , H01L27/0688 , H01L27/105 , H01L2924/0002 , H01L2924/00
摘要： In a laminated memory, each of memory core layers includes a delay circuit having a period of delay time corresponding to a period of operation time of an internal memory circuit portion thereof. A memory core layer, which is input with a simultaneous operation signal, operates in response to the input operation signal. The delay circuit includes an autonomically and sequentially activating function for sending an operation signal to a next stage after the period of delay time passes.
摘要翻译：在层叠存储器中，每个存储核心层包括具有对应于其内部存储器电路部分的操作时间周期的延迟时间的延迟电路。输入同时操作信号的存储核心层响应于输入操作信号而工作。延迟电路包括在延迟时间过去之后将操作信号发送到下一级的自动和顺序启动功能。

26. 发明申请

US20060220235A1 Semiconductor device and insulating substrate for the same 有权
标题翻译：半导体器件和绝缘基板相同
公开(公告)号：US20060220235A1
公开(公告)日：2006-10-05
申请号：US11332539
申请日：2006-01-17
申请人： Junji Yamada
发明人： Junji Yamada
IPC分类号： H01L23/34
CPC分类号： H01L23/3735 , H01L2924/0002 , H05K1/0306 , H05K3/0061 , H05K3/341 , H05K2201/0394 , H05K2201/0397 , Y02P70/613 , H01L2924/00
摘要： A semiconductor device including: an insulating substrate including a ceramic substrate having first and second principal surfaces, a first metallic conductor fixed on the first principal surface, and a second metallic conductor fixed on the second principal surface; a semiconductor element disposed on the first metallic conductor on the first principal surface; and a base plate connected to the second metallic conductor on the second principal surface, and on which the insulating substrate being disposed. The second metallic conductor includes a joint area connected to the second principal surface, and a non-joint area formed around the joint area.
摘要翻译：一种半导体器件，包括：绝缘基板，包括具有第一和第二主表面的陶瓷基板，固定在所述第一主表面上的第一金属导体和固定在所述第二主表面上的第二金属导体; 半导体元件，设置在所述第一主表面上的所述第一金属导体上; 以及与所述第二主表面上的所述第二金属导体连接的基板，所述绝缘基板设置在所述基板上。第二金属导体包括连接到第二主表面的接合区域和形成在接合区域周围的非接合区域。

27. 发明授权

US07109538B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07109538B2
公开(公告)日：2006-09-19
申请号：US10696580
申请日：2003-10-30
申请人： Shuichi Takahashi , Fumiko Shikakura , Shinya Mori , Junji Yamada , Yutaka Yamada , Toshimitsu Taniguchi
发明人： Shuichi Takahashi , Fumiko Shikakura , Shinya Mori , Junji Yamada , Yutaka Yamada , Toshimitsu Taniguchi
IPC分类号： H01L29/76
CPC分类号： H01L27/11226 , H01L27/112
摘要： A nonvolatile semiconductor memory device includes a plurality of memory transistors, a plurality of insulating layers disposed over the transistors, and a plurality of metal layers. Each of the metal layers is disposed on one of the insulating layers. The device also includes a plurality of metal plugs disposed over corresponding memory transistors. Each of the metal plugs filling in a contact hole formed in one of the insulating layers and electrically connecting the metal layers disposed on a top side and a bottom side of the corresponding insulating layer. A top metal layer of the plurality of metal layers is configured to provide bit lines that correspond to the memory transistors, the metal plugs are vertically aligned, and one of the insulating layers is configured so that whether one of the memory transistors is connected to a corresponding bit line is determined by whether a metal plug corresponding to the memory transistor exists in the insulating layer.
摘要翻译：非易失性半导体存储器件包括多个存储晶体管，设置在晶体管上的多个绝缘层，以及多个金属层。每个金属层设置在一个绝缘层上。该装置还包括设置在对应的存储晶体管上的多个金属插头。每个金属插塞填充在形成在一个绝缘层中的接触孔中，并电连接设置在相应绝缘层的顶侧和底侧的金属层。多个金属层的顶部金属层被配置为提供与存储晶体管相对应的位线，金属插塞垂直对齐，并且其中一个绝缘层被配置为使得存储晶体管中的一个连接到相应的位线由绝缘层中是否存在与存储晶体管相对应的金属插塞来确定。

28. 发明授权

US07087990B2 Power semiconductor device 有权
标题翻译：功率半导体器件
公开(公告)号：US07087990B2
公开(公告)日：2006-08-08
申请号：US09954149
申请日：2001-09-18
申请人： Junji Yamada
发明人： Junji Yamada
IPC分类号： H01L23/48
CPC分类号： H01L24/40 , H01L23/49844 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2224/48091 , H01L2224/48139 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01004 , H01L2924/01068 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2224/37099
摘要： A power semiconductor device to which a large current can be applied and which can be fabricated compactly in a shorter time, including an electrode structure for taking out electrodes from a power semiconductor element mounted on one of a plurality of circuit patterns formed on an insulating substrate inside of a case up to an external-connection terminal exposed outside of the case, and an external-connection terminal insert-formed on the body of the case, exposed to the outside of the case at one end of the terminal and having a junction portion at its other end joined to a circuit pattern different from the circuit pattern on which the power semiconductor element is mounted. The junction portion is directly connected with the power semiconductor element through a wire member bonded to the face opposite to the junction face of the terminal.
摘要翻译：一种功率半导体器件，其能够施加大电流并且可以在更短的时间内紧凑地制造，包括用于从安装在形成在绝缘基板上的多个电路图案之一上的功率半导体元件取出电极的电极结构在壳体的内部，直到暴露在壳体外部的外部连接端子，以及外部连接端子，插入形成在壳体的主体上，在端子的一端暴露于壳体的外部并具有接合部其另一端的部分与不同于其上安装功率半导体元件的电路图案的电路图案接合。接合部分通过接合到与端子的接合面相对的面的线构件与功率半导体元件直接连接。

29. 发明授权

US06576518B1 Method of manufacturing a mask ROM semiconductor device 有权
标题翻译：掩模ROM半导体器件的制造方法
公开(公告)号：US06576518B1
公开(公告)日：2003-06-10
申请号：US10091991
申请日：2002-03-06
申请人： Junji Yamada , Yutaka Yamada , Junichi Ariyoshi
发明人： Junji Yamada , Yutaka Yamada , Junichi Ariyoshi
IPC分类号： H01K218246
CPC分类号： H01L27/1126 , H01L27/112
摘要： Disclosed is a method of manufacturing a semiconductor device including a gate electrode on a semiconductor substrate through a gate insulated film; source/drain regions formed to be adjacent to the gate electrode; and an Al wiring formed through an interlayer insulating film covering the gate electrode, wherein impurity ions are implanted in a surface layer of the substrate using the Al wiring and a photoresist formed thereon as a mask, and wherein no photoresist is formed on the Al wiring arranged above regions in which the impurity ions are implanted in adjacent elements.
摘要翻译：公开了一种通过栅极绝缘膜在半导体衬底上制造包括栅电极的半导体器件的方法; 形成为与栅电极相邻的源/漏区; 以及通过覆盖栅电极的层间绝缘膜形成的Al布线，其中使用Al布线和形成在其上的光致抗蚀剂作为掩模将杂质离子注入到基板的表面层中，并且其中在Al布线上不形成光致抗蚀剂布置在其中杂质离子注入相邻元件的区域之上。

30. 发明授权

US06495604B1 Cycloalkene derivatives, process for producing the same, and use 有权
标题翻译：环烯烃衍生物，生产方法和使用
公开(公告)号：US06495604B1
公开(公告)日：2002-12-17
申请号：US09622392
申请日：2000-08-14
申请人： Yuzo Ichimori , Masayuki Ii , Katsumi Itoh , Tomoyuki Kitazaki , Junji Yamada
发明人： Yuzo Ichimori , Masayuki Ii , Katsumi Itoh , Tomoyuki Kitazaki , Junji Yamada
IPC分类号： A61K3118
CPC分类号： C07D249/08 , C07C311/14 , C07C2601/10 , C07C2601/16 , C07C2601/18 , C07D249/06 , C07D257/04 , C07D275/06
摘要： The present invention provides a compound represented by the formula: wherein R represents an aliphatic hydrocarbon group optionally having substituents, an aromatic hydrocarbon group optionally having substituents, a heterocyclic group optionally having substituents, a group represented by the formula: OR1 (wherein R1 represents a hydrogen atom or an aliphatic hydrocarbon group optionally having substituents) or a group represented by the formula: wherein R1b represents a hydrogen atom or an aliphatic hydrocarbon group optionally having substituents, R1c is, same with or different from R1b, a hydrogen atom or an aliphatic hydrocarbon group optionally having substituents, R0 represents a hydrogen atom or an aliphatic hydrocarbon group, or R and R0 represents a bond with each other, Ar represents an aromatic hydrocarbon group optionally having substituents, and n is an integer of 1 to 4, or a salt thereof, which is a agent for preventing or treating diseases such as cardiac disease, autoimmune disease, septick shock, etc.
摘要翻译：本发明提供由下式表示的化合物：其中R表示任选具有取代基的脂族烃基，任选具有取代基的芳族烃基，任选具有取代基的杂环基，由式OR1表示的基团（其中R1表示氢原子或任选具有取代基的脂族烃基）或由下式表示的基团：其中R 1b表示氢原子或任选具有取代基的脂族烃基，R 1c与R 1b相同或不同，为氢原子或脂族任选具有取代基的烃基，R 0表示氢原子或脂族烃基，或R和R 0表示彼此的键，Ar表示任选具有取代基的芳香族烃基，n表示1〜4的整数，或者其盐，其是用于预防或治疗诸如心脏病的疾病的药剂麻疹，败血性休克等

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