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21. 发明授权

US06961872B2 Microcomputer and debugging system 失效
标题翻译：微电脑调试系统
公开(公告)号：US06961872B2
公开(公告)日：2005-11-01
申请号：US10193325
申请日：2002-07-12
申请人： Osamu Yamamoto , Shunichi Iwata
发明人： Osamu Yamamoto , Shunichi Iwata
IPC分类号： G06F11/28 , G06F11/34 , G06F11/36 , G06F11/00
CPC分类号： G06F11/3636 , G06F11/28 , G06F11/3648
摘要： A microcomputer according to the present invention includes: collecting unit for generating and collecting a series of trace information for each execution process of a program to be evaluated in a preset sampling period for a predetermined number of repetitions; outputting circuit for outputting the series of the trace information for each repetition; and decimating circuit for deleting any of the trace information collected at each repetition so that the outputting circuit can output all of the trace information to be collected within the sampling period when the collecting circuit has finished repetitive collection process.
摘要翻译：根据本发明的微型计算机包括：收集单元，用于为预定次数的重复的预设采样周期中的待评估程序的每个执行处理生成和收集一系列跟踪信息; 输出电路，用于输出每个重复的一系列跟踪信息; 以及抽取电路，用于删除在每次重复时收集的任何跟踪信息，使得当收集电路完成重复收集处理时，输出电路可以在采样周期内输出要采集的所有跟踪信息。

22. 发明授权

US5669012A Data processor and control circuit for inserting/extracting data to/from an optional byte position of a register 失效
标题翻译：数据处理器和控制电路，用于从寄存器的可选字节位置插入/提取数据
公开(公告)号：US5669012A
公开(公告)日：1997-09-16
申请号：US720455
申请日：1996-09-30
申请人： Toru Shimizu , Shunichi Iwata , Toshio Doi , Shigeo Mizugaki
发明人： Toru Shimizu , Shunichi Iwata , Toshio Doi , Shigeo Mizugaki
IPC分类号： G06F7/00 , G06F9/30 , G06F9/305 , G06F9/308 , G06F9/315 , G06F9/34 , G06F9/35
CPC分类号： G06F9/30018 , G06F9/30032 , G06F9/30167
摘要： A data processor being provided with a microdecoder which decodes instruction codes comprising two operation code parts, a source operand specifying part and a destination operand specifying part, wherein an optional bit area of source data (a register of a general register file or a memory) is inserted in an optional bit area (determined by the value of the first operation code part) of a destination register according to the decoding result, and an optional bit area (determined by the value of the second operation code part) of a source register is extracted and stored in an optional bit area of destination (a register of the general register file or the memory), thereby making it possible to "process the insertion and extraction operations to and from optional byte positions of registers" at a high speed with short instruction code size.
摘要翻译：一种数据处理器，其具有对包括两个操作码部分的指令代码，源操作数指定部分和目的地操作数指定部分进行解码的微解码器，其中源数据的可选位区（通用寄存器文件或存储器的寄存器）根据解码结果插入到目的地寄存器的可选位区域（由第一操作码部分的值确定）和源寄存器的可选位区域（由第二操作码部分的值确定）被提取并存储在目的地的可选位区（通用寄存器文件或存储器的寄存器）中，从而使得可以以高速“处理到寄存器的可选字节位置的插入和提取操作”成为可能，短指令代码大小。

23. 发明授权

US5499380A Data processor and read control circuit, write control circuit therefor 失效
标题翻译：数据处理器和读控制电路，写控制电路
公开(公告)号：US5499380A
公开(公告)日：1996-03-12
申请号：US245263
申请日：1994-05-18
申请人： Shunichi Iwata , Toru Shimizu
发明人： Shunichi Iwata , Toru Shimizu
IPC分类号： G06F12/04 , G06F9/312 , G06F9/315 , G06F12/08
CPC分类号： G06F9/30043 , G06F9/30032 , G06F9/3816 , G06F12/04
摘要： A shift circuit 213 used in arithmetic operations is provided with the shift width generating circuit 217 which generates a shift width data from lower bits of an access address and an access size, and a circuit is provided to generated data comprising the first select output circuit 214, the third select output circuit 216 and the like which generate a data by merging byte by byte selected from either an output of the shift circuit 213 or a value of a register of a register file 210 according to the combination of the lower bits of the access address and the access size. It is possible to align the data in the shift circuit 213 which is provided for the purpose of arithmetic operations, and exclusive alignment circuit is made unnecessary thereby enabling it to reduce the amount of hardware.
摘要翻译：在算术运算中使用的移位电路213设置有移位宽度产生电路217，其从存取地址和访问大小的较低位产生移位宽度数据，并且电路被提供给包括第一选择输出电路214的生成数据，第三选择输出电路216等，其通过从移位电路213的输出或从寄存器文件210的寄存器的值中逐个字节合并而生成数据，访问地址和访问大小。可以对用于算术运算的目的而设置的移位电路213中的数据进行对准，并且不需要专用对准电路，从而能够减少硬件的数量。

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