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    • 22. 发明授权
    • Diversity reception apparatus
    • 分集接收装置
    • US06181749B2
    • 2001-01-30
    • US09182063
    • 1998-10-29
    • Yoshio UrabeHitoshi TakaiHidetoshi YamasakiKenichi Mori
    • Yoshio UrabeHitoshi TakaiHidetoshi YamasakiKenichi Mori
    • H04B708
    • H01Q3/267H04B7/0817H04B7/0888H04L1/06
    • A demodulator 1 obtains demodulated data in a plurality of channels. Estimating portions 2a and 2b estimate and output the numbers of erroneous symbols and error locations thereof in the demodulated data. A data comparator 3 compares the demodulated data corresponding to the error locations with the demodulated data in the corresponding locations in other channels to determine whether the error location is correct, and it outputs a decision signal in response to the determination. A data selector 4 selects one of the demodulated data in the plurality of channels on the basis of the numbers of erroneous symbols and the decision signals and outputs the data as selected data. It is then possible to maintain the reliability of error detection even when a less redundant short error detecting code is used, and also to accurately select a channel of good quality even when the demodulated data in all channels contain the same extent of errors.
    • 解调器1获得多个信道中的解调数据。 估计部分2a和2b估计并输出解调数据中的错误符号和错误位置的数目。 数据比较器3将对应于错误位置的解调数据与其他通道中的相应位置中的解调数据进行比较,以确定错误位置是否正确,并且响应于该确定而输出判定信号。 数据选择器4基于错误符号和判定信号的数量选择多个信道中的解调数据中的一个,并输出数据作为选择的数据。 即使当使用较少冗余的短错误检测码时也可以保持错误检测的可靠性,并且即使当所有信道中的解调数据包含相同的错误程度时,也可以准确地选择质量良好的信道。
    • 24. 发明授权
    • Signal detection device and clock recovery device using the same
    • 信号检测装置和使用其的时钟恢复装置
    • US5617374A
    • 1997-04-01
    • US489276
    • 1995-06-09
    • Shinichiro OhmiHitoshi TakaiYoshio Urabe
    • Shinichiro OhmiHitoshi TakaiYoshio Urabe
    • H04L7/00H04L7/02H04L7/027H04L7/033H04L7/10G04B47/00H03K5/13
    • H04L7/0331
    • A time window detection portion 3a outputs a time window detection pulse from a time window signal generated in a time window generating portion 2a and a zero-cross detection pulse detected in a zero-cross detection portion 1a. First and second phase storage portions 4a and 5a store output phase values of a phase counter 22 for different times as first and second phase values, respectively. A center phase computing portion 6a computes a first center phase value from the first and second phase values and a center phase storage portion 7a stores the first center phase value of the last time as a second center phase value. An approximation detection portion 8a determines whether the first and second center phase values are approximate or not and outputs an approximation detection pulse when they approximate. A frequency determination portion 20 determines whether a data signal is included in the input signal or not on the basis of frequency of detection of the approximation detection pulse with respect to the zero-cross detection pulse computed in a frequency computing portion 17.
    • 时间窗检测部分3a从在时间窗产生部分2a中产生的时间窗信号和在零交叉检测部分1a中检测的过零检测脉冲输出时间窗检测脉冲。 第一和第二相位存储部分4a和5a分别将相位计数器22的输出相位值分别作为第一和第二相位值。 中心相位计算部分6a根据第一和第二相位值计算第一中心相位值,并且中心相位存储部分7a将最后一次的第一中心相位值存储为第二中心相位值。 近似检测部分8a确定第一和第二中心相位值是否近似,并且当它们近似时输出近似检测脉冲。 频率确定部分20基于在频率计算部分17中计算的过零检测脉冲的检测频率来确定数据信号是否包括在输入信号中。
    • 25. 发明授权
    • Digital signal transmission device for improvement of anti-multipath
feature, a method of the same and digital signal transmission waveform
    • 用于改善抗多径特征的数字信号传输装置,一种相同方法和数字信号传输波形
    • US5454012A
    • 1995-09-26
    • US227111
    • 1994-04-13
    • Hitoshi TakaiYoshio UrabeHidetoshi Yamasaki
    • Hitoshi TakaiYoshio UrabeHidetoshi Yamasaki
    • H04B14/06H04L27/18H04L27/20H04L27/04
    • H04L27/18
    • A digital signal transmission device for transmitting a signal generated by modulating a carrier wave according to a binary or M-ary data sequence. Such device comprises a differentially encoding unit for converting the original data sequence into a transmission data sequence, a waveform generation unit for.degree. generating a phase transition waveform in each time slot which corresponds to each data included in the transmission data sequence, and a modulation unit for modulating the carrier wave according to a signal which has the phase transition waveform generated by the waveform generation unit. The information to be transmitted is present in a difference between two data which are spaced form each other by a prescribed time slots. The phase transition waveform includes a center part and a connection part for linking the center parts in adjacent time slots where a phase transition waveform in the center part of a present time slot is generated according to a corresponding data, then a phase transition waveform in the connection part is generated to continue on the phase transition waveform in the center parts of time slots succeeding to and preceding the present time slot without having a discontinuity even at the linking point.
    • 一种数字信号传输装置,用于发送根据二进制或多元数据序列调制载波产生的信号。 这种装置包括用于将原始数据序列转换成发送数据序列的差分编码单元,用于在与发送数据序列中包括的每个数据相对应的每个时隙中产生相位变化波形的DEG的波形生成单元和调制单元 用于根据具有由波形生成单元生成的相变波形的信号来调制载波。 要发送的信息以彼此间隔开规定时隙的两个数据之间的差异存在。 相变波形包括中心部分和连接部分,用于根据相应的数据链接当前时隙的中心部分中的相位变化波形的相邻时隙中的中心部分,然后在 生成连接部分,以便在当前时隙之前和之前的时隙的中心部分的相位转变波形上继续,而不会在连接点处具有不连续性。
    • 27. 发明授权
    • Signal detection device and signal detection method
    • 信号检测装置及信号检测方法
    • US08923451B2
    • 2014-12-30
    • US13817668
    • 2012-03-07
    • Yoshio UrabeKazuhiro AndoMasataka IrieHiroshi Takahashi
    • Yoshio UrabeKazuhiro AndoMasataka IrieHiroshi Takahashi
    • H04L27/06H04L27/26H04B17/00H04B7/08
    • H04L27/2649H04B7/0828H04B17/327
    • In this signal detection device (100), a delaying unit (101) delays a first distributed signal or a second distributed signal distributed from a received signal for a period of time of T1 to form a first multiplication signal, and delays the one for a period of time of T2 (T2>T1) to form a second multiplication signal. An integrator (104) calculates a first correlation value by integrating the result of multiplying the first distributed signal and the first multiplication signal. An integrator (105) calculates a second correlation value by integrating the result of multiplying the second distributed signal and the second multiplication signal. An evaluation unit (108) evaluates whether the signal to be detected, which is a periodic signal with a period of T1 or a periodic signal with a period of T2, exists or not, on the basis of the first correlation value and the second correlation value.
    • 在该信号检测装置(100)中,延迟单元(101)将从接收信号分配的第一分布信号或第二分布信号延迟T1的时间段,以形成第一乘法信号,并将其延迟 T2(T2> T1)的时间段,形成第二个乘法信号。 积分器(104)通过对乘以第一分布式信号和第一乘法信号的结果进行积分来计算第一相关值。 积分器(105)通过对乘以第二分布信号和第二乘法信号的结果进行积分来计算第二相关值。 评估单元(108)基于第一相关值和第二相关性来评估是否存在周期为T1的周期信号或周期为T2的周期信号的被检测信号是否存在 值。
    • 28. 发明授权
    • Impedance stabilization device
    • 阻抗稳定装置
    • US08698573B2
    • 2014-04-15
    • US13321352
    • 2011-04-12
    • Yoshio Urabe
    • Yoshio Urabe
    • H03H7/38H04B3/54
    • H04B3/56H04B2203/5425H04B2203/5483H04L25/0278
    • Provided is an impedance stabilization device having a configuration in which a circuit including a series matching impedance element (11a and 12a (11b and 12b)) and a high-frequency blocking element connected in parallel is inserted in series into at least one of lines (10a (10b)) constituting a power line, and the lines (10a and 10b) are connected via another circuit including a parallel matching impedance element (13) and a low-frequency matching element (14) connected in series. A high-frequency signal passes through the series matching impedance element, a power current passes through the high-frequency blocking element, and the parallel matching impedance element functions as a termination resistor when a terminal on an equipment side is an open end.
    • 提供一种阻抗稳定装置,其具有将包括串联匹配阻抗元件(11a和12a(11b和12b))的电路和并联连接的高频阻挡元件串联插入至少一条线( (10a)和10b分别通过包括串联连接的并联匹配阻抗元件(13)和低频匹配元件(14)的另一个电路连接。 高频信号通过串联匹配阻抗元件,功率电流通过高频阻塞元件,当设备端的端子为开路端时,并联匹配阻抗元件用作终端电阻。
    • 29. 发明申请
    • IMPEDANCE STABILIZATION DEVICE
    • 阻抗稳定装置
    • US20120086517A1
    • 2012-04-12
    • US13321352
    • 2011-04-12
    • Yoshio Urabe
    • Yoshio Urabe
    • H03H7/40H03H7/38
    • H04B3/56H04B2203/5425H04B2203/5483H04L25/0278
    • Provided is an impedance stabilization device having a configuration in which a circuit including a series matching impedance element (11a and 12a (11b and 12b)) and a high-frequency blocking element connected in parallel is inserted in series into at least one of lines (10a (10b)) constituting a power line, and the lines (10a and 10b) are connected via another circuit including a parallel matching impedance element (13) and a low-frequency matching element (14) connected in series. A high-frequency signal passes through the series matching impedance element, a power current passes through the high-frequency blocking element, and the parallel matching impedance element functions as a termination resistor when a terminal on an equipment side is an open end.
    • 提供一种阻抗稳定装置,其具有将包括串联匹配阻抗元件(11a和12a(11b和12b))的电路和并联连接的高频阻挡元件串联插入至少一条线( (10a)和10b分别通过包括串联连接的并联匹配阻抗元件(13)和低频匹配元件(14)的另一个电路连接。 高频信号通过串联匹配阻抗元件,功率电流通过高频阻塞元件,当设备端的端子为开路端时,并联匹配阻抗元件用作终端电阻。