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21. 发明授权

US07515490B2 Sensing circuit for organic memory 有权
标题翻译：有机记忆传感电路
公开(公告)号：US07515490B2
公开(公告)日：2009-04-07
申请号：US11309037
申请日：2006-06-12
申请人： Jan-Ruei Lin , Shyh-Shyuan Sheu , Wei-Jen Chang
发明人： Jan-Ruei Lin , Shyh-Shyuan Sheu , Wei-Jen Chang
IPC分类号： G11C7/06 , G11C7/10 , G11C7/08 , G11C11/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C2213/79
摘要： An organic memory at least includes a number of select lines, a number of data lines, a bit cell array, and a number of digital sensing circuits. The bit cell array includes a number of bit cells, wherein each bit cell includes an organic memory cell and a switch element. Each digital sensing circuit includes a current-to-voltage converter and a sensing block circuit. Therefore, a complete digital sensing mechanism of an organic memory IC is formed and is practicable and suitable for mass-production.
摘要翻译：有机存储器至少包括多条选择线，多条数据线，位单元阵列和多个数字感测电路。位单元阵列包括多个位单元，其中每个位单元包括有机存储单元和开关元件。每个数字感测电路包括电流 - 电压转换器和感测块电路。因此，形成有机存储器IC的完整的数字感测机构，并且是可行的并且适合于批量生产。

22. 发明授权

US07242174B1 Digital sensing circuit 有权
标题翻译：数字感应电路
公开(公告)号：US07242174B1
公开(公告)日：2007-07-10
申请号：US11309002
申请日：2006-06-07
申请人： Shyh-Shyuan Sheu , Wei-Jen Chang , Jan-Ruei Lin
发明人： Shyh-Shyuan Sheu , Wei-Jen Chang , Jan-Ruei Lin
IPC分类号： G01R19/00 , G11C7/00
CPC分类号： G11C7/067 , B82Y10/00 , G11C11/5664 , G11C13/0014 , G11C27/02
摘要： A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit includes a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.
摘要翻译：提供一种能够感测存储在有机存储器的位单元中的位信息的数字感测电路。数字感测电路包括电流 - 电压转换器，复位块电路和感测块电路。电流 - 电压转换器将传导电流转换为电压信号。感测块电路根据电压信号缓冲并输出位信息。因此，本发明的设计和布局的挑战非常低，从而提高了成品率。因此，实现了适合于批量生产的实用的记忆装置。

23. 发明申请

US20070152650A1 DIGITAL SENSING CIRCUIT 有权
标题翻译：数字感应电路
公开(公告)号：US20070152650A1
公开(公告)日：2007-07-05
申请号：US11309002
申请日：2006-06-07
申请人： Shyh-Shyuan Sheu , Wei-Jen Chang , Jan-Ruei Lin
发明人： Shyh-Shyuan Sheu , Wei-Jen Chang , Jan-Ruei Lin
IPC分类号： G01R19/00
CPC分类号： G11C7/067 , B82Y10/00 , G11C11/5664 , G11C13/0014 , G11C27/02
摘要： A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit comprises a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.
摘要翻译：提供一种能够感测存储在有机存储器的位单元中的位信息的数字感测电路。数字感测电路包括电流 - 电压转换器，复位块电路和感测块电路。电流 - 电压转换器将传导电流转换为电压信号。感测块电路根据电压信号缓冲并输出位信息。因此，本发明的设计和布局的挑战非常低，从而提高了成品率。因此，实现了适合于批量生产的实用的记忆装置。

24. 发明申请

US20070103962A1 Programmable memory cell and operation method 失效
标题翻译：可编程存储单元和操作方法
公开(公告)号：US20070103962A1
公开(公告)日：2007-05-10
申请号：US11271550
申请日：2005-11-09
申请人： Keng-Li Su , Shyh-Shyuan Sheu , Jan-Ruei Lin , Wei-Jen Chang , Chen-Pang Kung
发明人： Keng-Li Su , Shyh-Shyuan Sheu , Jan-Ruei Lin , Wei-Jen Chang , Chen-Pang Kung
IPC分类号： G11C11/00
CPC分类号： G11C13/00 , B82Y10/00 , G11C13/0014 , G11C2213/79
摘要： A memory array including a plurality of programmable memory cells, a plurality of column lines and a plurality of row lines is introduced. Each of the programmable memory cells is coupled to corresponding one of the column lines and corresponding one of the row lines. Each of the programmable memory cells includes an organic memory cell and an active switching element. The active switching element is controlled by the column line and interposed between the row line and the organic memory cell. Under controlling of the column line, the active switching element is turned on to coupling the row line and the organic memory cell to connect to each other.
摘要翻译：引入包括多个可编程存储器单元，多个列线和多个行线的存储器阵列。每个可编程存储器单元耦合到对应的列线和对应的一行行。每个可编程存储器单元包括有机存储单元和有源开关元件。有源开关元件由列线控制并插入在行线和有机存储单元之间。在列线的控制下，有源开关元件被接通以将行线和有机存储器单元耦合以彼此连接。

25. 发明授权

US06829322B2 Shift-register circuit and shift-register unit 有权
标题翻译：移位寄存器电路和移位寄存器单元
公开(公告)号：US06829322B2
公开(公告)日：2004-12-07
申请号：US10617782
申请日：2003-07-14
申请人： Jun-Ren Shih , Shang-Li Chen , Bo-Wen Wang , Jan-Ruei Lin
发明人： Jun-Ren Shih , Shang-Li Chen , Bo-Wen Wang , Jan-Ruei Lin
IPC分类号： G11C1900
CPC分类号： G11C19/00 , G11C19/28
摘要： A shift-register unit. The first transistor includes a first source/drain coupled to a first terminal, a second source/drain, and a first gate coupled to a reset signal to stop the shift-register unit outputting a pulse signal. The second transistor includes a third source/drain coupled to the second source/drain, a fourth source/drain coupled to a second terminal, and a second gate coupled to a setting signal to initial the shift-register unit. The third transistor includes a fifth source/drain coupled to an output terminal, a third gate coupled to the second source/drain and a sixth source/drain coupled to a clock signal to start outputting the pulse signal. The fourth transistor includes a seventh source/drain coupled to the first terminal, an eighth source/drain coupled to the output terminal and a fourth gate coupled to a refresh signal to set a voltage level of the shift-register unit in a standby mode.
摘要翻译：移位寄存器单元。第一晶体管包括耦合到第一端子的第一源极/漏极，第二源极/漏极以及耦合到复位信号的第一栅极，以停止移位寄存器单元输出脉冲信号。第二晶体管包括耦合到第二源极/漏极的第三源极/漏极，耦合到第二端子的第四源极/漏极和耦合到设置信号的第二栅极以初始化移位寄存器单元。第三晶体管包括耦合到输出端的第五源极/漏极，耦合到第二源极/漏极的第三栅极和耦合到时钟信号的第六源极/漏极，以开始输出脉冲信号。第四晶体管包括耦合到第一端子的第七源极/漏极，耦合到输出端子的第八源极/漏极和耦合到刷新信号的第四栅极，以将待机模式中的移位寄存器单元的电压电平设置。

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