专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07939892B2 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US07939892B2
公开(公告)日：2011-05-10
申请号：US12899120
申请日：2010-10-06
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： H01L23/62 , H03K5/08
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

22. 发明申请

US20100091567A1 Test Circuit and Method for Multilevel Cell Flash Memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US20100091567A1
公开(公告)日：2010-04-15
申请号：US12637365
申请日：2009-12-14
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C16/04 , G11C29/00 , H03L5/00 , G01R19/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

23. 发明授权

US07596037B2 Independent bi-directional margin control per level and independently expandable reference cell levels for flash memory sensing 有权
标题翻译：独立的双向边缘控制每个级别和独立扩展参考单元级别的闪存检测
公开(公告)号：US07596037B2
公开(公告)日：2009-09-29
申请号：US11855801
申请日：2007-09-14
申请人： Vishal Sarin , Hieu Van Tran , William John Saiki
发明人： Vishal Sarin , Hieu Van Tran , William John Saiki
IPC分类号： G11C5/14
CPC分类号： G11C7/14 , G11C11/5642 , G11C16/28 , G11C2211/5634
摘要： A memory system includes reference level generators that may provide programmable margins, and programmable verify voltage levels. The reference levels may be shifted within a range of voltages with varying differences between reference voltage levels and with different margins and verify levels.
摘要翻译：存储器系统包括可提供可编程余量和可编程验证电压电平的参考电平发生器。参考电平可以在参考电压电平与不同裕度和验证电平之间变化差异的电压范围内移动。

24. 发明申请

US20090073770A1 Independent Bi-Directional Margin Control Per Level And Independently Expandable Reference Cell Levels For Flash Memory Sensing 有权
标题翻译：独立双向边缘控制每个级别和独立扩展参考单元级别闪存检测
公开(公告)号：US20090073770A1
公开(公告)日：2009-03-19
申请号：US11855801
申请日：2007-09-14
申请人： Vishal Sarin , Hieu Van Tran , William John Saiki
发明人： Vishal Sarin , Hieu Van Tran , William John Saiki
IPC分类号： G11C16/26
CPC分类号： G11C7/14 , G11C11/5642 , G11C16/28 , G11C2211/5634
摘要： A memory system includes reference level generators that may provide programmable margins, and programmable verify voltage levels. The reference levels may be shifted within a range of voltages with varying differences between reference voltage levels and with different margins and verify levels.
摘要翻译：存储器系统包括可提供可编程余量和可编程验证电压电平的参考电平发生器。参考电平可以在参考电压电平与不同裕度和验证电平之间变化差异的电压范围内移动。

25. 发明授权

US06788608B2 High voltage pulse method and apparatus for digital multilevel non-volatile memory integrated system 有权
标题翻译：数字多电平非易失性存储器集成系统的高压脉冲法和装置
公开(公告)号：US06788608B2
公开(公告)日：2004-09-07
申请号：US10209538
申请日：2002-07-30
申请人： Hieu Van Tran , William John Saiki , Jack Edward Frayer , Michael Stephen Briner
发明人： Hieu Van Tran , William John Saiki , Jack Edward Frayer , Michael Stephen Briner
IPC分类号： G11C700
CPC分类号： G11C5/145 , G11C11/56 , G11C16/30
摘要： A digital multilevel non-volatile memory integrated system includes an apparatus and method for high voltage, high precision pulsing generation. A voltage generator includes a low voltage high speed generator, a low voltage to high voltage high speed level translator, and a high voltage driver. A precise and stable high voltage level is attained across power supply, process, or temperature variation. The power may be optimized at the high voltage supply as tradeoff with power in the low voltage supply. A ping-pong operation sets up a high voltage level and the high voltage pulsing is output in a ping-pong fashion. A slew rate control circuit slows the input to achieve faster settling times. The high voltage is shaped by low voltage switching, HV fast switching and ramp circuit control. The high voltage pulsing may be fast and precise to permit real time control of the pulse parameters to adapt to memory cell attributes.
摘要翻译：数字多电平非易失性存储器集成系统包括用于高电压，高精度脉冲发生的装置和方法。电压发生器包括低压高速发生器，低压至高压高速电平转换器和高压驱动器。通过电源，过程或温度变化实现精确稳定的高电压电平。功率可以在高压电源下进行优化，因为在低电压电源中与功率进行权衡。乒乓操作设置高电压电平，高压脉冲以乒乓方式输出。转换速率控制电路减慢输入以实现更快的建立时间。高压通过低压开关，高压快速开关和斜坡电路控制形成。高压脉冲可以是快速和精确的，以允许脉冲参数的实时控制以适应存储器单元属性。

26. 发明授权

US07661041B2 Test circuit and method for multilevel cell flash memory 有权
公开(公告)号：US07661041B2
公开(公告)日：2010-02-09
申请号：US11953754
申请日：2007-12-10
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.

27. 发明申请

US20090067235A1 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US20090067235A1
公开(公告)日：2009-03-12
申请号：US11953754
申请日：2007-12-10
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C16/00 , G11C29/00 , G11C16/06
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

28. 发明授权

US07325177B2 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US07325177B2
公开(公告)日：2008-01-29
申请号：US10991702
申请日：2004-11-17
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test circuit is sued to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：检测电路用于检测数字多电平存储单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储单元系统来测试操作或性能。

29. 发明申请

US20110022905A1 Test Circuit and Method for Multilevel Cell Flash Memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US20110022905A1
公开(公告)日：2011-01-27
申请号：US12899120
申请日：2010-10-06
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung O. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung O. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

30. 发明授权

US07831872B2 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US07831872B2
公开(公告)日：2010-11-09
申请号：US12637365
申请日：2009-12-14
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式