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21. 发明授权

US07849382B2 Memory control circuit, nonvolatile storage apparatus, and memory control method 有权
标题翻译：存储器控制电路，非易失性存储装置和存储器控制方法
公开(公告)号：US07849382B2
公开(公告)日：2010-12-07
申请号：US11568564
申请日：2005-05-12
申请人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno , Yoshihisa Inagaki , Manabu Inoue
发明人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno , Yoshihisa Inagaki , Manabu Inoue
IPC分类号： G11C29/00
CPC分类号： G11C16/10 , G06F11/1068
摘要： An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.
摘要翻译：发生写入错误的地址被保持，并且在一系列写入完成之后，读取保持的地址的数据。然后，仅对于确定需要重写写入的地址执行错误块处理，从而防止错误块的增加。这可以抑制在特定闪速存储器中执行写入时经常发生写入错误并发生大量错误块的问题。

22. 发明申请

US20100223510A1 NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND DEFECT MANAGEMENT METHOD FOR NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件，非易失性存储器系统和非易失性存储器件的缺陷管理方法
公开(公告)号：US20100223510A1
公开(公告)日：2010-09-02
申请号：US12160972
申请日：2006-11-30
申请人： Masahiro Nakanishi
发明人： Masahiro Nakanishi
IPC分类号： G11C29/08 , G06F1/26
CPC分类号： G06F11/008 , G11C16/349
摘要： A life parameter generator generates life parameters related to the life of a nonvolatile memory device by using parameters related to allowable capacity for memory defect and occurrence capacity for memory defect. The life parameters are stored in a life parameter storing block of a nonvolatile memory. An access device reads and displays the stored life parameters. Thus, the user can precisely know the life of the nonvolatile memory device or the moment when a device having a built in nonvolatile memory such as a portable audio becomes unusable.
摘要翻译：寿命参数发生器通过使用与存储器缺陷的容许容量相关的参数和存储器缺陷的发生容量来产生与非易失性存储器件的寿命相关的寿命参数。寿命参数存储在非易失性存储器的寿命参数存储块中。访问设备读取并显示存储的生命参数。因此，用户可以精确地知道非易失性存储器件的寿命，或者具有诸如便携式音频的内置非易失性存储器的器件变得不可用的时刻。

23. 发明授权

US07702846B2 Memory controller, nonvolatile storage device, nonvolatile storage system, and data writing method 有权
标题翻译：内存控制器，非易失性存储设备，非易失性存储系统和数据写入方式
公开(公告)号：US07702846B2
公开(公告)日：2010-04-20
申请号：US11908715
申请日：2006-03-09
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
IPC分类号： G06F12/12
CPC分类号： G06F3/0656 , G06F3/0613 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G06F2212/1016 , G06F2212/7203
摘要： A nonvolatile storage device is provided with a nonvolatile main storage memory whose erase size is larger than a cluster size, and a buffer, i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer, then, a plurality of data in the buffer are collectively taken out to be stored in the main storage memory. Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory at a high speed.
摘要翻译：非易失性存储装置具有擦除大小大于簇大小的非易失性主存储存储器和缓冲器，即非易失性辅助存储存储器。在将数据写入存储器时，将数据临时存储在缓冲器中，然后将缓冲器中的多个数据共同取出以存储在主存储器中。原始块中的数据保存在主存储器中的写入块中。因此，可以高速地将数据写入主存储存储器。

24. 发明授权

US07654466B2 Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method 有权
标题翻译：半导体存储卡，半导体存储器控制装置和半导体存储器控制方法
公开(公告)号：US07654466B2
公开(公告)日：2010-02-02
申请号：US10553725
申请日：2004-09-13
申请人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
发明人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F3/0611 , G06F3/0625 , G06F3/0658 , G06F3/0659 , G06F3/0688 , Y02D10/154
摘要： A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.
摘要翻译：在半导体存储卡中提供主机信息存储器，并且存储由访问单元提供的数据写入起始地址和数据大小。空闲物理区域生成部分基于数据写入开始地址和数据大小来确定在写入数据时是否执行非易失性存储器的无效块的擦除，并且确定要擦除的块的数量。当擦除时，相对于不同的存储器芯片同时执行数据的写入和无效块的擦除。可以优化数据的擦除处理，并且可以实现从存取单元到半导体存储卡的高速访问。

25. 发明申请

US20100005227A1 MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, ACCESS DEVICE, AND NONVOLATILE MEMORY SYSTEM 有权
标题翻译：存储器控制器，非易失性存储器件，访问器件和非易失性存储器系统
公开(公告)号：US20100005227A1
公开(公告)日：2010-01-07
申请号：US12376153
申请日：2007-08-01
申请人： Masahiro Nakanishi , Takuji Maeda , Toshiyuki Honda , Tatsuya Adachi
发明人： Masahiro Nakanishi , Takuji Maeda , Toshiyuki Honda , Tatsuya Adachi
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G11C16/20
摘要： A file to be read or written is designated and accessed from an access device side to a nonvolatile memory device. In an initialization after start-up of the power source, an empty capacity detector detects empty capacity parameters of a nonvolatile memory with dividing the memory into a plurality of regions. An empty capacity parameter notification part notifies the access device of the empty capacity parameters in a stepwise fashion whenever the empty capacity detector detects an empty capacity. With this, at the time when the empty capacity becomes not less than a capacity required to write file data, the data can be written to the nonvolatile memory without waiting for completion of the initialization, resulting in improvement of a response in the recording.
摘要翻译：要从读取或写入的文件被指定并从访问设备侧访问到非易失性存储设备。在电源启动后的初始化中，空容量检测器通过将存储器分成多个区域来检测非易失性存储器的空容量参数。只要空容量检测器检测到空容量，空容量参数通知部分逐步地通知存取设备空容量参数。这样，当空容量变得不小于写入文件数据所需的容量时，可以将数据写入非易失性存储器，而不用等待初始化的完成，从而改善了记录中的响应。

26. 发明授权

US07624298B2 Memory card, data processor, memory card control method and memory card setting 失效
标题翻译：存储卡，数据处理器，存储卡控制方式和存储卡设置
公开(公告)号：US07624298B2
公开(公告)日：2009-11-24
申请号：US10597650
申请日：2005-02-02
申请人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno
发明人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno
IPC分类号： G06F11/00
CPC分类号： G06F13/385 , G06F11/073 , G06F11/0793 , G06F11/1052 , G11C2029/0409
摘要： A memory card (1) includes a host interface (2) that transmits and receives a command and data to and from the data processor (50), a nonvolatile memory (7) that stores data, a controller (3) that controls the operation of the memory card, and a storage section (32) that stores specified management information. The management information includes retry setting information which specifies whether a retry function is executed or not when an error occurs during an operation of writing data to the nonvolatile memory. The controller (3) refers to the retry setting information in the data writing operation, and controls the data writing operation so as to disable the retry function in the event of an error in the data writing operation, when the retry setting information indicates disabling of the retry function or to enable the retry function in the event of an error in the data writing operation, when the retry setting information indicates enabling of the retry function.
摘要翻译：存储卡（1）包括向数据处理器（50）发送和接收命令和数据的主机接口（2），存储数据的非易失性存储器（7），控制操作的控制器（3）以及存储指定的管理信息的存储部（32）。管理信息包括重试设置信息，其在向非易失性存储器写入数据的操作期间发生错误时指定是否执行重试功能。控制器（3）参考数据写入操作中的重试设置信息，并且当重试设置信息指示禁用时，控制数据写入操作以便在数据写入操作中发生错误的情况下禁用重试功能重试功能，或者当重试设置信息指示重试功能的启用时，在数据写入操作中发生错误的情况下启用重试功能。

27. 发明申请

US20090210621A1 NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND ACCESS DEVICE 有权
标题翻译：非易失性存储器件，非易失性存储器系统和访问器件
公开(公告)号：US20090210621A1
公开(公告)日：2009-08-20
申请号：US12374670
申请日：2007-07-26
申请人： Toshiyuki Honda , Masahiro Nakanishi , Hirofumi Nakagaki
发明人： Toshiyuki Honda , Masahiro Nakanishi , Hirofumi Nakagaki
IPC分类号： G06F12/00 , G06F1/26
CPC分类号： H04N1/00281 , H04N1/00315 , H04N2101/00 , H04N2201/0039 , H04N2201/0055 , H04N2201/0087 , H04W52/0274
摘要： Power consumption required for making a nonvolatile storage device having a radio communication function operate as a file server for a radio host device is great for a host device which supplies the power. The present invention enables a user to operate a host device to which the nonvolatile storage device having the radio communication function is attached so as to activate and inactivate the radio communication function of the nonvolatile storage device. This reduces unnecessary power consumption by the radio communication function.
摘要翻译：制造具有无线电通信功能的非易失性存储设备所需的功耗作为无线电主机设备的文件服务器操作对于提供电力的主机设备而言是很大的。本发明使得用户能够操作具有无线电通信功能的非易失性存储设备所附接的主机设备，以激活和停用非易失性存储设备的无线电通信功能。这减少了无线电通信功能的不必要的功耗。

28. 发明授权

US07516344B2 Memory system 有权
标题翻译：内存系统
公开(公告)号：US07516344B2
公开(公告)日：2009-04-07
申请号：US11338770
申请日：2006-01-25
申请人： Yoshihisa Kato , Yasushi Gohou , Masahiro Nakanishi , Masayuki Toyama , Shunichi Iwanari
发明人： Yoshihisa Kato , Yasushi Gohou , Masahiro Nakanishi , Masayuki Toyama , Shunichi Iwanari
IPC分类号： G06F1/00 , G06F1/26 , G06F13/00 , G06F13/28 , G11C16/04 , G11C15/00
CPC分类号： G06F1/3225 , G06F1/206 , G06F1/324 , G06F1/3275 , G06F1/3296 , Y02D10/126 , Y02D10/13 , Y02D10/14 , Y02D10/172
摘要： A memory system of the present invention includes a memory device having a nonvolatile memory and an access device which accesses the memory device. The memory device has a detection unit to detect a temperature of the memory device, a determination unit to determine an operating condition in accordance with the detected temperature and a notification unit to notify the access device of the determined operating condition. The access device has an interface unit to connect to the memory device and a controlling unit to control the interface unit in accordance with the notified operating condition from the memory device.
摘要翻译：本发明的存储器系统包括具有非易失性存储器的存储器件和访问存储器件的存取器件。存储装置具有检测单元，用于检测存储装置的温度，确定单元，以根据检测到的温度确定运行状况;以及通知单元，用于向所述存取装置通知所确定的运行状况。接入设备具有连接到存储设备的接口单元和控制单元，以根据来自存储设备的所通知的操作条件来控制接口单元。

29. 发明申请

US20080109627A1 Nonvolatile Memory Device And Method For Accessing Nonvolatile Memory Device 审中-公开
标题翻译：非易失性存储器件和用于访问非易失性存储器件的方法
公开(公告)号：US20080109627A1
公开(公告)日：2008-05-08
申请号：US11718965
申请日：2005-11-08
申请人： Masayuki Toyama , Tomoaki Izumi , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masahiro Nakanishi
发明人： Masayuki Toyama , Tomoaki Izumi , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masahiro Nakanishi
IPC分类号： G06F12/00
CPC分类号： G06F13/1647 , G06F12/0607
摘要： The present invention provides a nonvolatile memory device that can be used in combination with a plurality of types of memory controllers that are different in number of banks to be simultaneously accessed, the nonvolatile memory device being also capable of achieving high-speed access.The nonvolatile memory device of the present invention includes: a memory area divided into a plurality of banks from/to which data can be read/written independently; and data registers for storing data that has been read from the memory area or that is to be written to the memory area, the data registers being at least equal in number to the banks, and connections between the banks and the data registers are changed in accordance with the number of banks that are to be simultaneously accessed.
摘要翻译：本发明提供一种非易失性存储器件，其可以与要同时存取的存储体数不同的多种存储器控制器组合使用，非易失性存储器件也能够实现高速存取。本发明的非易失性存储装置包括：分割成可独立读/写数据的多个存储体的存储区域; 以及数据寄存器，用于存储已经从存储器区域读取或要写入存储区域的数据，数据寄存器的数量至少等于存储区，并且存储体和数据寄存器之间的连接被改变为按照同时访问的银行数量。

30. 发明申请

US20080049504A1 Memory Control Circuit, Nonvolatile Storage Apparatus, and Memory Control Method 有权
标题翻译：存储器控制电路，非易失存储装置和存储器控制方法
公开(公告)号：US20080049504A1
公开(公告)日：2008-02-28
申请号：US11568564
申请日：2005-05-12
申请人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno , Yoshihisa Inagaki , Manabu Inoue
发明人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno , Yoshihisa Inagaki , Manabu Inoue
IPC分类号： G11C16/06
CPC分类号： G11C16/10 , G06F11/1068
摘要： An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.
摘要翻译：发生写入错误的地址被保持，并且在一系列写入完成之后，读取保持的地址的数据。然后，仅对于确定需要重写写入的地址执行错误块处理，从而防止错误块的增加。这可以抑制在特定闪速存储器中执行写入时经常发生写入错误并发生大量错误块的问题。

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