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21. 发明申请

US20110256675A1 SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs 有权
标题翻译： NANOTUBE / NANOWIRE FET的自对准工艺
公开(公告)号：US20110256675A1
公开(公告)日：2011-10-20
申请号：US13153051
申请日：2011-06-03
申请人： Phaedon Avouris , Roy A. Carruthers , Jia Chen , Christophe G.M.M. Detavernier , Christian Lavoie , Hon-Sum Philip Wong
发明人： Phaedon Avouris , Roy A. Carruthers , Jia Chen , Christophe G.M.M. Detavernier , Christian Lavoie , Hon-Sum Philip Wong
IPC分类号： H01L21/336 , B82Y99/00 , B82Y40/00
CPC分类号： H01L29/6656 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/665 , H01L29/7833 , H01L51/0048 , H01L51/0541 , Y10S977/847 , Y10S977/938
摘要： A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要翻译：互补金属氧化物半导体（CMOS）器件，例如场效应晶体管（FET），其包括通常为碳基纳米材料的至少一个一维纳米结构作为器件沟道，以及金属碳化物接触描述与设备的栅极区域自对准的步骤。本发明还提供一种制造这种CMOS器件的方法。

22. 发明授权

US08003453B2 Self-aligned process for nanotube/nanowire FETs 有权
标题翻译：纳米管/纳米线FET的自对准工艺
公开(公告)号：US08003453B2
公开(公告)日：2011-08-23
申请号：US12125501
申请日：2008-05-22
申请人： Phaedon Avouris , Roy A. Carruthers , Jia Chen , Christopher G. M. M. Detavernier , Christian Lavoie , Hon-Sum Philip Wong
发明人： Phaedon Avouris , Roy A. Carruthers , Jia Chen , Christopher G. M. M. Detavernier , Christian Lavoie , Hon-Sum Philip Wong
IPC分类号： H01L21/336
CPC分类号： H01L29/6656 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/665 , H01L29/7833 , H01L51/0048 , H01L51/0541 , Y10S977/847 , Y10S977/938
摘要： A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要翻译：互补金属氧化物半导体（CMOS）器件，例如场效应晶体管（FET），其包括通常为碳基纳米材料的至少一个一维纳米结构作为器件沟道，以及金属碳化物接触描述与设备的栅极区域自对准的步骤。本发明还提供一种制造这种CMOS器件的方法。

23. 发明申请

US20100001260A1 SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME 有权
标题翻译：自对准纳米管场效应晶体管及其制备方法
公开(公告)号：US20100001260A1
公开(公告)日：2010-01-07
申请号：US12544436
申请日：2009-08-20
申请人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
发明人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
IPC分类号： H01L29/66 , H01L21/336
CPC分类号： H01L51/0516 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L51/0545 , Y10S977/842 , Y10S977/938 , Y10S977/94
摘要： A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
摘要翻译：自对准碳纳米管场效应晶体管半导体器件分别包括沉积在基板上的碳纳米管，分别形成在碳纳米管的第一端和第二端的源极和漏极，以及基本上形成的栅极碳纳米管的一部分，通过电介质膜与碳纳米管分离。

24. 发明申请

US20080210981A1 Integrated Circuit Having Gates and Active Regions Forming a Regular Grating 失效
标题翻译：具有栅格和有源区域的集成电路形成常规光栅
公开(公告)号：US20080210981A1
公开(公告)日：2008-09-04
申请号：US12120878
申请日：2008-05-15
申请人： Leland Chang , Hon-Sum Philip Wong
发明人： Leland Chang , Hon-Sum Philip Wong
IPC分类号： H01L29/80
CPC分类号： H01L27/1104 , H01L27/11
摘要： A semiconductor device includes a plurality of repeatable circuit cells connectable to one or more conductors providing at least electrical connection to the circuit cells and/or electrical connection between one or more circuit elements in the cells. Each of the circuit cells are configured having gates and active regions forming a grating, wherein, for a given active layer in the device, a width of each active region is substantially the same relative to one another, a spacing between any two adjacent active regions is substantially the same, a width of each gate is substantially the same relative to one another, and a spacing between any two adjacent gates is substantially the same.
摘要翻译：半导体器件包括可连接到一个或多个导体的多个可重复的电路单元，至少提供与电路单元的电连接和/或单元中的一个或多个电路元件之间的电连接。每个电路单元被配置成具有栅极和形成光栅的有源区，其中，对于器件中的给定有源层，每个有源区的宽度相对于彼此基本相同，任何两个相邻的有源区之间的间隔基本上相同，每个栅极的宽度相对于彼此基本相同，并且任何两个相邻栅极之间的间隔基本相同。

25. 发明授权

US07402848B2 Integrated circuit having gates and active regions forming a regular grating 失效
标题翻译：集成电路具有形成规则光栅的栅极和有源区
公开(公告)号：US07402848B2
公开(公告)日：2008-07-22
申请号：US11761741
申请日：2007-06-12
申请人： Leland Chang , Hon-Sum Philip Wong
发明人： Leland Chang , Hon-Sum Philip Wong
IPC分类号： H01L29/80
CPC分类号： H01L27/1104 , H01L27/11
摘要： A semiconductor device includes a plurality of repeatable circuit cells connectable to one or more conductors providing at least electrical connection to the circuit cells and/or electrical connection between one or more circuit elements in the cells. Each of the circuit cells are configured having gates and active regions forming a grating, wherein, for a given active layer in the device, a width of each active region is substantially the same relative to one another, a spacing between any two adjacent active regions is substantially the same, a width of each gate is substantially the same relative to one another, and a spacing between any two adjacent gates is substantially the same.
摘要翻译：半导体器件包括可连接到一个或多个导体的多个可重复的电路单元，至少提供与电路单元的电连接和/或单元中的一个或多个电路元件之间的电连接。每个电路单元被配置成具有栅极和形成光栅的有源区，其中，对于器件中的给定有源层，每个有源区的宽度相对于彼此基本相同，任何两个相邻的有源区之间的间隔基本上相同，每个栅极的宽度相对于彼此基本相同，并且任何两个相邻栅极之间的间隔基本相同。

26. 发明授权

US07253065B2 Self-aligned nanotube field effect transistor and method of fabricating same 有权
标题翻译：自对准纳米管场效应晶体管及其制造方法
公开(公告)号：US07253065B2
公开(公告)日：2007-08-07
申请号：US10956851
申请日：2004-10-01
申请人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
发明人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
IPC分类号： H01L21/336 , H01L21/76 , H01L21/31 , H01L21/469
CPC分类号： H01L51/0516 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L51/0545 , Y10S977/842 , Y10S977/938 , Y10S977/94
摘要： A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
摘要翻译：自对准碳纳米管场效应晶体管半导体器件分别包括沉积在基板上的碳纳米管，分别形成在碳纳米管的第一端和第二端的源极和漏极，以及基本上形成的栅极碳纳米管的一部分，通过电介质膜与碳纳米管分离。

27. 发明授权

US07145212B2 Method for manufacturing device substrate with metal back-gate and structure formed thereby 有权
公开(公告)号：US07145212B2
公开(公告)日：2006-12-05
申请号：US10868791
申请日：2004-06-17
申请人： Kevin K. Chan , Lijuan Huang , Fenton R. McFeely , Paul M. Solomon , Hon-Sum Philip Wong
发明人： Kevin K. Chan , Lijuan Huang , Fenton R. McFeely , Paul M. Solomon , Hon-Sum Philip Wong
IPC分类号： H01L29/76
CPC分类号： H01L29/66772 , H01L21/76251 , H01L29/78648
摘要： A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and providing an intermediate gluing layer between the substrate and the metal back-gate to enhance adhesion.

28. 发明授权

US06891227B2 Self-aligned nanotube field effect transistor and method of fabricating same 有权
公开(公告)号：US06891227B2
公开(公告)日：2005-05-10
申请号：US10102365
申请日：2002-03-20
申请人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Richard Martel , Hon-Sum Philip Wong , Philip G. Collins
发明人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Richard Martel , Hon-Sum Philip Wong , Philip G. Collins
IPC分类号： H01L51/00 , H01L51/05 , H01L51/30 , H01L29/76 , H01L29/06 , H01L29/94
CPC分类号： H01L51/0516 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L51/0545 , Y10S977/842 , Y10S977/938 , Y10S977/94
摘要： A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.

29. 发明授权

US06524935B1 Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique 有权
标题翻译：通过氢诱导层转移技术制备绝缘体上的应变Si / SiGe
公开(公告)号：US06524935B1
公开(公告)日：2003-02-25
申请号：US09675840
申请日：2000-09-29
申请人： Donald F. Canaperi , Jack Oon Chu , Christopher P. D'Emic , Lijuan Huang , John Albrecht Ott , Hon-Sum Philip Wong
发明人： Donald F. Canaperi , Jack Oon Chu , Christopher P. D'Emic , Lijuan Huang , John Albrecht Ott , Hon-Sum Philip Wong
IPC分类号： H01L2136
CPC分类号： H01L21/76254
摘要： A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) is described incorporating growing epitaxial Si1−yGey layers on a semiconductor substrate, implanting hydrogen into a selected Si1−yGey layer to form a hydrogen-rich defective layer, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and separating two substrates at the hydrogen-rich defective layer. The separated substrates may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1−yGey, and strained Si1−yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1−yGeyC.
摘要翻译：描述了在半导体衬底上生长的外延Si1-yGey层上生长在绝缘体上的弛豫SiGe（SGOI）上形成应变Si或SiGe的方法，将氢注入到选定的Si1-yGey层中以形成富氢缺陷层，通过化学机械抛光，通过热处理将两个基板结合在一起，并在富氢缺陷层处分离两个基板。分离的衬底可以通过CMP平滑CMP的上表面，用于外延沉积弛豫Si1-yGey，并且应变Si1-yGey取决于组成，应变Si，应变SiC，应变Ge，应变GeC和应变Si1-yGeyC。

30. 发明授权

US06275259B1 Digital automatic gain control circuit for image system 失效
标题翻译：用于图像系统的数字自动增益控制电路
公开(公告)号：US06275259B1
公开(公告)日：2001-08-14
申请号：US09017094
申请日：1998-02-02
申请人： Sudhir Muniswamy Gowda , Hyun Jong Shin , Hon-Sum Philip Wong , Peter Hong Xiao , Jungwook Yang
发明人： Sudhir Muniswamy Gowda , Hyun Jong Shin , Hon-Sum Philip Wong , Peter Hong Xiao , Jungwook Yang
IPC分类号： H04N5235
CPC分类号： H04N5/243 , H03M1/182
摘要： The present invention relates to an automatic gain control circuit in which the automatic gain control function is performed entirely in the digital domain. In an illustrative embodiment, the digital automatic gain control circuit for an image sensor having associated therewith an analog-to digital (A/D) converter for converting analog electrical signals from the image sensor to corresponding digital codes, includes a min/max detector for determining minimum and maximum electrical signal values from the digital codes of the A/D converter for each frame of image. A filter coupled to the min/max detector dampens instantaneous changes of the minimum and maximum values by filtering to provide filtered minimum and maximum values. A digital-to-analog (D/A) converter coupled to the filter generates minimum and maximum analog reference voltages corresponding to the respective minimum and maximum filtered values, the reference voltages being applied to the A/D converter to control associated amplitudes of the digital codes provided thereby.
摘要翻译：本发明涉及自动增益控制电路，其中自动增益控制功能完全在数字域中执行。在说明性实施例中，用于图像传感器的数字自动增益控制电路具有与图像传感器相关联的模数转换器（A / D），用于将来自图像传感器的模拟电信号转换成相应的数字代码，该最小/最大值检测器用于根据每帧图像确定来自A / D转换器的数字代码的最小和最大电信号值。耦合到最小/最大检测器的滤波器通过滤波来抑制最小值和最大值的瞬时变化，以提供滤波的最小值和最大值。耦合到滤波器的数模（D / A）转换器产生对应于相应的最小和最大滤波值的最小和最大模拟参考电压，所述参考电压被施加到A / D转换器以控制相关幅度由此提供数字代码。

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